* [sata_sil24] v0.10 works, v0.20 doesn't
@ 2005-09-04 7:56 Marc Bevand
2005-09-04 14:02 ` Tejun Heo
0 siblings, 1 reply; 17+ messages in thread
From: Marc Bevand @ 2005-09-04 7:56 UTC (permalink / raw)
To: linux-ide
I gave a try to the new sata_sil24.ko module that recently appeared in
the libata development tree. I tested 3 branches which include 2 ver-
sions of this driver: sil24 as well as ALL (new 0.20 driver from Tejun
Heo) and sil24-original (old 0.10 driver from Silicon Image). I pulled
libata-dev.git on September 2nd.
The result is that only the v0.10 driver from Silicon Image is able to
identify disks plugged on a SiI3124 adapter while the new v0.20 driver
fails to do so. See below for details.
Tejun, or Jeff: do you think the issue in the v0.20 driver is related
to these changes about making ata_bus_probe() an ops or not ?
--oOo-- branch sil24:
I plugged a disk on the 2nd port of the adapter (ata10):
sata_sil24 version 0.20
ACPI: PCI Interrupt 0000:01:06.0[A] -> GSI 29 (level, low) -> IRQ 185
ata9: SATA max UDMA/100 cmd 0xFFFFC20000030000 ctl 0x0 bmdma 0x0 irq 185
ata10: SATA max UDMA/100 cmd 0xFFFFC20000032000 ctl 0x0 bmdma 0x0 irq 185
ata11: SATA max UDMA/100 cmd 0xFFFFC20000034000 ctl 0x0 bmdma 0x0 irq 185
ata12: SATA max UDMA/100 cmd 0xFFFFC20000036000 ctl 0x0 bmdma 0x0 irq 185
ata9: no device found (phy stat 00000000)
scsi8 : sata_sil24
ata10: dev 0 cfg 49:0000 82:0000 83:0000 84:0000 85:0000 86:0000 87:0000 88:0000
ata10: no dma/lba
ata10: dev 0 not supported, ignoring
scsi9 : sata_sil24
ata11: no device found (phy stat 00000000)
scsi10 : sata_sil24
ata12: no device found (phy stat 00000000)
scsi11 : sata_sil24
There is apparently an issue when trying to identify the device because
all words of the IDENTIFY reply contain NUL bytes (especially word 49,
which leads to "no dma/lba" and then "dev 0 not supported, ignoring").
--oOo-- branch ALL:
Exactly the same result than branch sil24:
sata_sil24 version 0.20
ACPI: PCI Interrupt 0000:01:06.0[A] -> GSI 29 (level, low) -> IRQ 185
ata9: SATA max UDMA/100 cmd 0xFFFFC20000030000 ctl 0x0 bmdma 0x0 irq 185
ata10: SATA max UDMA/100 cmd 0xFFFFC20000032000 ctl 0x0 bmdma 0x0 irq 185
ata11: SATA max UDMA/100 cmd 0xFFFFC20000034000 ctl 0x0 bmdma 0x0 irq 185
ata12: SATA max UDMA/100 cmd 0xFFFFC20000036000 ctl 0x0 bmdma 0x0 irq 185
ata9: no device found (phy stat 00000000)
scsi8 : sata_sil24
ata10: dev 0 cfg 49:0000 82:0000 83:0000 84:0000 85:0000 86:0000 87:0000 88:0000
ata10: no dma
ata10: dev 0 not supported, ignoring
scsi9 : sata_sil24
ata11: no device found (phy stat 00000000)
scsi10 : sata_sil24
ata12: no device found (phy stat 00000000)
scsi11 : sata_sil24
--oOo-- branch sil24-original:
This branch crashed my kernel. I understand that the driver contributed
by Silicon Image makes ata_bus_probe an ops, but it seems that not all
SATA drivers have been converted to use it. More particularly it happens
that I have to load sata_sil because I have other disks on another SATA
chip, and when loading it the kernel crashes in libata-core.c, function
ata_device_add(), on this line of code:
rc = host_set->ops->bus_probe(ap);
When loading sata_sil, bus_probe is a NULL pointer. So I have had to
change this line to something like:
if (host_set->ops->bus_probe)
rc = host_set->ops->bus_probe(ap);
else
rc = ata_bus_probe(ap);
This way I was able to load both sata_sil and sata_sil24. The good news
is that the sil24-original driver is able to correctly identify my disk
(still ata10):
sata_sil24 version 0.10
ACPI: PCI Interrupt 0000:01:06.0[A] -> GSI 29 (level, low) -> IRQ 201
sata_sil24: mmio_base0=ffffc200000e6c00 base_len (hex)=80
sata_sil24: mmio_base=ffffc20000490000 base_len (hex)=8000
sata_sil24: Found Port Ready
sata_sil24: sil_port_start allocating Scatter Table, PRBs hex=840
sata_sil24: sil_port_start virtual=ffff8100343fd000 physical=343fd000
ata9: SATA max UDMA/100 cmd 0xFFFFC20000490000 ctl 0xFFFFC2000049000A bmdma
0xFFFFC20000490000 irq 201
sata_sil24: sil_port_start allocating Scatter Table, PRBs hex=840
sata_sil24: sil_port_start virtual=ffff810033c05000 physical=33c05000
ata10: SATA max UDMA/100 cmd 0xFFFFC20000492000 ctl 0xFFFFC2000049200A bmdma
0xFFFFC20000490000 irq 201
sata_sil24: sil_port_start allocating Scatter Table, PRBs hex=840
sata_sil24: sil_port_start virtual=ffff81003397f000 physical=3397f000
ata11: SATA max UDMA/100 cmd 0xFFFFC20000494000 ctl 0xFFFFC2000049400A bmdma
0xFFFFC20000490000 irq 201
sata_sil24: sil_port_start allocating Scatter Table, PRBs hex=840
sata_sil24: sil_port_start virtual=ffff81003a6df000 physical=3a6df000
ata12: SATA max UDMA/100 cmd 0xFFFFC20000496000 ctl 0xFFFFC2000049600A bmdma
0xFFFFC20000490000 irq 201
ata9: no device found (phy stat 00000000)
scsi8 : sata_sil24
sata_sil24: bus_probe ap=ffff810035c81360 trying to identify dev=0
sata_sil24: sil_dev_identify speed=1
ata10: dev 0 cfg 49:2f00 82:346b 83:7d01 84:4003 85:3469 86:3c01 87:4003 88:007f
ata10: dev 0 ATA, max UDMA/133, 312581808 sectors: lba48
sata_sil24: bus_probe FOUND DEVICE
ata10: dev 0 configured for UDMA/100
scsi9 : sata_sil24
ata11: no device found (phy stat 00000000)
scsi10 : sata_sil24
ata12: no device found (phy stat 00000000)
scsi11 : sata_sil24
Vendor: ATA Model: ST3160023AS Rev: 3.18
Type: Direct-Access ANSI SCSI revision: 05
SCSI device sdc: 312581808 512-byte hdwr sectors (160042 MB)
SCSI device sdc: drive cache: write back
SCSI device sdc: 312581808 512-byte hdwr sectors (160042 MB)
SCSI device sdc: drive cache: write back
sdc: unknown partition table
Attached scsi disk sdc at scsi9, channel 0, id 0, lun 0
Attached scsi generic sg2 at scsi9, channel 0, id 0, lun 0, type 0
sata_sil24: found 4 Ports
--
Marc Bevand
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-04 7:56 [sata_sil24] v0.10 works, v0.20 doesn't Marc Bevand @ 2005-09-04 14:02 ` Tejun Heo 2005-09-05 1:07 ` Marc Bevand 0 siblings, 1 reply; 17+ messages in thread From: Tejun Heo @ 2005-09-04 14:02 UTC (permalink / raw) To: Marc Bevand; +Cc: linux-ide, Jeff Garzik [CC'ing Jeff] Hello, Marc. Weird, I can tell you that 0.2 driver works for at least two sil24 controllers - mine and Edward Falk's. Can you please apply the following patch to the current ALL head and post dmesg? diff --git a/drivers/scsi/sata_sil24.c b/drivers/scsi/sata_sil24.c --- a/drivers/scsi/sata_sil24.c +++ b/drivers/scsi/sata_sil24.c @@ -512,6 +512,16 @@ static inline void sil24_host_intr(struc slot_stat = readl(port + PORT_SLOT_STAT); if (!(slot_stat & HOST_SSTAT_ATTN)) { + u32 irq_stat, cmd_err, sstatus, serror; + + irq_stat = readl(port + PORT_IRQ_STAT); + cmd_err = readl(port + PORT_CMD_ERR); + sstatus = readl(port + PORT_SSTATUS); + serror = readl(port + PORT_SERROR); + DPRINTK(DRV_NAME " ata%u: normal interrupt on port%d\n" + " stat=0x%x irq=0x%x cmd_err=%d sstatus=0x%x serror=0x%x\n", + ap->id, ap->port_no, slot_stat, irq_stat, cmd_err, sstatus, serror); + if (qc) ata_qc_complete(qc, 0); } else diff --git a/include/linux/libata.h b/include/linux/libata.h --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -36,8 +36,8 @@ /* * compile-time options */ -#undef ATA_DEBUG /* debugging output */ -#undef ATA_VERBOSE_DEBUG /* yet more debugging output */ +#define ATA_DEBUG /* debugging output */ +#define ATA_VERBOSE_DEBUG /* yet more debugging output */ #undef ATA_IRQ_TRAP /* define to ack screaming irqs */ #undef ATA_NDEBUG /* define to disable quick runtime checks */ #undef ATA_ENABLE_ATAPI /* define to enable ATAPI support */ ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-04 14:02 ` Tejun Heo @ 2005-09-05 1:07 ` Marc Bevand 2005-09-05 4:18 ` Tejun Heo 0 siblings, 1 reply; 17+ messages in thread From: Marc Bevand @ 2005-09-05 1:07 UTC (permalink / raw) To: linux-ide Tejun Heo writes: > > Weird, I can tell you that 0.2 driver works for at least two sil24 > controllers - mine and Edward Falk's. Can you please apply the > following patch to the current ALL head and post dmesg? Done. But dmesg is quite large (240 kB), so here it is: http://epita.fr/~bevand_m/pub/sata_sil24.dmesg Notes: o This time 2 disks were plugged (ata19 and ata20, on ports 2 and 3). o I had to #undef ATA_VERBOSE_DEBUG in your patch else the kernel freezes when init(8) starts running all the initscripts, probably because too many messages are printk()ed on the console. Let me know if you _really_ need ATA_VERBOSE_DEBUG, I can try with a serial console. Here is the relevant part of dmesg, for ata19: ata_device_add: ata19: probe begin ata_dev_identify: ENTER, host 19, dev 0 ata_dev_identify: do ATA identify ata_sg_setup_one: mapped buffer of 512 bytes for read sil24_host_intr: sata_sil24 ata19: normal interrupt on port2 stat=0x0 irq=0xb00000 cmd_err=0 sstatus=0x113 serror=0x4050000 ata_sg_clean: unmapping 1 sg elements ata19: dev 0 cfg 49:0000 82:0000 83:0000 84:0000 85:0000 86:0000 87:0000 88:0000 ata19: no dma ata19: dev 0 not supported, ignoring ata_dev_identify: EXIT, err ata_dev_identify: ENTER/EXIT (host 19, dev 1) -- nodev ata_device_add: ata19: probe end There is definitely a problem when issuing the IDENTIFY DEVICE command. However I don't have any hardware doc so I can't interpert the "normal interrupt" log line. More information about my context: o My arch is x86_64, what is yours ? o The controller is using a SiI3124-2 chip (SATA 3.0 Gbps) not a SiI 3124-1 one (1.5 Gbps); does it matter ? o I am using the controller in a 64-bit 133 MHz PCI-X bus. o lspci output: $ lspci -vvs 1:6 0000:01:06.0 RAID bus controller: Silicon Image, Inc. (formerly CMD Technology Inc) SiI 3124 PCI-X Serial ATA Controller (rev 01) Subsystem: Silicon Image, Inc. (formerly CMD Technology Inc): Unknown device 6124 Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping+ SERR+ FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64 Interrupt: pin A routed to IRQ 193 Region 0: Memory at fc5ffc00 (64-bit, non-prefetchable) [size=128] Region 2: Memory at fc5f0000 (64-bit, non-prefetchable) [size=32K] Region 4: I/O ports at 8c00 [size=16] Expansion ROM at fc500000 [disabled] [size=512K] Capabilities: [64] Power Management version 2 Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [40] PCI-X non-bridge device. Command: DPERE- ERO+ RBC=0 OST=5 Status: Bus=0 Dev=0 Func=0 64bit- 133MHz- SCD- USC-, DC=simple, DMMRBC=0, DMOST=0, DMCRS=0, RSCEM- Capabilities: [54] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 -- Marc Bevand ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-05 1:07 ` Marc Bevand @ 2005-09-05 4:18 ` Tejun Heo 2005-09-05 4:22 ` Tejun Heo 2005-09-05 13:43 ` Marc Bevand 0 siblings, 2 replies; 17+ messages in thread From: Tejun Heo @ 2005-09-05 4:18 UTC (permalink / raw) To: Marc Bevand; +Cc: linux-ide Hello, Marc. Marc Bevand wrote: > Tejun Heo writes: > >> Weird, I can tell you that 0.2 driver works for at least two sil24 >>controllers - mine and Edward Falk's. Can you please apply the >>following patch to the current ALL head and post dmesg? > > > Done. But dmesg is quite large (240 kB), so here it is: > http://epita.fr/~bevand_m/pub/sata_sil24.dmesg > > Notes: > o This time 2 disks were plugged (ata19 and ata20, on ports 2 and 3). > o I had to #undef ATA_VERBOSE_DEBUG in your patch else the kernel freezes > when init(8) starts running all the initscripts, probably because too > many messages are printk()ed on the console. Let me know if you _really_ > need ATA_VERBOSE_DEBUG, I can try with a serial console. Nope, ATA_DEBUG is enough. > Here is the relevant part of dmesg, for ata19: > > ata_device_add: ata19: probe begin > ata_dev_identify: ENTER, host 19, dev 0 > ata_dev_identify: do ATA identify > ata_sg_setup_one: mapped buffer of 512 bytes for read > sil24_host_intr: sata_sil24 ata19: normal interrupt on port2 > stat=0x0 irq=0xb00000 cmd_err=0 sstatus=0x113 serror=0x4050000 > ata_sg_clean: unmapping 1 sg elements > ata19: dev 0 cfg 49:0000 82:0000 83:0000 84:0000 85:0000 86:0000 87:0000 88:0000 > ata19: no dma > ata19: dev 0 not supported, ignoring > ata_dev_identify: EXIT, err > ata_dev_identify: ENTER/EXIT (host 19, dev 1) -- nodev > ata_device_add: ata19: probe end > > There is definitely a problem when issuing the IDENTIFY DEVICE command. > However I don't have any hardware doc so I can't interpert the "normal > interrupt" log line. I don't have hw doc either but the line looks fine compared to my working output. > More information about my context: > o My arch is x86_64, what is yours ? Tested both on x86 and EM64T. > o The controller is using a SiI3124-2 chip (SATA 3.0 Gbps) not a > SiI 3124-1 one (1.5 Gbps); does it matter ? Mine is a 3.0G chip, too. > o I am using the controller in a 64-bit 133 MHz PCI-X bus. Mine is hanging off regular PCI slot. > o lspci output: > $ lspci -vvs 1:6 > 0000:01:06.0 RAID bus controller: Silicon Image, Inc. (formerly CMD Technology > Inc) SiI 3124 PCI-X Serial ATA Controller (rev 01) > Subsystem: Silicon Image, Inc. (formerly CMD Technology Inc): Unknown > device 6124 > Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- > Stepping+ SERR+ FastB2B- > Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- > <TAbort- <MAbort- >SERR- <PERR- > Latency: 64 > Interrupt: pin A routed to IRQ 193 > Region 0: Memory at fc5ffc00 (64-bit, non-prefetchable) [size=128] > Region 2: Memory at fc5f0000 (64-bit, non-prefetchable) [size=32K] > Region 4: I/O ports at 8c00 [size=16] > Expansion ROM at fc500000 [disabled] [size=512K] > Capabilities: [64] Power Management version 2 > Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA > PME(D0-,D1-,D2-,D3hot-,D3cold-) > Status: D0 PME-Enable- DSel=0 DScale=1 PME- > Capabilities: [40] PCI-X non-bridge device. > Command: DPERE- ERO+ RBC=0 OST=5 > Status: Bus=0 Dev=0 Func=0 64bit- 133MHz- SCD- USC-, DC=simple, > DMMRBC=0, DMOST=0, DMCRS=0, RSCEM- Capabilities: [54] Message Signalled > Interrupts: 64bit+ Queue=0/0 Enable- > Address: 0000000000000000 Data: 0000 > Okay, it seems that command is normally issued and completed. My primary suspicion now is regarding memory IO mapping. - How much memory do you have on the system? - Can you try to boot with iommu=off kernel parameter? - Can you try to boot with x86 kernel? Thanks. -- tejun ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-05 4:18 ` Tejun Heo @ 2005-09-05 4:22 ` Tejun Heo 2005-09-05 13:43 ` Marc Bevand 1 sibling, 0 replies; 17+ messages in thread From: Tejun Heo @ 2005-09-05 4:22 UTC (permalink / raw) To: Tejun Heo; +Cc: Marc Bevand, linux-ide Tejun Heo wrote: > Okay, it seems that command is normally issued and completed. My > primary suspicion now is regarding memory IO mapping. > > - How much memory do you have on the system? > - Can you try to boot with iommu=off kernel parameter? Please try iommu=soft instead of off. Sorry. > - Can you try to boot with x86 kernel? > > Thanks. > -- tejun ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-05 4:18 ` Tejun Heo 2005-09-05 4:22 ` Tejun Heo @ 2005-09-05 13:43 ` Marc Bevand 2005-09-05 23:02 ` Tejun Heo 1 sibling, 1 reply; 17+ messages in thread From: Marc Bevand @ 2005-09-05 13:43 UTC (permalink / raw) To: Tejun Heo; +Cc: linux-ide Tejun Heo wrote: | | >o I am using the controller in a 64-bit 133 MHz PCI-X bus. | | Mine is hanging off regular PCI slot. I just tried to use a PCI slot instead of a PCI-X one. It does not change anything. | Okay, it seems that command is normally issued and completed. My | primary suspicion now is regarding memory IO mapping. | | - How much memory do you have on the system? My system is a dual-Opteron, with 1 GB (attached to the first CPU, no RAM on the 2nd CPU). I tried to boot with numa=off, nothing changes. | - Can you try to boot with iommu=off kernel parameter? I tried iommu=soft (what you told me in your 2nd reply). Nothing changes. | - Can you try to boot with x86 kernel? I will try it ASAP (right now I only have a pure 64-bit system). Since the current sil24-original head, which is the only kernel detecting my disks, is really close to a vanilla 2.6.12-rc5 kernel, I have back- ported the first version of your rewritten sata_sil24 driver to 2.6.12-rc5, and I am currently testing/examining each patch separating sil24-original current from 2.6.12-rc5, hoping to find the one that breaks my system. Another thing: just to be sure, did you notice that the driver from the sil24 head prints: ata9: SATA max UDMA/100 cmd 0xFFFFC20000030000 ctl 0x0 bmdma 0x0 irq 185 while the driver from the sil24-original head prints: ata9: SATA max UDMA/100 cmd 0xFFFFC20000490000 ctl 0xFFFFC2000049000A bmdma 0xFFFFC20000490000 irq 201 'ctl' and 'bmdma' are 0x0 in the first case, is it normal ? -- Marc Bevand http://epita.fr/~bevand_m Computer Science School EPITA - System, Network and Security Dept. ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-05 13:43 ` Marc Bevand @ 2005-09-05 23:02 ` Tejun Heo 2005-09-05 23:17 ` Tejun Heo 0 siblings, 1 reply; 17+ messages in thread From: Tejun Heo @ 2005-09-05 23:02 UTC (permalink / raw) To: Marc Bevand; +Cc: linux-ide Hi, Marc. On Mon, Sep 05, 2005 at 03:43:11PM +0200, Marc Bevand wrote: > Tejun Heo wrote: > | > | >o I am using the controller in a 64-bit 133 MHz PCI-X bus. > | > | Mine is hanging off regular PCI slot. > > I just tried to use a PCI slot instead of a PCI-X one. It does not > change anything. > > | Okay, it seems that command is normally issued and completed. My > | primary suspicion now is regarding memory IO mapping. > | > | - How much memory do you have on the system? > > My system is a dual-Opteron, with 1 GB (attached to the first CPU, > no RAM on the 2nd CPU). I tried to boot with numa=off, nothing changes. > > | - Can you try to boot with iommu=off kernel parameter? > > I tried iommu=soft (what you told me in your 2nd reply). > Nothing changes. My incorrect guess was that your system has > 4GB memory and iommu was screwed up somehow because new sil24 driver currently sets DMA memory mask to 32bit while original one sets it to 64bit making new sil24 use iommu for memories > 4GB unlike the original one. > | - Can you try to boot with x86 kernel? > > I will try it ASAP (right now I only have a pure 64-bit system). I was suggesting this for about the same reason, so this won't make much difference either, I think. Trying this would be nice anyway to eliminate a possibility. You don't have to install 32bit userland. Just cross-compile 32bit kernel and boot it. System will fail to enter userland but all we need to see is libata probing outputs. I use the following scripts for cross compiling for x86 from x86-64. x86-64 compiler and binutils support x86 binaries out of the box and only some flags are needed. $ cat i386-make #!/bin/bash exec make ARCH=i386 CROSS_COMPILE=i386-linux- "$@" $ cat i386-linux-ar #!/bin/bash exec ar "$@" [tj@htj:~/bin]$ cat i386-linux-as #!/bin/bash exec as --32 "$@" [tj@htj:~/bin]$ cat i386-linux-gcc #!/bin/bash exec gcc -m32 "$@" [tj@htj:~/bin]$ cat i386-linux-ld #!/bin/bash exec ld -melf_i386 "$@" [tj@htj:~/bin]$ cat i386-linux-nm #!/bin/bash exec nm "$@" [tj@htj:~/bin]$ cat i386-linux-objcopy #!/bin/bash exec objcopy "$@" [tj@htj:~/bin]$ cat i386-linux-ar #!/bin/bash exec ar "$@" [tj@htj:~/bin]$ cat i386-linux-objdump #!/bin/bash exec objdump "$@" [tj@htj:~/bin]$ cat i386-linux-strip #!/bin/bash exec strip "$@" > Since the current sil24-original head, which is the only kernel detecting > my disks, is really close to a vanilla 2.6.12-rc5 kernel, I have back- > ported the first version of your rewritten sata_sil24 driver to 2.6.12-rc5, > and I am currently testing/examining each patch separating sil24-original > current from 2.6.12-rc5, hoping to find the one that breaks my system. > > Another thing: just to be sure, did you notice that the driver from the > sil24 head prints: > ata9: SATA max UDMA/100 cmd 0xFFFFC20000030000 ctl 0x0 bmdma 0x0 irq 185 > while the driver from the sil24-original head prints: > ata9: SATA max UDMA/100 cmd 0xFFFFC20000490000 ctl 0xFFFFC2000049000A bmdma 0xFFFFC20000490000 irq 201 > 'ctl' and 'bmdma' are 0x0 in the first case, is it normal ? Yes, those are normal. Those registers are never used / properly supported by sil24 and the original driver just initialized them with meaningless values. Thanks. -- tejun ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-05 23:02 ` Tejun Heo @ 2005-09-05 23:17 ` Tejun Heo 2005-09-06 1:12 ` Marc Bevand 0 siblings, 1 reply; 17+ messages in thread From: Tejun Heo @ 2005-09-05 23:17 UTC (permalink / raw) To: Marc Bevand; +Cc: linux-ide Hello, Marc. To eliminate one more possibility, can you please try the following patch? diff --git a/drivers/scsi/sata_sil24.c b/drivers/scsi/sata_sil24.c --- a/drivers/scsi/sata_sil24.c +++ b/drivers/scsi/sata_sil24.c @@ -720,6 +720,8 @@ static int sil24_init_one(struct pci_dev pci_name(pdev)); } + writel(0x0300, port + PORT_SCONTROL); + /* Zero error counters. */ writel(0x8000, port + PORT_DECODE_ERR_THRESH); writel(0x8000, port + PORT_CRC_ERR_THRESH); diff --git a/include/linux/libata.h b/include/linux/libata.h ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-05 23:17 ` Tejun Heo @ 2005-09-06 1:12 ` Marc Bevand 2005-09-06 1:54 ` Tejun Heo 0 siblings, 1 reply; 17+ messages in thread From: Marc Bevand @ 2005-09-06 1:12 UTC (permalink / raw) To: Tejun Heo; +Cc: linux-ide Tejun Heo wrote: | Hello, Marc. | | To eliminate one more possibility, can you please try the following | patch? | | diff --git a/drivers/scsi/sata_sil24.c b/drivers/scsi/sata_sil24.c | --- a/drivers/scsi/sata_sil24.c | +++ b/drivers/scsi/sata_sil24.c | @@ -720,6 +720,8 @@ static int sil24_init_one(struct pci_dev | pci_name(pdev)); | } | | + writel(0x0300, port + PORT_SCONTROL); | + | /* Zero error counters. */ | writel(0x8000, port + PORT_DECODE_ERR_THRESH); | writel(0x8000, port + PORT_CRC_ERR_THRESH); I tried that. No changes. | diff --git a/include/linux/libata.h b/include/linux/libata.h It looks like your patch has been truncated: what did you want to modify in libata.h ? PS: I am going to test a 32-bit kernel later in the day. -- Marc Bevand http://epita.fr/~bevand_m Computer Science School EPITA - System, Network and Security Dept. ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-06 1:12 ` Marc Bevand @ 2005-09-06 1:54 ` Tejun Heo 2005-09-06 9:36 ` Marc Bevand 0 siblings, 1 reply; 17+ messages in thread From: Tejun Heo @ 2005-09-06 1:54 UTC (permalink / raw) To: Marc Bevand; +Cc: linux-ide On Tue, Sep 06, 2005 at 03:12:54AM +0200, Marc Bevand wrote: > Tejun Heo wrote: > | Hello, Marc. > | > | To eliminate one more possibility, can you please try the following > | patch? > | > | diff --git a/drivers/scsi/sata_sil24.c b/drivers/scsi/sata_sil24.c > | --- a/drivers/scsi/sata_sil24.c > | +++ b/drivers/scsi/sata_sil24.c > | @@ -720,6 +720,8 @@ static int sil24_init_one(struct pci_dev > | pci_name(pdev)); > | } > | > | + writel(0x0300, port + PORT_SCONTROL); > | + > | /* Zero error counters. */ > | writel(0x8000, port + PORT_DECODE_ERR_THRESH); > | writel(0x8000, port + PORT_CRC_ERR_THRESH); > > I tried that. No changes. > > | diff --git a/include/linux/libata.h b/include/linux/libata.h > > It looks like your patch has been truncated: what did you want > to modify in libata.h ? Nothing. Only timestamp has changed and 'git diff' still ran diff on it, so the empty diff for libata.h. > PS: I am going to test a 32-bit kernel later in the day. I'll backport new sil24 to sil24-original tree so that we can eliminate all other factors and compare two drivers again to find the offending difference. I'm currently in the middle of something so it may take me a day or so. Thanks. -- tejun ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-06 1:54 ` Tejun Heo @ 2005-09-06 9:36 ` Marc Bevand 2005-09-07 1:39 ` Tejun Heo 0 siblings, 1 reply; 17+ messages in thread From: Marc Bevand @ 2005-09-06 9:36 UTC (permalink / raw) To: Tejun Heo; +Cc: linux-ide Hello Tejun, Tejun Heo wrote: | I'll backport new sil24 to sil24-original tree so that we can | eliminate all other factors and compare two drivers again to find the | offending difference. I'm currently in the middle of something so it | may take me a day or so. Ok. By the way, I tried a 32-bit kernel (libata-dev.git current, ALL branch). Here is what it gives (dmesg hand-recopied [2]): ata1: SATA max UDMA/100 cmd 0xF8820000 ctl 0x0 bmdma 0x0 irq 169 ata2: SATA max UDMA/100 cmd 0xF8822000 ctl 0x0 bmdma 0x0 irq 169 ata3: SATA max UDMA/100 cmd 0xF8824000 ctl 0x0 bmdma 0x0 irq 169 ata4: SATA max UDMA/100 cmd 0xF8826000 ctl 0x0 bmdma 0x0 irq 169 ata1: no device found (phy stat 00000000) scsi0 : sata_sil24 ata2: no device found (phy stat 00000000) scsi1 : sata_sil24 ata3: dev 0 not supported, ignoring scsi2 : sata_sil24 ata4: dev 0 not supported, ignoring scsi3 : sata_sil24 The disks are still not recognized. But the line [1] that usually displays the most important words of the IDENTIFY DEVICE reply is not present. This is interesting because it is probably a clue that an early error is occuring somewhere before the IDENTIFY DEVICE reply is received. I immediately did another test with ATA_DEBUG enabled (dmesg still hand-recopied [2]): ata_device_add: ata1: probe begin ata1: no device found (phy stat 00000000) ata_device_add: ata1: probe end scsi0 : sata_sil24 ata_device_add: ata2: probe begin ata2: no device found (phy stat 00000000) ata_device_add: ata2: probe end scsi1 : sata_sil24 ata_device_add: ata3: probe begin ata_dev_identify: ENTER, host 3, dev 0 ata_dev_identify: do ATA identify ata_sg_setup_one: mapped buffer of 512 bytes for read ata_sg_clean: unmapping 1 sg elements ata3: dev 0 not supported, ignoring ata_dev_identify: EXIT, err ata_dev_identify: ENTER/EXIT (host 3, dev 1) -- nodev ata_device_add: ata3: probe end scsi2 : sata_sil24 [... skipped the part for ata4 (similar to ata3) ...] ata_device_add: probe begin ata_scsi_dump_cdb: CDB (1:0,0,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,1,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,2,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,3,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,4,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,5,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,6,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,7,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,8,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,9,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,10,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,11,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,12,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,13,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,14,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:0,15,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,0,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,1,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,2,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,3,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,4,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,5,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,6,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,7,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,8,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,9,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,10,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,11,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,12,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,13,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,14,0) 12 00 00 00 24 00 00 00 00 ata_scsi_dump_cdb: CDB (1:1,15,0) 12 00 00 00 24 00 00 00 00 [... then the above block composed of 32 "CDB" lines was basically replicated 3 more times like: ata_scsi_dump_cdb: CDB (2:x,y,z) 12 00 00 00 24 00 00 00 00 ... ata_scsi_dump_cdb: CDB (3:x,y,z) 12 00 00 00 24 00 00 00 00 ... ata_scsi_dump_cdb: CDB (4:x,y,z) 12 00 00 00 24 00 00 00 00 ... I paid attention to the "12 00 00 00 24 00 00 00 00" bytes, they never change ...] I lack the knowledge to fully interpret this dmesg correctly, but at least I know I need to direct my investigations toward ata_dev_identify(). That is what is on my TODO list for tomorrow... [1] ataX: dev Y cfg 49:0000 82:0000 83:0000 84:0000 85:0000 86:0000 [...] [2] Yes I know, next time I will use a serial console -- Marc Bevand http://epita.fr/~bevand_m Computer Science School EPITA - System, Network and Security Dept. ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-06 9:36 ` Marc Bevand @ 2005-09-07 1:39 ` Tejun Heo 2005-09-07 9:37 ` Marc Bevand 0 siblings, 1 reply; 17+ messages in thread From: Tejun Heo @ 2005-09-07 1:39 UTC (permalink / raw) To: Marc Bevand; +Cc: linux-ide Hello, Marc. On Tue, Sep 06, 2005 at 11:36:59AM +0200, Marc Bevand wrote: > Hello Tejun, > > Tejun Heo wrote: > | I'll backport new sil24 to sil24-original tree so that we can > | eliminate all other factors and compare two drivers again to find the > | offending difference. I'm currently in the middle of something so it > | may take me a day or so. > > Ok. > > By the way, I tried a 32-bit kernel (libata-dev.git current, ALL branch). > Here is what it gives (dmesg hand-recopied [2]): > > ata1: SATA max UDMA/100 cmd 0xF8820000 ctl 0x0 bmdma 0x0 irq 169 > ata2: SATA max UDMA/100 cmd 0xF8822000 ctl 0x0 bmdma 0x0 irq 169 > ata3: SATA max UDMA/100 cmd 0xF8824000 ctl 0x0 bmdma 0x0 irq 169 > ata4: SATA max UDMA/100 cmd 0xF8826000 ctl 0x0 bmdma 0x0 irq 169 > ata1: no device found (phy stat 00000000) > scsi0 : sata_sil24 > ata2: no device found (phy stat 00000000) > scsi1 : sata_sil24 > ata3: dev 0 not supported, ignoring > scsi2 : sata_sil24 > ata4: dev 0 not supported, ignoring > scsi3 : sata_sil24 > > The disks are still not recognized. But the line [1] that usually displays > the most important words of the IDENTIFY DEVICE reply is not present. This > is interesting because it is probably a clue that an early error is occuring > somewhere before the IDENTIFY DEVICE reply is received. I immediately did > another test with ATA_DEBUG enabled (dmesg still hand-recopied [2]): That's because you set console level not to print DEBUG messages. There's no path which skips message [1] but prints 'not supported' message. > > I lack the knowledge to fully interpret this dmesg correctly, but at least > I know I need to direct my investigations toward ata_dev_identify(). That > is what is on my TODO list for tomorrow... I believe the problem is that although the controller issues commands to the device and raises interrupt on completion, it doesn't fill in any data in the buffer we passed to it. I don't know the reason but that's the symptom. Probably I screwed up during controller initialization or something. > [1] ataX: dev Y cfg 49:0000 82:0000 83:0000 84:0000 85:0000 86:0000 [...] > [2] Yes I know, next time I will use a serial console I really admire your patience for being able to report like you do with hand copying. Here's a big patch against sil24-original branch. It contains the followings. a. build fix & oops fix for sil24-original branch b. backported sata_sil24_new driver c. debug messages (you don't need to turn on ATA_DEBUG) d. 50ms sleep after completion of IDENTIFY before actually reading data Building both sata_sil24 and sata_sil24_new as modules and loading/unloading them work on my machine. Can you please try this and let me know how it goes? Thanks. diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig --- a/drivers/scsi/Kconfig +++ b/drivers/scsi/Kconfig @@ -489,6 +489,14 @@ config SCSI_SATA_SIL24 If unsure, say N. +config SCSI_SATA_SIL24_NEW + tristate "Silicon Image 3124 SATA support [new driver]" + depends on SCSI_SATA && PCI && EXPERIMENTAL + help + This option enables support for Silicon Image 3124 Serial ATA. + + If unsure, say N. + config SCSI_SATA_SIS tristate "SiS 964/180 SATA support" depends on SCSI_SATA && PCI && EXPERIMENTAL diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile --- a/drivers/scsi/Makefile +++ b/drivers/scsi/Makefile @@ -129,6 +129,7 @@ obj-$(CONFIG_SCSI_SATA_PROMISE) += libat obj-$(CONFIG_SCSI_SATA_QSTOR) += libata.o sata_qstor.o obj-$(CONFIG_SCSI_SATA_SIL) += libata.o sata_sil.o obj-$(CONFIG_SCSI_SATA_SIL24) += libata.o sata_sil24.o +obj-$(CONFIG_SCSI_SATA_SIL24_NEW) += libata.o sata_sil24_new.o obj-$(CONFIG_SCSI_SATA_VIA) += libata.o sata_via.o obj-$(CONFIG_SCSI_SATA_VITESSE) += libata.o sata_vsc.o obj-$(CONFIG_SCSI_SATA_SIS) += libata.o sata_sis.o diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c --- a/drivers/scsi/libata-core.c +++ b/drivers/scsi/libata-core.c @@ -49,6 +49,8 @@ #include "libata.h" +#define pd(fmt, args...) printk(KERN_ERR "[%-21s]: " fmt, __FUNCTION__ , ##args) + static unsigned int ata_busy_sleep (struct ata_port *ap, unsigned long tmout_pat, unsigned long tmout); @@ -1181,6 +1183,7 @@ retry: qc->waiting = &wait; qc->complete_fn = ata_qc_complete_noop; + pd("issuing 0x%x, dev->id is at %p\n", qc->tf.command, dev->id); spin_lock_irqsave(&ap->host_set->lock, flags); rc = ata_qc_issue(qc); spin_unlock_irqrestore(&ap->host_set->lock, flags); @@ -1219,6 +1222,16 @@ retry: swap_buf_le16(dev->id, ATA_ID_WORDS); + pd("Command successfully completed, sleeping 50ms\n"); + msleep(50); + + pd("Dumping ID\n"); + for (i = 0; i < 32; i++) { + u16 *p = dev->id + 8 * i; + pd("[%03d] %04x %04x %04x %04x %04x %04x %04x %04x\n", + 8 * i, p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]); + } + /* print device capabilities */ printk(KERN_DEBUG "ata%u: dev %u cfg " "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n", @@ -1576,7 +1589,7 @@ static void ata_host_set_dma(struct ata_ * PCI/etc. bus probe sem. * */ -static void ata_set_mode(struct ata_port *ap) +void ata_set_mode(struct ata_port *ap) { unsigned int i, xfer_shift; u8 xfer_mode; @@ -3912,7 +3925,10 @@ int ata_device_add(struct ata_probe_ent DPRINTK("ata%u: probe begin\n", ap->id); /* @@ Silicon Image */ /* old rc = ata_bus_probe(ap); */ - rc = host_set->ops->bus_probe(ap); + if (host_set->ops->bus_probe) + rc = host_set->ops->bus_probe(ap); + else + rc = ata_bus_probe(ap); DPRINTK("ata%u: probe end\n", ap->id); if (rc) { diff --git a/drivers/scsi/sata_sil24.c b/drivers/scsi/sata_sil24.c --- a/drivers/scsi/sata_sil24.c +++ b/drivers/scsi/sata_sil24.c @@ -383,7 +383,7 @@ inline void sil_dump_memory(int *p, int #endif /* SIL_DEBUG */ -void swap_buf_le16(u16 *buf, unsigned int buf_words) +static void swap_buf_le16(u16 *buf, unsigned int buf_words) { #ifdef __BIG_ENDIAN unsigned int i; diff --git a/drivers/scsi/sata_sil24_new.c b/drivers/scsi/sata_sil24_new.c new file mode 100644 --- /dev/null +++ b/drivers/scsi/sata_sil24_new.c @@ -0,0 +1,790 @@ +/* + * sata_sil24.c - Driver for Silicon Image 3124/3132 SATA-2 controllers + * + * Copyright 2005 Tejun Heo + * + * Based on preview driver from Silicon Image. + * + * NOTE: No NCQ/ATAPI support yet. The preview driver didn't support + * NCQ nor ATAPI, and, unfortunately, I couldn't find out how to make + * those work. Enabling those shouldn't be difficult. Basic + * structure is all there (in libata-dev tree). If you have any + * information about this hardware, please contact me or linux-ide. + * Info is needed on... + * + * - How to issue tagged commands and turn on sactive on issue accordingly. + * - Where to put an ATAPI command and how to tell the device to send it. + * - How to enable/use 64bit. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2, or (at your option) any + * later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/pci.h> +#include <linux/blkdev.h> +#include <linux/delay.h> +#include <linux/interrupt.h> +#include <linux/dma-mapping.h> +#include <scsi/scsi_host.h> +#include "scsi.h" +#include <linux/libata.h> +#include <asm/io.h> + +#define pd(fmt, args...) printk(KERN_ERR "[%-21s]: " fmt, __FUNCTION__ , ##args) + +#define DRV_NAME "sata_sil24" +#define DRV_VERSION "0.20" /* Silicon Image's preview driver was 0.10 */ + +#define NR_PORTS 4 + +/* + * Port request block (PRB) 32 bytes + */ +struct sil24_prb { + u16 ctrl; + u16 prot; + u32 rx_cnt; + u8 fis[6 * 4]; +}; + +/* + * Scatter gather entry (SGE) 16 bytes + */ +struct sil24_sge { + u64 addr; + u32 cnt; + u32 flags; +}; + +/* + * Port multiplier + */ +struct sil24_port_multiplier { + u32 diag; + u32 sactive; +}; + +enum { + /* + * Global controller registers (128 bytes @ BAR0) + */ + /* 32 bit regs */ + HOST_SLOT_STAT = 0x00, /* 32 bit slot stat * 4 */ + HOST_CTRL = 0x40, + HOST_IRQ_STAT = 0x44, + HOST_PHY_CFG = 0x48, + HOST_BIST_CTRL = 0x50, + HOST_BIST_PTRN = 0x54, + HOST_BIST_STAT = 0x58, + HOST_MEM_BIST_STAT = 0x5c, + HOST_FLASH_CMD = 0x70, + /* 8 bit regs */ + HOST_FLASH_DATA = 0x74, + HOST_TRANSITION_DETECT = 0x75, + HOST_GPIO_CTRL = 0x76, + HOST_I2C_ADDR = 0x78, /* 32 bit */ + HOST_I2C_DATA = 0x7c, + HOST_I2C_XFER_CNT = 0x7e, + HOST_I2C_CTRL = 0x7f, + + /* HOST_SLOT_STAT bits */ + HOST_SSTAT_ATTN = (1 << 31), + + /* + * Port registers + * (8192 bytes @ +0x0000, +0x2000, +0x4000 and +0x6000 @ BAR2) + */ + PORT_REGS_SIZE = 0x2000, + PORT_PRB = 0x0000, /* (32 bytes PRB + 16 bytes SGEs * 6) * 31 (3968 bytes) */ + + PORT_PM = 0x0f80, /* 8 bytes PM * 16 (128 bytes) */ + /* 32 bit regs */ + PORT_CTRL_STAT = 0x1000, /* write: ctrl-set, read: stat */ + PORT_CTRL_CLR = 0x1004, /* write: ctrl-clear */ + PORT_IRQ_STAT = 0x1008, /* high: status, low: interrupt */ + PORT_IRQ_ENABLE_SET = 0x1010, /* write: enable-set */ + PORT_IRQ_ENABLE_CLR = 0x1014, /* write: enable-clear */ + PORT_ACTIVATE_UPPER_ADDR= 0x101c, + PORT_EXEC_FIFO = 0x1020, /* command execution fifo */ + PORT_CMD_ERR = 0x1024, /* command error number */ + PORT_FIS_CFG = 0x1028, + PORT_FIFO_THRES = 0x102c, + /* 16 bit regs */ + PORT_DECODE_ERR_CNT = 0x1040, + PORT_DECODE_ERR_THRESH = 0x1042, + PORT_CRC_ERR_CNT = 0x1044, + PORT_CRC_ERR_THRESH = 0x1046, + PORT_HSHK_ERR_CNT = 0x1048, + PORT_HSHK_ERR_THRESH = 0x104a, + /* 32 bit regs */ + PORT_PHY_CFG = 0x1050, + PORT_SLOT_STAT = 0x1800, + PORT_CMD_ACTIVATE = 0x1c00, /* 64 bit cmd activate * 31 (248 bytes) */ + PORT_EXEC_DIAG = 0x1e00, /* 32bit exec diag * 16 (64 bytes, 0-10 used on 3124) */ + PORT_PSD_DIAG = 0x1e40, /* 32bit psd diag * 16 (64 bytes, 0-8 used on 3124) */ + PORT_SCONTROL = 0x1f00, + PORT_SSTATUS = 0x1f04, + PORT_SERROR = 0x1f08, + PORT_SACTIVE = 0x1f0c, + + /* PORT_CTRL_STAT bits */ + PORT_CS_PORT_RST = (1 << 0), /* port reset */ + PORT_CS_DEV_RST = (1 << 1), /* device reset */ + PORT_CS_INIT = (1 << 2), /* port initialize */ + PORT_CS_IRQ_WOC = (1 << 3), /* interrupt write one to clear */ + PORT_CS_RESUME = (1 << 6), /* port resume */ + PORT_CS_32BIT_ACTV = (1 << 10), /* 32-bit activation */ + PORT_CS_PM_EN = (1 << 13), /* port multiplier enable */ + PORT_CS_RDY = (1 << 31), /* port ready to accept commands */ + + /* PORT_IRQ_STAT/ENABLE_SET/CLR */ + /* bits[11:0] are masked */ + PORT_IRQ_COMPLETE = (1 << 0), /* command(s) completed */ + PORT_IRQ_ERROR = (1 << 1), /* command execution error */ + PORT_IRQ_PORTRDY_CHG = (1 << 2), /* port ready change */ + PORT_IRQ_PWR_CHG = (1 << 3), /* power management change */ + PORT_IRQ_PHYRDY_CHG = (1 << 4), /* PHY ready change */ + PORT_IRQ_COMWAKE = (1 << 5), /* COMWAKE received */ + PORT_IRQ_UNK_FIS = (1 << 6), /* Unknown FIS received */ + PORT_IRQ_SDB_FIS = (1 << 11), /* SDB FIS received */ + + /* bits[27:16] are unmasked (raw) */ + PORT_IRQ_RAW_SHIFT = 16, + PORT_IRQ_MASKED_MASK = 0x7ff, + PORT_IRQ_RAW_MASK = (0x7ff << PORT_IRQ_RAW_SHIFT), + + /* ENABLE_SET/CLR specific, intr steering - 2 bit field */ + PORT_IRQ_STEER_SHIFT = 30, + PORT_IRQ_STEER_MASK = (3 << PORT_IRQ_STEER_SHIFT), + + /* PORT_CMD_ERR constants */ + PORT_CERR_DEV = 1, /* Error bit in D2H Register FIS */ + PORT_CERR_SDB = 2, /* Error bit in SDB FIS */ + PORT_CERR_DATA = 3, /* Error in data FIS not detected by dev */ + PORT_CERR_SEND = 4, /* Initial cmd FIS transmission failure */ + PORT_CERR_INCONSISTENT = 5, /* Protocol mismatch */ + PORT_CERR_DIRECTION = 6, /* Data direction mismatch */ + PORT_CERR_UNDERRUN = 7, /* Ran out of SGEs while writing */ + PORT_CERR_OVERRUN = 8, /* Ran out of SGEs while reading */ + PORT_CERR_PKT_PROT = 11, /* DIR invalid in 1st PIO setup of ATAPI */ + PORT_CERR_SGT_BOUNDARY = 16, /* PLD ecode 00 - SGT not on qword boundary */ + PORT_CERR_SGT_TGTABRT = 17, /* PLD ecode 01 - target abort */ + PORT_CERR_SGT_MSTABRT = 18, /* PLD ecode 10 - master abort */ + PORT_CERR_SGT_PCIPERR = 19, /* PLD ecode 11 - PCI parity err while fetching SGT */ + PORT_CERR_CMD_BOUNDARY = 24, /* ctrl[15:13] 001 - PRB not on qword boundary */ + PORT_CERR_CMD_TGTABRT = 25, /* ctrl[15:13] 010 - target abort */ + PORT_CERR_CMD_MSTABRT = 26, /* ctrl[15:13] 100 - master abort */ + PORT_CERR_CMD_PCIPERR = 27, /* ctrl[15:13] 110 - PCI parity err while fetching PRB */ + PORT_CERR_XFR_UNDEF = 32, /* PSD ecode 00 - undefined */ + PORT_CERR_XFR_TGTABRT = 33, /* PSD ecode 01 - target abort */ + PORT_CERR_XFR_MSGABRT = 34, /* PSD ecode 10 - master abort */ + PORT_CERR_XFR_PCIPERR = 35, /* PSD ecode 11 - PCI prity err during transfer */ + PORT_CERR_SENDSERVICE = 36, /* FIS received while sending service */ + + /* + * Other constants + */ + SGE_TRM = (1 << 31), /* Last SGE in chain */ + PRB_SOFT_RST = (1 << 7), /* Soft reset request (ign BSY?) */ + + /* board id */ + BID_SIL3124 = 0, + BID_SIL3132 = 1, + + IRQ_STAT_4PORTS = 0xf, +}; + +struct sil24_cmd_block { + struct sil24_prb prb; + struct sil24_sge sge[LIBATA_MAX_PRD]; +}; + +/* + * ap->private_data + * + * The preview driver always returned 0 for status. We emulate it + * here from the previous interrupt. + */ +struct sil24_port_priv { + struct sil24_cmd_block *cmd_block; /* 32 cmd blocks */ + dma_addr_t cmd_block_dma; /* DMA base addr for them */ +}; + +/* ap->host_set->private_data */ +struct sil24_host_priv { + void *host_base; /* global controller control (128 bytes @BAR0) */ + void *port_base; /* port registers (4 * 8192 bytes @BAR2) */ +}; + +static u8 sil24_check_status(struct ata_port *ap); +static u8 sil24_check_err(struct ata_port *ap); +static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg); +static void sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val); +static void sil24_phy_reset(struct ata_port *ap); +static void sil24_qc_prep(struct ata_queued_cmd *qc); +static int sil24_qc_issue(struct ata_queued_cmd *qc); +static void sil24_irq_clear(struct ata_port *ap); +static void sil24_eng_timeout(struct ata_port *ap); +static irqreturn_t sil24_interrupt(int irq, void *dev_instance, struct pt_regs *regs); +static int sil24_port_start(struct ata_port *ap); +static void sil24_port_stop(struct ata_port *ap); +static void sil24_host_stop(struct ata_host_set *host_set); +static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); + +static struct pci_device_id sil24_pci_tbl[] = { + { 0x1095, 0x3124, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BID_SIL3124 }, + { 0x1095, 0x3132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BID_SIL3132 }, +}; + +static struct pci_driver sil24_pci_driver = { + .name = DRV_NAME, + .id_table = sil24_pci_tbl, + .probe = sil24_init_one, + .remove = ata_pci_remove_one, /* safe? */ +}; + +static Scsi_Host_Template sil24_sht = { + .module = THIS_MODULE, + .name = DRV_NAME, + .ioctl = ata_scsi_ioctl, + .queuecommand = ata_scsi_queuecmd, + .eh_strategy_handler = ata_scsi_error, + .can_queue = ATA_DEF_QUEUE, + .this_id = ATA_SHT_THIS_ID, + .sg_tablesize = LIBATA_MAX_PRD, + .max_sectors = ATA_MAX_SECTORS, + .cmd_per_lun = ATA_SHT_CMD_PER_LUN, + .emulated = ATA_SHT_EMULATED, + .use_clustering = ATA_SHT_USE_CLUSTERING, + .proc_name = DRV_NAME, + .dma_boundary = ATA_DMA_BOUNDARY, + .slave_configure = ata_scsi_slave_config, + .bios_param = ata_std_bios_param, + .ordered_flush = 1, /* NCQ not supported yet */ +}; + +static struct ata_port_operations sil24_ops = { + .port_disable = ata_port_disable, + + .check_status = sil24_check_status, + .check_altstatus = sil24_check_status, + .check_err = sil24_check_err, + .dev_select = ata_noop_dev_select, + + .phy_reset = sil24_phy_reset, + + .qc_prep = sil24_qc_prep, + .qc_issue = sil24_qc_issue, + + .eng_timeout = sil24_eng_timeout, + + .irq_handler = sil24_interrupt, + .irq_clear = sil24_irq_clear, + + .scr_read = sil24_scr_read, + .scr_write = sil24_scr_write, + + .port_start = sil24_port_start, + .port_stop = sil24_port_stop, + .host_stop = sil24_host_stop, +}; + +static struct ata_port_info sil24_port_info[] = { + /* sil_3124 */ + { + .sht = &sil24_sht, + .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | + ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO | + ATA_FLAG_PIO_DMA, + .pio_mask = 0x1f, /* pio0-4 */ + .mwdma_mask = 0x07, /* mwdma0-2 */ + .udma_mask = 0x3f, /* udma0-5 */ + .port_ops = &sil24_ops, + }, + /* sil_3132 */ + { + .sht = &sil24_sht, + .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | + ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO | + ATA_FLAG_PIO_DMA, + .pio_mask = 0x1f, /* pio0-4 */ + .mwdma_mask = 0x07, /* mwdma0-2 */ + .udma_mask = 0x3f, /* udma0-5 */ + .port_ops = &sil24_ops, + }, +}; + +static u8 sil24_check_status(struct ata_port *ap) +{ + return ATA_DRDY; +} + +static u8 sil24_check_err(struct ata_port *ap) +{ + return 0; +} + +static int sil24_scr_map[] = { + [SCR_CONTROL] = 0, + [SCR_STATUS] = 1, + [SCR_ERROR] = 2, + [SCR_ACTIVE] = 3, +}; + +static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg) +{ + void *scr_addr = (void *)ap->ioaddr.scr_addr; + if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { + void *addr; + addr = scr_addr + sil24_scr_map[sc_reg] * 4; + return readl(scr_addr + sil24_scr_map[sc_reg] * 4); + } + return 0xffffffffU; +} + +static void sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) +{ + void *scr_addr = (void *)ap->ioaddr.scr_addr; + if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { + void *addr; + addr = scr_addr + sil24_scr_map[sc_reg] * 4; + writel(val, scr_addr + sil24_scr_map[sc_reg] * 4); + } +} + +static void sil24_phy_reset(struct ata_port *ap) +{ + __sata_phy_reset(ap); + /* + * No ATAPI yet. Just unconditionally indicate ATA device. + * If ATAPI device is attached, it will fail ATA_CMD_ID_ATA + * and libata core will ignore the device. + */ + if (!(ap->flags & ATA_FLAG_PORT_DISABLED)) + ap->device[0].class = ATA_DEV_ATA; +} + +static inline void sil24_fill_sg(struct ata_queued_cmd *qc, + struct sil24_cmd_block *cb) +{ + struct scatterlist *sg = qc->sg; + struct sil24_sge *sge = cb->sge; + unsigned i; + + pd("filling %u elements\n", qc->n_elem); + for (i = 0; i < qc->n_elem; i++, sg++, sge++) { + sge->addr = cpu_to_le64(sg_dma_address(sg)); + sge->cnt = cpu_to_le32(sg_dma_len(sg)); + sge->flags = 0; + sge->flags = i < qc->n_elem - 1 ? 0 : cpu_to_le32(SGE_TRM); + pd("%016llx %u %x\n", sge->addr, sge->cnt, sge->flags); + } +} + +static void sil24_qc_prep(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + struct sil24_port_priv *pp = ap->private_data; + struct sil24_cmd_block *cb = pp->cmd_block + qc->tag; + struct sil24_prb *prb = &cb->prb; + + switch (qc->tf.protocol) { + case ATA_PROT_PIO: + case ATA_PROT_DMA: + case ATA_PROT_NODATA: + break; + default: + /* ATAPI isn't supported yet */ + BUG(); + } + + ata_tf_to_fis(&qc->tf, prb->fis, 0); + + if (qc->flags & ATA_QCFLAG_DMAMAP) + sil24_fill_sg(qc, cb); +} + +static int sil24_qc_issue(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + void *port = (void *)ap->ioaddr.cmd_addr; + struct sil24_port_priv *pp = ap->private_data; + dma_addr_t paddr = pp->cmd_block_dma + qc->tag * sizeof(*pp->cmd_block); + + pd("issuing command 0x%x\n", qc->tf.command); + writel((u32)paddr, port + PORT_CMD_ACTIVATE); + return 0; +} + +static void sil24_irq_clear(struct ata_port *ap) +{ + /* unused */ +} + +static void sil24_reset_controller(struct ata_port *ap) +{ + void *port = (void *)ap->ioaddr.cmd_addr; + int cnt; + u32 tmp; + + printk(KERN_NOTICE DRV_NAME + " ata%u: resetting controller...\n", ap->id); + + /* Reset controller state. Is this correct? */ + writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT); + readl(port + PORT_CTRL_STAT); /* sync */ + + /* Max ~100ms */ + for (cnt = 0; cnt < 1000; cnt++) { + udelay(100); + tmp = readl(port + PORT_CTRL_STAT); + if (!(tmp & PORT_CS_DEV_RST)) + break; + } + if (tmp & PORT_CS_DEV_RST) + printk(KERN_ERR DRV_NAME + " ata%u: failed to reset controller\n", ap->id); +} + +static void sil24_eng_timeout(struct ata_port *ap) +{ + struct ata_queued_cmd *qc; + + qc = ata_qc_from_tag(ap, ap->active_tag); + if (!qc) { + printk(KERN_ERR "ata%u: BUG: tiemout without command\n", + ap->id); + return; + } + + /* + * hack alert! We cannot use the supplied completion + * function from inside the ->eh_strategy_handler() thread. + * libata is the only user of ->eh_strategy_handler() in + * any kernel, so the default scsi_done() assumes it is + * not being called from the SCSI EH. + */ + printk(KERN_ERR "ata%u: command timeout\n", ap->id); + qc->scsidone = scsi_finish_command; + ata_qc_complete(qc, ATA_ERR); + + sil24_reset_controller(ap); +} + +static void sil24_error_intr(struct ata_port *ap, u32 slot_stat) +{ + struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->active_tag); + void *port = (void *)ap->ioaddr.cmd_addr; + u32 irq_stat, cmd_err, sstatus, serror; + + irq_stat = readl(port + PORT_IRQ_STAT); + cmd_err = readl(port + PORT_CMD_ERR); + sstatus = readl(port + PORT_SSTATUS); + serror = readl(port + PORT_SERROR); + + /* Clear IRQ/errors */ + writel(irq_stat, port + PORT_IRQ_STAT); + if (cmd_err) + writel(cmd_err, port + PORT_CMD_ERR); + if (serror) + writel(serror, port + PORT_SERROR); + + printk(KERN_ERR DRV_NAME " ata%u: error interrupt on port%d\n" + " stat=0x%x irq=0x%x cmd_err=%d sstatus=0x%x serror=0x%x\n", + ap->id, ap->port_no, slot_stat, irq_stat, cmd_err, sstatus, serror); + + if (qc) + ata_qc_complete(qc, ATA_ERR); + + sil24_reset_controller(ap); +} + +static inline void sil24_host_intr(struct ata_port *ap) +{ + struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->active_tag); + void *port = (void *)ap->ioaddr.cmd_addr; + u32 slot_stat; + + slot_stat = readl(port + PORT_SLOT_STAT); + if (!(slot_stat & HOST_SSTAT_ATTN)) { + if (qc) + ata_qc_complete(qc, 0); + } else + sil24_error_intr(ap, slot_stat); +} + +static irqreturn_t sil24_interrupt(int irq, void *dev_instance, struct pt_regs *regs) +{ + struct ata_host_set *host_set = dev_instance; + struct sil24_host_priv *hpriv = host_set->private_data; + unsigned handled = 0; + u32 status; + int i; + + status = readl(hpriv->host_base + HOST_IRQ_STAT); + + if (status == 0xffffffff) { + printk(KERN_ERR DRV_NAME ": IRQ status == 0xffffffff, " + "PCI fault or device removal?\n"); + goto out; + } + + if (!(status & IRQ_STAT_4PORTS)) + goto out; + + spin_lock(&host_set->lock); + + for (i = 0; i < host_set->n_ports; i++) + if (status & (1 << i)) { + struct ata_port *ap = host_set->ports[i]; + if (ap && !(ap->flags & ATA_FLAG_PORT_DISABLED)) { + sil24_host_intr(host_set->ports[i]); + handled++; + } else + printk(KERN_ERR DRV_NAME + ": interrupt from disabled port %d\n", i); + } + + spin_unlock(&host_set->lock); + out: + return IRQ_RETVAL(handled); +} + +static int sil24_port_start(struct ata_port *ap) +{ + struct device *dev = ap->host_set->dev; + struct sil24_port_priv *pp; + struct sil24_cmd_block *cb; + size_t cb_size = sizeof(*cb); + dma_addr_t cb_dma; + + pp = kmalloc(sizeof(*pp), GFP_KERNEL); + if (!pp) + return -ENOMEM; + memset(pp, 0, sizeof(*pp)); + + cb = dma_alloc_coherent(dev, cb_size, &cb_dma, GFP_KERNEL); + if (!cb) { + kfree(pp); + return -ENOMEM; + } + memset(cb, 0, cb_size); + + pp->cmd_block = cb; + pp->cmd_block_dma = cb_dma; + + ap->private_data = pp; + + return 0; +} + +static void sil24_port_stop(struct ata_port *ap) +{ + struct device *dev = ap->host_set->dev; + struct sil24_port_priv *pp = ap->private_data; + size_t cb_size = sizeof(*pp->cmd_block); + + dma_free_coherent(dev, cb_size, pp->cmd_block, pp->cmd_block_dma); + kfree(pp); +} + +static void sil24_host_stop(struct ata_host_set *host_set) +{ + struct sil24_host_priv *hpriv = host_set->private_data; + + iounmap(hpriv->host_base); + iounmap(hpriv->port_base); + kfree(hpriv); +} + +static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) +{ + static int printed_version = 0; + unsigned int board_id = (unsigned int)ent->driver_data; + struct ata_probe_ent *probe_ent = NULL; + struct sil24_host_priv *hpriv = NULL; + void *host_base = NULL, *port_base = NULL; + int i, rc; + + if (!printed_version++) + printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n"); + + rc = pci_enable_device(pdev); + if (rc) + return rc; + + rc = pci_request_regions(pdev, DRV_NAME); + if (rc) + goto out_disable; + + rc = -ENOMEM; + /* ioremap mmio registers */ + host_base = ioremap(pci_resource_start(pdev, 0), + pci_resource_len(pdev, 0)); + if (!host_base) + goto out_free; + port_base = ioremap(pci_resource_start(pdev, 2), + pci_resource_len(pdev, 2)); + if (!port_base) + goto out_free; + + /* allocate & init probe_ent and hpriv */ + probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); + if (!probe_ent) + goto out_free; + + hpriv = kmalloc(sizeof(*hpriv), GFP_KERNEL); + if (!hpriv) + goto out_free; + + memset(probe_ent, 0, sizeof(*probe_ent)); + probe_ent->dev = pci_dev_to_dev(pdev); + INIT_LIST_HEAD(&probe_ent->node); + + probe_ent->sht = sil24_port_info[board_id].sht; + probe_ent->host_flags = sil24_port_info[board_id].host_flags; + probe_ent->pio_mask = sil24_port_info[board_id].pio_mask; + probe_ent->udma_mask = sil24_port_info[board_id].udma_mask; + probe_ent->port_ops = sil24_port_info[board_id].port_ops; + probe_ent->n_ports = (board_id == BID_SIL3124) ? 4 : 2; + + probe_ent->irq = pdev->irq; + probe_ent->irq_flags = SA_SHIRQ; + probe_ent->mmio_base = port_base; + probe_ent->private_data = hpriv; + + memset(hpriv, 0, sizeof(*hpriv)); + hpriv->host_base = host_base; + hpriv->port_base = port_base; + + /* + * Configure the device + */ + /* + * FIXME: This device is certainly 64-bit capable. We just + * don't know how to use it. After fixing 32bit activation in + * this function, enable 64bit masks here. + */ + rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); + if (rc) { + printk(KERN_ERR DRV_NAME "(%s): 32-bit DMA enable failed\n", + pci_name(pdev)); + goto out_free; + } + rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); + if (rc) { + printk(KERN_ERR DRV_NAME "(%s): 32-bit consistent DMA enable failed\n", + pci_name(pdev)); + goto out_free; + } + + /* GPIO off */ + writel(0, host_base + HOST_FLASH_CMD); + + /* Mask interrupts during initialization */ + writel(0, host_base + HOST_CTRL); + + for (i = 0; i < probe_ent->n_ports; i++) { + void *port = port_base + i * PORT_REGS_SIZE; + unsigned long portu = (unsigned long)port; + u32 tmp; + int cnt; + + probe_ent->port[i].cmd_addr = portu + PORT_PRB; + probe_ent->port[i].scr_addr = portu + PORT_SCONTROL; + + ata_std_ports(&probe_ent->port[i]); + + /* Initial PHY setting */ + writel(0x20c, port + PORT_PHY_CFG); + + /* Clear port RST */ + tmp = readl(port + PORT_CTRL_STAT); + if (tmp & PORT_CS_PORT_RST) { + writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR); + readl(port + PORT_CTRL_STAT); /* sync */ + for (cnt = 0; cnt < 10; cnt++) { + msleep(10); + tmp = readl(port + PORT_CTRL_STAT); + if (!(tmp & PORT_CS_PORT_RST)) + break; + } + if (tmp & PORT_CS_PORT_RST) + printk(KERN_ERR DRV_NAME + "(%s): failed to clear port RST\n", + pci_name(pdev)); + } + + /* Zero error counters. */ + writel(0x8000, port + PORT_DECODE_ERR_THRESH); + writel(0x8000, port + PORT_CRC_ERR_THRESH); + writel(0x8000, port + PORT_HSHK_ERR_THRESH); + writel(0x0000, port + PORT_DECODE_ERR_CNT); + writel(0x0000, port + PORT_CRC_ERR_CNT); + writel(0x0000, port + PORT_HSHK_ERR_CNT); + + /* FIXME: 32bit activation? */ + writel(0, port + PORT_ACTIVATE_UPPER_ADDR); + writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_STAT); + + /* Configure interrupts */ + writel(0xffff, port + PORT_IRQ_ENABLE_CLR); + writel(PORT_IRQ_COMPLETE | PORT_IRQ_ERROR | PORT_IRQ_SDB_FIS, + port + PORT_IRQ_ENABLE_SET); + + /* Clear interrupts */ + writel(0x0fff0fff, port + PORT_IRQ_STAT); + writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR); + } + + /* Turn on interrupts */ + writel(IRQ_STAT_4PORTS, host_base + HOST_CTRL); + + pci_set_master(pdev); + + /* FIXME: check ata_device_add return value */ + ata_device_add(probe_ent); + + kfree(probe_ent); + return 0; + + out_free: + if (host_base) + iounmap(host_base); + if (port_base) + iounmap(port_base); + kfree(probe_ent); + kfree(hpriv); + pci_release_regions(pdev); + out_disable: + pci_disable_device(pdev); + return rc; +} + +static int __init sil24_init(void) +{ + return pci_module_init(&sil24_pci_driver); +} + +static void __exit sil24_exit(void) +{ + pci_unregister_driver(&sil24_pci_driver); +} + +MODULE_AUTHOR("Tejun Heo"); +MODULE_DESCRIPTION("Silicon Image 3124/3132 SATA low-level driver"); +MODULE_LICENSE("GPL"); +MODULE_DEVICE_TABLE(pci, sil24_pci_tbl); + +module_init(sil24_init); +module_exit(sil24_exit); ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-07 1:39 ` Tejun Heo @ 2005-09-07 9:37 ` Marc Bevand 2005-09-10 13:53 ` Tejun Heo 0 siblings, 1 reply; 17+ messages in thread From: Marc Bevand @ 2005-09-07 9:37 UTC (permalink / raw) To: Tejun Heo; +Cc: linux-ide Hi Tejun. Tejun Heo wrote: | | Here's a big patch against sil24-original branch. It contains the | followings. | | a. build fix & oops fix for sil24-original branch | b. backported sata_sil24_new driver | c. debug messages (you don't need to turn on ATA_DEBUG) | d. 50ms sleep after completion of IDENTIFY before actually reading data | | Building both sata_sil24 and sata_sil24_new as modules and | loading/unloading them work on my machine. Can you please try this | and let me know how it goes? Real quick update on this (it's 2:40 am here): sata_sil24_new still does not detects my disks while sata_sil24 works perfectly. I will post the full dmesg's + the various things I tried tomorrow. -- Marc Bevand http://epita.fr/~bevand_m Computer Science School EPITA - System, Network and Security Dept. ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-07 9:37 ` Marc Bevand @ 2005-09-10 13:53 ` Tejun Heo 2005-09-11 5:00 ` Marc Bevand 0 siblings, 1 reply; 17+ messages in thread From: Tejun Heo @ 2005-09-10 13:53 UTC (permalink / raw) To: Marc Bevand; +Cc: linux-ide Hi again, Marc. On Wed, Sep 07, 2005 at 11:37:12AM +0200, Marc Bevand wrote: > Hi Tejun. > > Tejun Heo wrote: > | > | Here's a big patch against sil24-original branch. It contains the > | followings. > | > | a. build fix & oops fix for sil24-original branch > | b. backported sata_sil24_new driver > | c. debug messages (you don't need to turn on ATA_DEBUG) > | d. 50ms sleep after completion of IDENTIFY before actually reading data > | > | Building both sata_sil24 and sata_sil24_new as modules and > | loading/unloading them work on my machine. Can you please try this > | and let me know how it goes? > > Real quick update on this (it's 2:40 am here): sata_sil24_new still > does not detects my disks while sata_sil24 works perfectly. I will post > the full dmesg's + the various things I tried tomorrow. > I compared original and new sil24 and here are things that are done differently upto the point where identify command is issued. a. Stuff done inside sil_init_pm() in the original driver is not done in the new driver. This includes clearing PM_EN and RESUME bits in the ctrl/stat register and DVR_RST'ing the port. b. Original driver performs both SATA phy reset and soft reset. New driver performs only SATA phy reset. c. New driver uses different order when initializing irq mask and doesn't turn on phy status change interrupt. d. New driver doesn't turn off SATA link power management. We've already tried #d, and I don't think #c has anything to do with it as inserting 50ms sleep before reading data doesn't make any difference. So, it leaves us with #a and #b. Here's a patch for #a. If this doesn't work, I'll make a patch for #b. This patch is on top of previous test patch which backported sil24_new. Please try this one out and let me know the result. Thanks. diff --git a/drivers/scsi/sata_sil24_new.c b/drivers/scsi/sata_sil24_new.c --- a/drivers/scsi/sata_sil24_new.c +++ b/drivers/scsi/sata_sil24_new.c @@ -431,15 +431,11 @@ static void sil24_irq_clear(struct ata_p /* unused */ } -static void sil24_reset_controller(struct ata_port *ap) +static int __sil24_reset_controller(void *port) { - void *port = (void *)ap->ioaddr.cmd_addr; int cnt; u32 tmp; - printk(KERN_NOTICE DRV_NAME - " ata%u: resetting controller...\n", ap->id); - /* Reset controller state. Is this correct? */ writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT); readl(port + PORT_CTRL_STAT); /* sync */ @@ -451,7 +447,17 @@ static void sil24_reset_controller(struc if (!(tmp & PORT_CS_DEV_RST)) break; } + if (tmp & PORT_CS_DEV_RST) + return -1; + return 0; +} + +static void sil24_reset_controller(struct ata_port *ap) +{ + printk(KERN_NOTICE DRV_NAME + " ata%u: resetting controller...\n", ap->id); + if (__sil24_reset_controller((void *)ap->ioaddr.cmd_addr)) printk(KERN_ERR DRV_NAME " ata%u: failed to reset controller\n", ap->id); } @@ -745,6 +751,15 @@ static int sil24_init_one(struct pci_dev /* Clear interrupts */ writel(0x0fff0fff, port + PORT_IRQ_STAT); writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR); + + /* Clear port enable and resume bits */ + writel(PORT_CS_PM_EN | PORT_CS_RESUME, port + PORT_CTRL_CLR); + + /* Reset itself */ + if (__sil24_reset_controller(port)) + printk(KERN_ERR DRV_NAME + "(%s): failed to reset controller\n", + pci_name(pdev)); } /* Turn on interrupts */ ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-10 13:53 ` Tejun Heo @ 2005-09-11 5:00 ` Marc Bevand 2005-09-11 6:15 ` Tejun Heo 0 siblings, 1 reply; 17+ messages in thread From: Marc Bevand @ 2005-09-11 5:00 UTC (permalink / raw) To: Tejun Heo; +Cc: linux-ide Hello Tejun. Tejun Heo wrote: | | I compared original and new sil24 and here are things that are done | differently upto the point where identify command is issued. | | a. Stuff done inside sil_init_pm() in the original driver is not done | in the new driver. This includes clearing PM_EN and RESUME bits | in the ctrl/stat register and DVR_RST'ing the port. | [...] | Here's a patch for #a. | This patch is on top of previous test patch which backported | sil24_new. Please try this one out and let me know the result. Yes ! With this patch, my disk is recognized. Congratulations :-) See below for the dmesg. Let me know if you want me to try anything else. I would be happy to help you. sata_sil24 version 0.20 ACPI: PCI Interrupt 0000:01:06.0[A] -> GSI 29 (level, low) -> IRQ 193 ata5: SATA max UDMA/100 cmd 0xFFFFC20000490000 ctl 0x0 bmdma 0x0 irq 193 ata6: SATA max UDMA/100 cmd 0xFFFFC20000492000 ctl 0x0 bmdma 0x0 irq 193 ata7: SATA max UDMA/100 cmd 0xFFFFC20000494000 ctl 0x0 bmdma 0x0 irq 193 ata8: SATA max UDMA/100 cmd 0xFFFFC20000496000 ctl 0x0 bmdma 0x0 irq 193 [ata_dev_identify ]: issuing 0xec, dev->id is at ffff810037183510 [sil24_fill_sg ]: filling 1 elements [sil24_fill_sg ]: 0000000037183510 512 80000000 [sil24_qc_issue ]: issuing command 0xec [ata_dev_identify ]: Command successfully completed, sleeping 50ms [ata_dev_identify ]: Dumping ID [ata_dev_identify ]: [000] 0c5a 3fff c837 0010 0000 0000 003f 0000 [ata_dev_identify ]: [008] 0000 0000 334a 5333 3030 5345 2020 2020 [ata_dev_identify ]: [016] 2020 2020 2020 2020 0000 4000 0004 332e [ata_dev_identify ]: [024] 3138 2020 2020 5354 3331 3630 3032 3341 [ata_dev_identify ]: [032] 5320 2020 2020 2020 2020 2020 2020 2020 [ata_dev_identify ]: [040] 2020 2020 2020 2020 2020 2020 2020 8010 [ata_dev_identify ]: [048] 0000 2f00 0000 0200 0200 0007 3fff 0010 [ata_dev_identify ]: [056] 003f fc10 00fb 0110 ffff 0fff 0000 0407 [ata_dev_identify ]: [064] 0003 0078 0078 00f0 0078 0000 0000 0000 [ata_dev_identify ]: [072] 0000 0000 0000 0000 0002 0000 0000 0000 [ata_dev_identify ]: [080] 007e 001b 346b 7d01 4003 3469 3c01 4003 [ata_dev_identify ]: [088] 007f 0000 0000 fefe 0000 0000 fe00 0000 [ata_dev_identify ]: [096] 0000 0000 0000 0000 9eb0 12a1 0000 0000 [ata_dev_identify ]: [104] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [112] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [120] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [128] 0001 9eb0 12a1 9eb0 12a1 2020 0002 42b6 [ata_dev_identify ]: [136] 8000 008a 3c06 3c0a ffff 07c6 0100 0800 [ata_dev_identify ]: [144] 0ff0 1000 0002 0030 0000 0000 0000 fe06 [ata_dev_identify ]: [152] 0000 0002 0050 008a 954f 0000 0023 000b [ata_dev_identify ]: [160] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [168] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [176] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [184] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [192] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [200] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [208] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [216] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [224] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [232] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [240] 0000 0000 0000 0000 0000 0000 0000 0000 [ata_dev_identify ]: [248] 0000 0000 0000 0000 0000 0000 0000 dda5 ata5: dev 0 cfg 49:2f00 82:346b 83:7d01 84:4003 85:3469 86:3c01 87:4003 88:007f ata5: dev 0 ATA, max UDMA/133, 312581808 sectors: lba48 [sil24_qc_issue ]: issuing command 0xef ata5: dev 0 configured for UDMA/100 scsi4 : sata_sil24 ata6: no device found (phy stat 00000000) scsi5 : sata_sil24 ata7: no device found (phy stat 00000000) scsi6 : sata_sil24 ata8: no device found (phy stat 00000000) scsi7 : sata_sil24 Vendor: ATA Model: ST3160023AS Rev: 3.18 Type: Direct-Access ANSI SCSI revision: 05 SCSI device sdc: 312581808 512-byte hdwr sectors (160042 MB) SCSI device sdc: drive cache: write back SCSI device sdc: 312581808 512-byte hdwr sectors (160042 MB) SCSI device sdc: drive cache: write back sdc:<3>[sil24_fill_sg ]: filling 1 elements [sil24_fill_sg ]: 0000000034fd0000 4096 80000000 [sil24_qc_issue ]: issuing command 0x25 sdc1 Attached scsi disk sdc at scsi4, channel 0, id 0, lun 0 Attached scsi generic sg2 at scsi4, channel 0, id 0, lun 0, type 0 [sil24_fill_sg ]: filling 1 elements [sil24_fill_sg ]: 0000000034fd1000 4096 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 1 elements [sil24_fill_sg ]: 0000000036c78000 4096 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 1 elements [sil24_fill_sg ]: 0000000036c79000 4096 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 1 elements [sil24_fill_sg ]: 000000003d3b4000 4096 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 1 elements [sil24_fill_sg ]: 00000000334d8000 4096 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 5 elements [sil24_fill_sg ]: 0000000038fee000 4096 0 [sil24_fill_sg ]: 000000003718e000 4096 0 [sil24_fill_sg ]: 000000003305f000 4096 0 [sil24_fill_sg ]: 000000003c80e000 4096 0 [sil24_fill_sg ]: 000000003b189000 4096 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 1 elements [sil24_fill_sg ]: 000000003a52c000 4096 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 1 elements [sil24_fill_sg ]: 00000000335ab000 4096 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 4 elements [sil24_fill_sg ]: 0000000037775000 1024 0 [sil24_fill_sg ]: 0000000037775400 1024 0 [sil24_fill_sg ]: 0000000037775800 1024 0 [sil24_fill_sg ]: 0000000037775c00 1024 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 4 elements [sil24_fill_sg ]: 000000003f42e000 1024 0 [sil24_fill_sg ]: 000000003f42e400 1024 0 [sil24_fill_sg ]: 000000003f42e800 1024 0 [sil24_fill_sg ]: 000000003f42ec00 1024 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 32 elements [sil24_fill_sg ]: 0000000039f89000 1024 0 [sil24_fill_sg ]: 0000000039f89400 1024 0 [sil24_fill_sg ]: 0000000039f89800 1024 0 [sil24_fill_sg ]: 0000000039f89c00 1024 0 [sil24_fill_sg ]: 0000000033a20000 1024 0 [sil24_fill_sg ]: 0000000033a20400 1024 0 [sil24_fill_sg ]: 0000000033a20800 1024 0 [sil24_fill_sg ]: 0000000033a20c00 1024 0 [sil24_fill_sg ]: 0000000033952000 1024 0 [sil24_fill_sg ]: 0000000033952400 1024 0 [sil24_fill_sg ]: 0000000033952800 1024 0 [sil24_fill_sg ]: 0000000033952c00 1024 0 [sil24_fill_sg ]: 000000003937f000 1024 0 [sil24_fill_sg ]: 000000003937f400 1024 0 [sil24_fill_sg ]: 000000003937f800 1024 0 [sil24_fill_sg ]: 000000003937fc00 1024 0 [sil24_fill_sg ]: 000000003301b000 1024 0 [sil24_fill_sg ]: 000000003301b400 1024 0 [sil24_fill_sg ]: 000000003301b800 1024 0 [sil24_fill_sg ]: 000000003301bc00 1024 0 [sil24_fill_sg ]: 000000003c17d000 1024 0 [sil24_fill_sg ]: 000000003c17d400 1024 0 [sil24_fill_sg ]: 000000003c17d800 1024 0 [sil24_fill_sg ]: 000000003c17dc00 1024 0 [sil24_fill_sg ]: 00000000373d5000 1024 0 [sil24_fill_sg ]: 00000000373d5400 1024 0 [sil24_fill_sg ]: 00000000373d5800 1024 0 [sil24_fill_sg ]: 00000000373d5c00 1024 0 [sil24_fill_sg ]: 0000000033b1e000 1024 0 [sil24_fill_sg ]: 0000000033b1e400 1024 0 [sil24_fill_sg ]: 0000000033b1e800 1024 0 [sil24_fill_sg ]: 0000000033b1ec00 1024 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 4 elements [sil24_fill_sg ]: 00000000388b2000 1024 0 [sil24_fill_sg ]: 00000000388b2400 1024 0 [sil24_fill_sg ]: 00000000388b2800 1024 0 [sil24_fill_sg ]: 00000000388b2c00 1024 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 4 elements [sil24_fill_sg ]: 0000000033b0d000 1024 0 [sil24_fill_sg ]: 0000000033b0d400 1024 0 [sil24_fill_sg ]: 0000000033b0d800 1024 0 [sil24_fill_sg ]: 0000000033b0dc00 1024 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 32 elements [sil24_fill_sg ]: 000000003e0b8000 1024 0 [sil24_fill_sg ]: 000000003e0b8400 1024 0 [sil24_fill_sg ]: 000000003e0b8800 1024 0 [sil24_fill_sg ]: 000000003e0b8c00 1024 0 [sil24_fill_sg ]: 000000003d4d1000 1024 0 [sil24_fill_sg ]: 000000003d4d1400 1024 0 [sil24_fill_sg ]: 000000003d4d1800 1024 0 [sil24_fill_sg ]: 000000003d4d1c00 1024 0 [sil24_fill_sg ]: 0000000034fce000 1024 0 [sil24_fill_sg ]: 0000000034fce400 1024 0 [sil24_fill_sg ]: 0000000034fce800 1024 0 [sil24_fill_sg ]: 0000000034fcec00 1024 0 [sil24_fill_sg ]: 000000003caeb000 1024 0 [sil24_fill_sg ]: 000000003caeb400 1024 0 [sil24_fill_sg ]: 000000003caeb800 1024 0 [sil24_fill_sg ]: 000000003caebc00 1024 0 [sil24_fill_sg ]: 0000000038132000 1024 0 [sil24_fill_sg ]: 0000000038132400 1024 0 [sil24_fill_sg ]: 0000000038132800 1024 0 [sil24_fill_sg ]: 0000000038132c00 1024 0 [sil24_fill_sg ]: 0000000039b41000 1024 0 [sil24_fill_sg ]: 0000000039b41400 1024 0 [sil24_fill_sg ]: 0000000039b41800 1024 0 [sil24_fill_sg ]: 0000000039b41c00 1024 0 [sil24_fill_sg ]: 00000000371be000 1024 0 [sil24_fill_sg ]: 00000000371be400 1024 0 [sil24_fill_sg ]: 00000000371be800 1024 0 [sil24_fill_sg ]: 00000000371bec00 1024 0 [sil24_fill_sg ]: 0000000037623000 1024 0 [sil24_fill_sg ]: 0000000037623400 1024 0 [sil24_fill_sg ]: 0000000037623800 1024 0 [sil24_fill_sg ]: 0000000037623c00 1024 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 32 elements [sil24_fill_sg ]: 000000003a7d7000 1024 0 [sil24_fill_sg ]: 000000003a7d7400 1024 0 [sil24_fill_sg ]: 000000003a7d7800 1024 0 [sil24_fill_sg ]: 000000003a7d7c00 1024 0 [sil24_fill_sg ]: 0000000038964000 1024 0 [sil24_fill_sg ]: 0000000038964400 1024 0 [sil24_fill_sg ]: 0000000038964800 1024 0 [sil24_fill_sg ]: 0000000038964c00 1024 0 [sil24_fill_sg ]: 0000000038914000 1024 0 [sil24_fill_sg ]: 0000000038914400 1024 0 [sil24_fill_sg ]: 0000000038914800 1024 0 [sil24_fill_sg ]: 0000000038914c00 1024 0 [sil24_fill_sg ]: 00000000334fe000 1024 0 [sil24_fill_sg ]: 00000000334fe400 1024 0 [sil24_fill_sg ]: 00000000334fe800 1024 0 [sil24_fill_sg ]: 00000000334fec00 1024 0 [sil24_fill_sg ]: 00000000334ff000 1024 0 [sil24_fill_sg ]: 00000000334ff400 1024 0 [sil24_fill_sg ]: 00000000334ff800 1024 0 [sil24_fill_sg ]: 00000000334ffc00 1024 0 [sil24_fill_sg ]: 00000000368c0000 1024 0 [sil24_fill_sg ]: 00000000368c0400 1024 0 [sil24_fill_sg ]: 00000000368c0800 1024 0 [sil24_fill_sg ]: 00000000368c0c00 1024 0 [sil24_fill_sg ]: 00000000368c1000 1024 0 [sil24_fill_sg ]: 00000000368c1400 1024 0 [sil24_fill_sg ]: 00000000368c1800 1024 0 [sil24_fill_sg ]: 00000000368c1c00 1024 0 [sil24_fill_sg ]: 0000000034f54000 1024 0 [sil24_fill_sg ]: 0000000034f54400 1024 0 [sil24_fill_sg ]: 0000000034f54800 1024 0 [sil24_fill_sg ]: 0000000034f54c00 1024 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 8 elements [sil24_fill_sg ]: 000000003b274000 4096 0 [sil24_fill_sg ]: 000000003989e000 4096 0 [sil24_fill_sg ]: 00000000382a8000 4096 0 [sil24_fill_sg ]: 0000000039a5a000 4096 0 [sil24_fill_sg ]: 000000003a7bc000 4096 0 [sil24_fill_sg ]: 000000003a797000 4096 0 [sil24_fill_sg ]: 000000003b236000 4096 0 [sil24_fill_sg ]: 000000003a159000 4096 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 8 elements [sil24_fill_sg ]: 000000003b236000 4096 0 [sil24_fill_sg ]: 0000000033878000 4096 0 [sil24_fill_sg ]: 000000003859f000 4096 0 [sil24_fill_sg ]: 00000000330e4000 4096 0 [sil24_fill_sg ]: 000000003f1ce000 4096 0 [sil24_fill_sg ]: 000000003579e000 4096 0 [sil24_fill_sg ]: 0000000039ccc000 4096 0 [sil24_fill_sg ]: 0000000034fdb000 4096 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 4 elements [sil24_fill_sg ]: 0000000034f55000 1024 0 [sil24_fill_sg ]: 0000000034f55400 1024 0 [sil24_fill_sg ]: 0000000034f55800 1024 0 [sil24_fill_sg ]: 0000000034f55c00 1024 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 4 elements [sil24_fill_sg ]: 000000003354a000 1024 0 [sil24_fill_sg ]: 000000003354a400 1024 0 [sil24_fill_sg ]: 000000003354a800 1024 0 [sil24_fill_sg ]: 000000003354ac00 1024 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 32 elements [sil24_fill_sg ]: 000000003eacb000 1024 0 [sil24_fill_sg ]: 000000003eacb400 1024 0 [sil24_fill_sg ]: 000000003eacb800 1024 0 [sil24_fill_sg ]: 000000003eacbc00 1024 0 [sil24_fill_sg ]: 000000003c230000 1024 0 [sil24_fill_sg ]: 000000003c230400 1024 0 [sil24_fill_sg ]: 000000003c230800 1024 0 [sil24_fill_sg ]: 000000003c230c00 1024 0 [sil24_fill_sg ]: 00000000338fb000 1024 0 [sil24_fill_sg ]: 00000000338fb400 1024 0 [sil24_fill_sg ]: 00000000338fb800 1024 0 [sil24_fill_sg ]: 00000000338fbc00 1024 0 [sil24_fill_sg ]: 000000003688f000 1024 0 [sil24_fill_sg ]: 000000003688f400 1024 0 [sil24_fill_sg ]: 000000003688f800 1024 0 [sil24_fill_sg ]: 000000003688fc00 1024 0 [sil24_fill_sg ]: 00000000330e1000 1024 0 [sil24_fill_sg ]: 00000000330e1400 1024 0 [sil24_fill_sg ]: 00000000330e1800 1024 0 [sil24_fill_sg ]: 00000000330e1c00 1024 0 [sil24_fill_sg ]: 000000003b5d2000 1024 0 [sil24_fill_sg ]: 000000003b5d2400 1024 0 [sil24_fill_sg ]: 000000003b5d2800 1024 0 [sil24_fill_sg ]: 000000003b5d2c00 1024 0 [sil24_fill_sg ]: 00000000382a8000 1024 0 [sil24_fill_sg ]: 00000000382a8400 1024 0 [sil24_fill_sg ]: 00000000382a8800 1024 0 [sil24_fill_sg ]: 00000000382a8c00 1024 0 [sil24_fill_sg ]: 0000000039a5a000 1024 0 [sil24_fill_sg ]: 0000000039a5a400 1024 0 [sil24_fill_sg ]: 0000000039a5a800 1024 0 [sil24_fill_sg ]: 0000000039a5ac00 1024 80000000 [sil24_qc_issue ]: issuing command 0x25 [sil24_fill_sg ]: filling 8 elements [sil24_fill_sg ]: 000000003b274000 4096 0 [sil24_fill_sg ]: 000000003968c000 4096 0 [sil24_fill_sg ]: 0000000038ea9000 4096 0 [sil24_fill_sg ]: 000000003a7bc000 4096 0 [sil24_fill_sg ]: 0000000038611000 4096 0 [sil24_fill_sg ]: 00000000371d1000 4096 0 [sil24_fill_sg ]: 0000000034fd2000 4096 0 [sil24_fill_sg ]: 0000000038bb0000 4096 80000000 [sil24_qc_issue ]: issuing command 0x25 -- Marc Bevand http://epita.fr/~bevand_m Computer Science School EPITA - System, Network and Security Dept. ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-11 5:00 ` Marc Bevand @ 2005-09-11 6:15 ` Tejun Heo 2005-09-11 7:02 ` Marc Bevand 0 siblings, 1 reply; 17+ messages in thread From: Tejun Heo @ 2005-09-11 6:15 UTC (permalink / raw) To: Marc Bevand; +Cc: linux-ide Hello, Marc. On Sun, Sep 11, 2005 at 07:00:21AM +0200, Marc Bevand wrote: > Hello Tejun. > > Tejun Heo wrote: > | > | I compared original and new sil24 and here are things that are done > | differently upto the point where identify command is issued. > | > | a. Stuff done inside sil_init_pm() in the original driver is not done > | in the new driver. This includes clearing PM_EN and RESUME bits > | in the ctrl/stat register and DVR_RST'ing the port. > | [...] > | Here's a patch for #a. > | This patch is on top of previous test patch which backported > | sil24_new. Please try this one out and let me know the result. > > Yes ! With this patch, my disk is recognized. Congratulations :-) Great. :-) > See below for the dmesg. Let me know if you want me to try anything > else. I would be happy to help you. Everything looks dandy. Here's a patch against the current sil24 head of libata-dev tree. It should also apply cleanly to ALL head. Please try this one and let me know how it works; then, the patch will go to Jeff & upstream. diff --git a/drivers/scsi/sata_sil24.c b/drivers/scsi/sata_sil24.c --- a/drivers/scsi/sata_sil24.c +++ b/drivers/scsi/sata_sil24.c @@ -426,15 +426,11 @@ static void sil24_irq_clear(struct ata_p /* unused */ } -static void sil24_reset_controller(struct ata_port *ap) +static int __sil24_reset_controller(void *port) { - void *port = (void *)ap->ioaddr.cmd_addr; int cnt; u32 tmp; - printk(KERN_NOTICE DRV_NAME - " ata%u: resetting controller...\n", ap->id); - /* Reset controller state. Is this correct? */ writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT); readl(port + PORT_CTRL_STAT); /* sync */ @@ -446,9 +442,19 @@ static void sil24_reset_controller(struc if (!(tmp & PORT_CS_DEV_RST)) break; } + if (tmp & PORT_CS_DEV_RST) - printk(KERN_ERR DRV_NAME - " ata%u: failed to reset controller\n", ap->id); + return -1; + return 0; +} + +static void sil24_reset_controller(struct ata_port *ap) +{ + printk(KERN_NOTICE DRV_NAME + " ata%u: resetting controller...\n", ap->id); + if (__sil24_reset_controller((void *)ap->ioaddr.cmd_addr)) + printk(KERN_ERR DRV_NAME + " ata%u: failed to reset controller\n", ap->id); } static void sil24_eng_timeout(struct ata_port *ap) @@ -740,6 +746,15 @@ static int sil24_init_one(struct pci_dev /* Clear interrupts */ writel(0x0fff0fff, port + PORT_IRQ_STAT); writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR); + + /* Clear port multiplier enable and resume bits */ + writel(PORT_CS_PM_EN | PORT_CS_RESUME, port + PORT_CTRL_CLR); + + /* Reset itself */ + if (__sil24_reset_controller(port)) + printk(KERN_ERR DRV_NAME + "(%s): failed to reset controller\n", + pci_name(pdev)); } /* Turn on interrupts */ ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [sata_sil24] v0.10 works, v0.20 doesn't 2005-09-11 6:15 ` Tejun Heo @ 2005-09-11 7:02 ` Marc Bevand 0 siblings, 0 replies; 17+ messages in thread From: Marc Bevand @ 2005-09-11 7:02 UTC (permalink / raw) To: Tejun Heo; +Cc: linux-ide Tejun Heo wrote: | | Everything looks dandy. Here's a patch against the current sil24 | head of libata-dev tree. It should also apply cleanly to ALL head. | Please try this one and let me know how it works; then, the patch will | go to Jeff & upstream. I confirm that my disk is recognized when using this patch with libata-dev.git current, ALL head. Thank you for your hard work. -- Marc Bevand http://epita.fr/~bevand_m Computer Science School EPITA - System, Network and Security Dept. ^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2005-09-11 7:02 UTC | newest] Thread overview: 17+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2005-09-04 7:56 [sata_sil24] v0.10 works, v0.20 doesn't Marc Bevand 2005-09-04 14:02 ` Tejun Heo 2005-09-05 1:07 ` Marc Bevand 2005-09-05 4:18 ` Tejun Heo 2005-09-05 4:22 ` Tejun Heo 2005-09-05 13:43 ` Marc Bevand 2005-09-05 23:02 ` Tejun Heo 2005-09-05 23:17 ` Tejun Heo 2005-09-06 1:12 ` Marc Bevand 2005-09-06 1:54 ` Tejun Heo 2005-09-06 9:36 ` Marc Bevand 2005-09-07 1:39 ` Tejun Heo 2005-09-07 9:37 ` Marc Bevand 2005-09-10 13:53 ` Tejun Heo 2005-09-11 5:00 ` Marc Bevand 2005-09-11 6:15 ` Tejun Heo 2005-09-11 7:02 ` Marc Bevand
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