From: Jeff Garzik <jgarzik@pobox.com>
To: Brett Russ <russb@emc.com>
Cc: Bogdan Costescu <Bogdan.Costescu@iwr.uni-heidelberg.de>,
linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2.6.14-rc2 0/2] libata: Marvell SATA support (v0.23-0.24)
Date: Thu, 06 Oct 2005 09:36:10 -0400 [thread overview]
Message-ID: <4345284A.5060102@pobox.com> (raw)
In-Reply-To: <4345273B.40906@emc.com>
Brett Russ wrote:
> Jeff Garzik wrote:
>
>> Staring at the docs a bit, I notice that the 50xx and 60xx have SATA
>> S{status,control,error} registers at different locations.
>
>
>
> Yes and also even some registers that are at the same location have
> changed bit definitions. Aye caramba.
>
> Best solution will probably be to create separate enums for each chip
> generation, in addition to a common enum, and point to the relevant one
> based on the chip identifier.
>
> No surprise we're seeing so many problems. I have just not spent any
> time at all on 5xxx. Probably should yank it from the pci device table
> for now.
I would suggest submitting a patch to put #if 0 around the PCI table
entries, so that testers can easily turn it back on...
Jeff
next prev parent reply other threads:[~2005-10-06 13:36 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-10-05 21:06 [PATCH 2.6.14-rc2 0/2] libata: Marvell SATA support (v0.23-0.24) Brett Russ
2005-10-05 21:08 ` [PATCH 2.6.14-rc2 1/2] libata: Marvell spinlock fixes and simplification Brett Russ
2005-10-05 21:17 ` Jeff Garzik
2005-10-05 21:18 ` Jeff Garzik
2005-10-05 22:35 ` Michael Madore
2005-10-06 11:52 ` Brett Russ
2005-10-10 19:10 ` Michael Madore
2005-10-05 21:08 ` [PATCH 2.6.14-rc2 2/2] libata: Marvell function headers Brett Russ
2005-10-06 12:46 ` [PATCH 2.6.14-rc2 0/2] libata: Marvell SATA support (v0.23-0.24) Bogdan Costescu
2005-10-06 13:13 ` Jeff Garzik
2005-10-06 13:31 ` Brett Russ
2005-10-06 13:36 ` Jeff Garzik [this message]
2005-10-06 14:20 ` Bogdan Costescu
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