* Promise SX4[-M]
@ 2005-10-20 2:41 Ryan Bourgeois
2005-10-20 2:58 ` Jeff Garzik
0 siblings, 1 reply; 2+ messages in thread
From: Ryan Bourgeois @ 2005-10-20 2:41 UTC (permalink / raw)
To: Linux IDE Mailing List
What's the latest status on the Promise SX4 cards? Has anyone looked
into employing the onboard DRAM for anything yet? I remember at one
point we had a nice little dialog going about this card, but I don't
know that it really amounted to anything.
Jeff, if nobody has done anything with this since back whenever, you
could pass to me what documentation you have for it and some of the
ideas you had for this card and I can see what I can do. I think it'd
be an interesting project for me to start, time permitting.
-Ryan Bourgeois
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: Promise SX4[-M]
2005-10-20 2:41 Promise SX4[-M] Ryan Bourgeois
@ 2005-10-20 2:58 ` Jeff Garzik
0 siblings, 0 replies; 2+ messages in thread
From: Jeff Garzik @ 2005-10-20 2:58 UTC (permalink / raw)
To: Ryan Bourgeois; +Cc: Linux IDE Mailing List
Ryan Bourgeois wrote:
> What's the latest status on the Promise SX4 cards? Has anyone looked
> into employing the onboard DRAM for anything yet? I remember at one
> point we had a nice little dialog going about this card, but I don't
> know that it really amounted to anything.
>
> Jeff, if nobody has done anything with this since back whenever, you
> could pass to me what documentation you have for it and some of the
> ideas you had for this card and I can see what I can do. I think it'd
> be an interesting project for me to start, time permitting.
NDAs (legal stuff) prevents passing around documentation.
I can certainly summarize what is public in the sata_sx4.c driver:
* one ATA engine per port, for executing ATA commands.
* each ATA engine operates on data in on-board RAM
* one HDMA engine, for copying data between host RAM and board RAM
* since there is only one HDMA engine but four ATA engines, its a bit of
a bottleneck
* no SATA controls, the board uses PATA chips with a SATA bridge
* driver code uses a static memory layout I designed. This will need to
be changed to a dynamic layout, most likely.
I can certainly answer any questions about the driver, and can answer
questions about the hardware when it pertains to information necessary
to develop and maintain the open source driver.
Jeff
^ permalink raw reply [flat|nested] 2+ messages in thread
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2005-10-20 2:58 ` Jeff Garzik
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