From: Sergei Shtylyov <sshtylyov@dev.rtsoft.ru>
To: linux-ide@vger.kernel.org
Subject: Re: Highpoint IDE types
Date: Tue, 08 Nov 2005 22:40:06 +0300 [thread overview]
Message-ID: <4370FF16.5000205@dev.rtsoft.ru> (raw)
In-Reply-To: <1131471483.25192.76.camel@localhost.localdomain>
Hello.
Alan Cox wrote:
> Ok thanks to Sergei I can now post what I think is the complete table of
> HPT chip versions:
Sent 371N ID to you more than a month ago already. :-)
> The base clocks for the devices are as follows (note this means most of
> the drivers/ide/pci detection code for frequency is wrong). Also for PLL
> mode the 3x2N PLL stabilization code is subtly different.
Can somebody please tell me what this "base clock" thing is? Where it is
derived from? I see those different figures in Highpoint's driver PLL setup
code but failed to understand how that clock detection thing works...
And that's after I even saw a couple of their datasheets. :-/
> 371N/372N/302N 77
> 302/371/372A 66
> 372 55
> 370/374 48
>
> The DPLLs are
> 48, 50, 66, 75Mhz
>
> 75 is only available on the later chips and used with PATA/SATA bridge
> chips for UDMA7.
WBR, Sergei
next prev parent reply other threads:[~2005-11-08 19:38 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-11-08 17:38 Highpoint IDE types Alan Cox
2005-11-08 19:02 ` Ville Syrjälä
2005-11-08 20:02 ` Alan Cox
2005-11-08 22:35 ` Bill Davidsen
2005-11-08 23:38 ` Alan Cox
2005-11-10 14:23 ` PATA libata patches (and HPT) Alan Cox
2005-11-11 19:51 ` Highpoint IDE types Sergei Shtylylov
2005-11-12 2:15 ` Ville Syrjälä
2005-11-08 19:40 ` Sergei Shtylyov [this message]
2005-11-08 20:02 ` Sergei Shtylylov
2005-11-09 10:27 ` Karsten Desler
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