From: Tejun Heo <htejun@gmail.com>
To: Jeff Garzik <jgarzik@pobox.com>
Cc: Jean-Fran?ois Stenuit <jfs@keytradebank.com>,
"0602@eq.cz" <0602@eq.cz>,
"linux-ide@vger.kernel.org" <linux-ide@vger.kernel.org>
Subject: Re: regarding ata_piix initialization trouble
Date: Thu, 23 Feb 2006 20:52:43 +0900 [thread overview]
Message-ID: <43FDA20B.4000307@gmail.com> (raw)
In-Reply-To: <43FD8721.6080909@pobox.com>
Jeff Garzik wrote:
> Tejun wrote:
>
>> Hello, Jean & 0602.
>>
>> I was digging ICH docs to reimplement ata_piix initialization and
>> found out that 6300ESB lists high bits (the present bits) of PCS
>> register as reserved. But they indiciate that the bits might change
>> anytime just as in other docs. I think something went wrong with those
>> bits in that particular chipset and Intel decided to ignore the bits.
>>
>> I'm wondering whether your problems are related to this. Can you guys
>> please run 'lspci -n' on your machines which had the piix
>> initialization trouble and report the result here?
>
>
> Note that we still get the PCS bits wrong because, e.g. they only apply
> to ports 0 and 2 on some chipsets, not ports 0 and 1 like you would expect.
>
Jeff, can you please elaborate? I'm currently looking at datasheets for
ICH5, 6, 7 and 6300ESB but can't really understand what you're saying.
Doesn't PCS + MAP give the whole picture?
--
tejun
next prev parent reply other threads:[~2006-02-23 11:51 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-02-23 7:43 regarding ata_piix initialization trouble Tejun
2006-02-23 9:57 ` Jeff Garzik
2006-02-23 11:52 ` Tejun Heo [this message]
2006-02-23 10:41 ` 0602
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