* [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
@ 2006-06-02 7:44 zhao, forrest
2006-06-02 8:08 ` Hannes Reinecke
` (2 more replies)
0 siblings, 3 replies; 14+ messages in thread
From: zhao, forrest @ 2006-06-02 7:44 UTC (permalink / raw)
To: jeff, hare, axboe, htejun, jeremy, lkml; +Cc: linux-ide
Put the "start/stop FIS RX" operation into ahci_start_fis_rx() and
ahci_stop_fis_rx().
Signed-off-by: Forrest Zhao <forrest.zhao@intel.com>
---
drivers/scsi/ahci.c | 80 +++++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 80 insertions(+), 0 deletions(-)
81f3915bccdf294fd627f2b3b0e98b1a6a457cf5
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index d2b35c4..34e6c73 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -202,6 +202,10 @@ static unsigned int ahci_qc_issue(struct
static irqreturn_t ahci_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
static int ahci_start_engine(void __iomem *port_mmio);
static int ahci_stop_engine(void __iomem *port_mmio);
+static void ahci_start_fis_rx(void __iomem *port_mmio,
+ struct ahci_port_priv *pp,
+ struct ahci_host_priv *hpriv);
+static int ahci_stop_fis_rx(void __iomem *port_mmio);
static int ahci_probe_reset(struct ata_port *ap, unsigned int *classes);
static void ahci_irq_clear(struct ata_port *ap);
static int ahci_port_start(struct ata_port *ap);
@@ -558,6 +562,82 @@ static int ahci_start_engine(void __iome
return 0;
}
+static int ahci_stop_fis_rx(void __iomem *port_mmio)
+{
+ u32 tmp;
+ int work = 1000;
+
+ /*
+ * Get current status
+ */
+ tmp = readl(port_mmio + PORT_CMD);
+
+ /* Check if FIS RX is already disabled */
+ if ((tmp & PORT_CMD_FIS_RX) == 0)
+ return 0;
+
+ /*
+ * AHCI Rev 1.1 section 10.3.2
+ * Software shall not clear PxCMD.FRE while
+ * PxCMD.ST or PxCMD.CR is set to '1'
+ */
+ if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_START)) {
+ return -EPERM;
+ }
+
+ /*
+ * Disable FIS reception
+ *
+ * AHCI Rev 1.1 Section 10.1.2:
+ * If PxCMD.FRE is set to '1', software should clear it
+ * to '0' and wait at least 500 milliseconds for PxCMD.FR
+ * to return '0' when read. If PxCMD.FR does not clear
+ * '0' correctly, then software may attempt a port reset
+ * of a full HBA reset to recover.
+ */
+ tmp &= ~(PORT_CMD_FIS_RX);
+ writel(tmp, port_mmio + PORT_CMD);
+
+ mdelay(500);
+ work = 1000;
+ while (work-- > 0) {
+ tmp = readl(port_mmio + PORT_CMD);
+ if ((tmp & PORT_CMD_FIS_ON) == 0)
+ return 0;
+ udelay(10);
+ }
+
+ return -EBUSY;
+}
+
+static void ahci_start_fis_rx(void __iomem *port_mmio,
+ struct ahci_port_priv *pp,
+ struct ahci_host_priv *hpriv)
+{
+ u32 tmp;
+
+ /*
+ * Set FIS registers
+ */
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->cmd_slot_dma >> 16) >> 16, port_mmio + PORT_LST_ADDR_HI);
+ writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
+ readl(port_mmio + PORT_LST_ADDR); /* flush */
+
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->rx_fis_dma >> 16) >> 16, port_mmio + PORT_FIS_ADDR_HI);
+ writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR);
+ readl(port_mmio + PORT_FIS_ADDR); /* flush */
+
+ /*
+ * Enable FIS reception
+ */
+ tmp = readl(port_mmio + PORT_CMD);
+ tmp |= PORT_CMD_FIS_RX;
+ writel(tmp, port_mmio + PORT_CMD);
+ readl(port_mmio + PORT_CMD); /* flush */
+}
+
static unsigned int ahci_dev_classify(struct ata_port *ap)
{
void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
--
1.2.6
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
2006-06-02 7:44 [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx() zhao, forrest
@ 2006-06-02 8:08 ` Hannes Reinecke
2006-06-02 9:15 ` Jens Axboe
2006-06-03 12:51 ` Tejun Heo
2 siblings, 0 replies; 14+ messages in thread
From: Hannes Reinecke @ 2006-06-02 8:08 UTC (permalink / raw)
To: zhao, forrest; +Cc: jeff, axboe, htejun, jeremy, lkml, linux-ide
zhao, forrest wrote:
> Put the "start/stop FIS RX" operation into ahci_start_fis_rx() and
> ahci_stop_fis_rx().
>
>
> Signed-off-by: Forrest Zhao <forrest.zhao@intel.com>
>
Signed-off-by: Hannes Reinecke <hare@suse.de>
--
Dr. Hannes Reinecke hare@suse.de
SuSE Linux Products GmbH S390 & zSeries
Maxfeldstraße 5 +49 911 74053 688
90409 Nürnberg http://www.suse.de
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
2006-06-02 7:44 [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx() zhao, forrest
2006-06-02 8:08 ` Hannes Reinecke
@ 2006-06-02 9:15 ` Jens Axboe
2006-06-02 9:09 ` zhao, forrest
2006-06-03 12:51 ` Tejun Heo
2 siblings, 1 reply; 14+ messages in thread
From: Jens Axboe @ 2006-06-02 9:15 UTC (permalink / raw)
To: zhao, forrest; +Cc: jeff, hare, htejun, jeremy, lkml, linux-ide
On Fri, Jun 02 2006, zhao, forrest wrote:
> + /*
> + * Disable FIS reception
> + *
> + * AHCI Rev 1.1 Section 10.1.2:
> + * If PxCMD.FRE is set to '1', software should clear it
> + * to '0' and wait at least 500 milliseconds for PxCMD.FR
> + * to return '0' when read. If PxCMD.FR does not clear
> + * '0' correctly, then software may attempt a port reset
> + * of a full HBA reset to recover.
> + */
> + tmp &= ~(PORT_CMD_FIS_RX);
> + writel(tmp, port_mmio + PORT_CMD);
> +
> + mdelay(500);
> + work = 1000;
The spec states that you should wait up to 500msec for this condition to
happen, not wait 500msec before looking at it! So please rework this
bit, a half second potentially wasted busy loop is quite nasty.
Other than that, this part looks good too. If you fix it up, I can add
my signed-off to this bit as well.
--
Jens Axboe
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
2006-06-02 9:15 ` Jens Axboe
@ 2006-06-02 9:09 ` zhao, forrest
2006-06-02 9:26 ` Jens Axboe
0 siblings, 1 reply; 14+ messages in thread
From: zhao, forrest @ 2006-06-02 9:09 UTC (permalink / raw)
To: Jens Axboe; +Cc: jeff, hare, htejun, jeremy, lkml, linux-ide
On Fri, 2006-06-02 at 11:15 +0200, Jens Axboe wrote:
> On Fri, Jun 02 2006, zhao, forrest wrote:
> > + /*
> > + * Disable FIS reception
> > + *
> > + * AHCI Rev 1.1 Section 10.1.2:
> > + * If PxCMD.FRE is set to '1', software should clear it
> > + * to '0' and wait at least 500 milliseconds for PxCMD.FR
> > + * to return '0' when read. If PxCMD.FR does not clear
> > + * '0' correctly, then software may attempt a port reset
> > + * of a full HBA reset to recover.
> > + */
> > + tmp &= ~(PORT_CMD_FIS_RX);
> > + writel(tmp, port_mmio + PORT_CMD);
> > +
> > + mdelay(500);
> > + work = 1000;
>
> The spec states that you should wait up to 500msec for this condition to
> happen, not wait 500msec before looking at it! So please rework this
> bit, a half second potentially wasted busy loop is quite nasty.
The spec says If PxCMD.FRE is set to '1', software should clear it to
'0' and wait *at least* 500 milliseconds for PxCMD.FR to return '0' when
read.
It's "at least", not "up to".
Thanks,
Forrest
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
2006-06-02 9:09 ` zhao, forrest
@ 2006-06-02 9:26 ` Jens Axboe
2006-06-02 9:21 ` zhao, forrest
0 siblings, 1 reply; 14+ messages in thread
From: Jens Axboe @ 2006-06-02 9:26 UTC (permalink / raw)
To: zhao, forrest; +Cc: jeff, hare, htejun, jeremy, lkml, linux-ide
On Fri, Jun 02 2006, zhao, forrest wrote:
> On Fri, 2006-06-02 at 11:15 +0200, Jens Axboe wrote:
> > On Fri, Jun 02 2006, zhao, forrest wrote:
> > > + /*
> > > + * Disable FIS reception
> > > + *
> > > + * AHCI Rev 1.1 Section 10.1.2:
> > > + * If PxCMD.FRE is set to '1', software should clear it
> > > + * to '0' and wait at least 500 milliseconds for PxCMD.FR
> > > + * to return '0' when read. If PxCMD.FR does not clear
> > > + * '0' correctly, then software may attempt a port reset
> > > + * of a full HBA reset to recover.
> > > + */
> > > + tmp &= ~(PORT_CMD_FIS_RX);
> > > + writel(tmp, port_mmio + PORT_CMD);
> > > +
> > > + mdelay(500);
> > > + work = 1000;
> >
> > The spec states that you should wait up to 500msec for this condition to
> > happen, not wait 500msec before looking at it! So please rework this
> > bit, a half second potentially wasted busy loop is quite nasty.
>
> The spec says If PxCMD.FRE is set to '1', software should clear it to
> '0' and wait *at least* 500 milliseconds for PxCMD.FR to return '0' when
> read.
>
> It's "at least", not "up to".
That still doesn't make the code right. So make it wait 1 seconds max,
but don't delay 500msec at the beginning. That's my problem.
--
Jens Axboe
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
2006-06-02 9:26 ` Jens Axboe
@ 2006-06-02 9:21 ` zhao, forrest
0 siblings, 0 replies; 14+ messages in thread
From: zhao, forrest @ 2006-06-02 9:21 UTC (permalink / raw)
To: Jens Axboe; +Cc: jeff, hare, htejun, jeremy, lkml, linux-ide
On Fri, 2006-06-02 at 11:26 +0200, Jens Axboe wrote:
> On Fri, Jun 02 2006, zhao, forrest wrote:
> > On Fri, 2006-06-02 at 11:15 +0200, Jens Axboe wrote:
> > > On Fri, Jun 02 2006, zhao, forrest wrote:
> > > > + /*
> > > > + * Disable FIS reception
> > > > + *
> > > > + * AHCI Rev 1.1 Section 10.1.2:
> > > > + * If PxCMD.FRE is set to '1', software should clear it
> > > > + * to '0' and wait at least 500 milliseconds for PxCMD.FR
> > > > + * to return '0' when read. If PxCMD.FR does not clear
> > > > + * '0' correctly, then software may attempt a port reset
> > > > + * of a full HBA reset to recover.
> > > > + */
> > > > + tmp &= ~(PORT_CMD_FIS_RX);
> > > > + writel(tmp, port_mmio + PORT_CMD);
> > > > +
> > > > + mdelay(500);
> > > > + work = 1000;
> > >
> > > The spec states that you should wait up to 500msec for this condition to
> > > happen, not wait 500msec before looking at it! So please rework this
> > > bit, a half second potentially wasted busy loop is quite nasty.
> >
> > The spec says If PxCMD.FRE is set to '1', software should clear it to
> > '0' and wait *at least* 500 milliseconds for PxCMD.FR to return '0' when
> > read.
> >
> > It's "at least", not "up to".
>
> That still doesn't make the code right. So make it wait 1 seconds max,
> but don't delay 500msec at the beginning. That's my problem.
OK. I'll fix it after we collect all comments from mailing list :)
Forrest
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
2006-06-02 7:44 [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx() zhao, forrest
2006-06-02 8:08 ` Hannes Reinecke
2006-06-02 9:15 ` Jens Axboe
@ 2006-06-03 12:51 ` Tejun Heo
2006-06-03 19:10 ` Jeff Garzik
2 siblings, 1 reply; 14+ messages in thread
From: Tejun Heo @ 2006-06-03 12:51 UTC (permalink / raw)
To: zhao, forrest; +Cc: jeff, hare, axboe, jeremy, lkml, linux-ide
On Fri, Jun 02, 2006 at 03:44:55PM +0800, zhao, forrest wrote:
> +static int ahci_stop_fis_rx(void __iomem *port_mmio)
> +{
> + u32 tmp;
> + int work = 1000;
> +
> + /*
> + * Get current status
> + */
> + tmp = readl(port_mmio + PORT_CMD);
> +
> + /* Check if FIS RX is already disabled */
> + if ((tmp & PORT_CMD_FIS_RX) == 0)
> + return 0;
> +
> + /*
> + * AHCI Rev 1.1 section 10.3.2
> + * Software shall not clear PxCMD.FRE while
> + * PxCMD.ST or PxCMD.CR is set to '1'
> + */
> + if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_START)) {
> + return -EPERM;
> + }
Same here. I'm not sure whether the above two tests are necessary,
but that might be just me. :)
> + /*
> + * Disable FIS reception
> + *
> + * AHCI Rev 1.1 Section 10.1.2:
> + * If PxCMD.FRE is set to '1', software should clear it
> + * to '0' and wait at least 500 milliseconds for PxCMD.FR
> + * to return '0' when read. If PxCMD.FR does not clear
> + * '0' correctly, then software may attempt a port reset
> + * of a full HBA reset to recover.
> + */
> + tmp &= ~(PORT_CMD_FIS_RX);
> + writel(tmp, port_mmio + PORT_CMD);
> +
> + mdelay(500);
> + work = 1000;
> + while (work-- > 0) {
> + tmp = readl(port_mmio + PORT_CMD);
> + if ((tmp & PORT_CMD_FIS_ON) == 0)
> + return 0;
> + udelay(10);
> + }
Please convert to ata_wait_register(). Also, I share Jens' opinion.
The way I read the spec is that the timeout should be at least 500ms
not that we have to wait 500ms before polling for !FIS_ON.
--
tejun
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
2006-06-03 12:51 ` Tejun Heo
@ 2006-06-03 19:10 ` Jeff Garzik
0 siblings, 0 replies; 14+ messages in thread
From: Jeff Garzik @ 2006-06-03 19:10 UTC (permalink / raw)
To: Tejun Heo; +Cc: zhao, forrest, hare, axboe, jeremy, lkml, linux-ide
On Sat, Jun 03, 2006 at 09:51:20PM +0900, Tejun Heo wrote:
> Please convert to ata_wait_register(). Also, I share Jens' opinion.
> The way I read the spec is that the timeout should be at least 500ms
> not that we have to wait 500ms before polling for !FIS_ON.
Correct.
Jeff
P.S. FWIW I'm still travelling. Have email, but no merges until June 8.
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
@ 2006-06-06 10:16 zhao, forrest
0 siblings, 0 replies; 14+ messages in thread
From: zhao, forrest @ 2006-06-06 10:16 UTC (permalink / raw)
To: jeff, hare, axboe, htejun, jeremy, lkml; +Cc: linux-ide
Put the "start/stop FIS RX" operation into ahci_start_fis_rx() and
ahci_stop_fis_rx().
Signed-off-by: Forrest Zhao <forrest.zhaot@intel.com>
Signed-off-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Jens Axboe <axboe@suse.de>
---
drivers/scsi/ahci.c | 75 +++++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 75 insertions(+), 0 deletions(-)
8098bbd92f7eacf5c40c01feb71fe88b88cb5745
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index be2cba8..2ad26cd 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -202,6 +202,10 @@ static unsigned int ahci_qc_issue(struct
static irqreturn_t ahci_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
static int ahci_start_engine(void __iomem *port_mmio);
static int ahci_stop_engine(void __iomem *port_mmio);
+static void ahci_start_fis_rx(void __iomem *port_mmio,
+ struct ahci_port_priv *pp,
+ struct ahci_host_priv *hpriv);
+static int ahci_stop_fis_rx(void __iomem *port_mmio);
static int ahci_probe_reset(struct ata_port *ap, unsigned int *classes);
static void ahci_irq_clear(struct ata_port *ap);
static int ahci_port_start(struct ata_port *ap);
@@ -544,6 +548,77 @@ static int ahci_start_engine(void __iome
return 0;
}
+static int ahci_stop_fis_rx(void __iomem *port_mmio)
+{
+ u32 tmp;
+
+ /*
+ * Get current status
+ */
+ tmp = readl(port_mmio + PORT_CMD);
+
+ /* Check if FIS RX is already disabled */
+ if ((tmp & PORT_CMD_FIS_RX) == 0)
+ return 0;
+
+ /*
+ * AHCI Rev 1.1 section 10.3.2
+ * Software shall not clear PxCMD.FRE while
+ * PxCMD.ST or PxCMD.CR is set to '1'
+ */
+ if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_START)) {
+ return -EPERM;
+ }
+
+ /*
+ * Disable FIS reception
+ *
+ * AHCI Rev 1.1 Section 10.1.2:
+ * If PxCMD.FRE is set to '1', software should clear it
+ * to '0' and wait at least 500 milliseconds for PxCMD.FR
+ * to return '0' when read. If PxCMD.FR does not clear
+ * '0' correctly, then software may attempt a port reset
+ * of a full HBA reset to recover.
+ */
+ tmp &= ~(PORT_CMD_FIS_RX);
+ writel(tmp, port_mmio + PORT_CMD);
+
+ tmp = ata_wait_register(port_mmio + PORT_CMD, PORT_CMD_FIS_ON,
+ PORT_CMD_FIS_ON, 1, 1000);
+ if(tmp & PORT_CMD_FIS_ON)
+ return -EBUSY;
+
+ return 0;
+}
+
+static void ahci_start_fis_rx(void __iomem *port_mmio,
+ struct ahci_port_priv *pp,
+ struct ahci_host_priv *hpriv)
+{
+ u32 tmp;
+
+ /*
+ * Set FIS registers
+ */
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->cmd_slot_dma >> 16) >> 16, port_mmio + PORT_LST_ADDR_HI);
+ writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
+ readl(port_mmio + PORT_LST_ADDR); /* flush */
+
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->rx_fis_dma >> 16) >> 16, port_mmio + PORT_FIS_ADDR_HI);
+ writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR);
+ readl(port_mmio + PORT_FIS_ADDR); /* flush */
+
+ /*
+ * Enable FIS reception
+ */
+ tmp = readl(port_mmio + PORT_CMD);
+ tmp |= PORT_CMD_FIS_RX;
+ writel(tmp, port_mmio + PORT_CMD);
+ readl(port_mmio + PORT_CMD); /* flush */
+}
+
static unsigned int ahci_dev_classify(struct ata_port *ap)
{
void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
--
1.2.6
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
@ 2006-06-29 8:18 zhao, forrest
0 siblings, 0 replies; 14+ messages in thread
From: zhao, forrest @ 2006-06-29 8:18 UTC (permalink / raw)
To: jgarzik, htejun, hare, axboe; +Cc: linux-ide
Put the "start/stop FIS RX" operation into ahci_start_fis_rx() and
ahci_stop_fis_rx().
Signed-off-by: Forrest Zhao <forrest.zhaot@intel.com>
Signed-off-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Jens Axboe <axboe@suse.de>
---
drivers/scsi/ahci.c | 75 +++++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 75 insertions(+), 0 deletions(-)
a94f89e6d8fecdbc0b196a69c0c966df9eb5c648
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index 0ff8be1..f4dd60c 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -207,6 +207,10 @@ static int ahci_port_start(struct ata_po
static void ahci_port_stop(struct ata_port *ap);
static int ahci_start_engine(void __iomem *port_mmio);
static int ahci_stop_engine(void __iomem *port_mmio);
+static void ahci_start_fis_rx(void __iomem *port_mmio,
+ struct ahci_port_priv *pp,
+ struct ahci_host_priv *hpriv);
+static int ahci_stop_fis_rx(void __iomem *port_mmio);
static void ahci_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
static void ahci_qc_prep(struct ata_queued_cmd *qc);
static u8 ahci_check_status(struct ata_port *ap);
@@ -570,6 +574,77 @@ static int ahci_start_engine(void __iome
return 0;
}
+static int ahci_stop_fis_rx(void __iomem *port_mmio)
+{
+ u32 tmp;
+
+ /*
+ * Get current status
+ */
+ tmp = readl(port_mmio + PORT_CMD);
+
+ /* Check if FIS RX is already disabled */
+ if ((tmp & PORT_CMD_FIS_RX) == 0)
+ return 0;
+
+ /*
+ * AHCI Rev 1.1 section 10.3.2
+ * Software shall not clear PxCMD.FRE while
+ * PxCMD.ST or PxCMD.CR is set to '1'
+ */
+ if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_START)) {
+ return -EPERM;
+ }
+
+ /*
+ * Disable FIS reception
+ *
+ * AHCI Rev 1.1 Section 10.1.2:
+ * If PxCMD.FRE is set to '1', software should clear it
+ * to '0' and wait at least 500 milliseconds for PxCMD.FR
+ * to return '0' when read. If PxCMD.FR does not clear
+ * '0' correctly, then software may attempt a port reset
+ * of a full HBA reset to recover.
+ */
+ tmp &= ~(PORT_CMD_FIS_RX);
+ writel(tmp, port_mmio + PORT_CMD);
+
+ tmp = ata_wait_register(port_mmio + PORT_CMD, PORT_CMD_FIS_ON,
+ PORT_CMD_FIS_ON, 1, 1000);
+ if(tmp & PORT_CMD_FIS_ON)
+ return -EBUSY;
+
+ return 0;
+}
+
+static void ahci_start_fis_rx(void __iomem *port_mmio,
+ struct ahci_port_priv *pp,
+ struct ahci_host_priv *hpriv)
+{
+ u32 tmp;
+
+ /*
+ * Set FIS registers
+ */
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->cmd_slot_dma >> 16) >> 16, port_mmio + PORT_LST_ADDR_HI);
+ writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
+ readl(port_mmio + PORT_LST_ADDR); /* flush */
+
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->rx_fis_dma >> 16) >> 16, port_mmio + PORT_FIS_ADDR_HI);
+ writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR);
+ readl(port_mmio + PORT_FIS_ADDR); /* flush */
+
+ /*
+ * Enable FIS reception
+ */
+ tmp = readl(port_mmio + PORT_CMD);
+ tmp |= PORT_CMD_FIS_RX;
+ writel(tmp, port_mmio + PORT_CMD);
+ readl(port_mmio + PORT_CMD); /* flush */
+}
+
static unsigned int ahci_dev_classify(struct ata_port *ap)
{
void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
--
1.2.6
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
@ 2006-07-10 3:35 zhao, forrest
2006-07-10 17:08 ` Jens Axboe
0 siblings, 1 reply; 14+ messages in thread
From: zhao, forrest @ 2006-07-10 3:35 UTC (permalink / raw)
To: jgarzik, htejun, hare, axboe; +Cc: linux-ide
Put the "start/stop FIS RX" operation into ahci_start_fis_rx() and
ahci_stop_fis_rx().
Signed-off-by: Forrest Zhao <forrest.zhaot@intel.com>
Signed-off-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Jens Axboe <axboe@suse.de>
---
drivers/scsi/ahci.c | 75 ++++++++++++++++++++++++++++++++++++++++++++
+++++++
1 files changed, 75 insertions(+), 0 deletions(-)
8098bbd92f7eacf5c40c01feb71fe88b88cb5745
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index be2cba8..2ad26cd 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -202,6 +202,10 @@ static unsigned int ahci_qc_issue(struct
static irqreturn_t ahci_interrupt (int irq, void *dev_instance, struct
pt_regs *regs);
static int ahci_start_engine(void __iomem *port_mmio);
static int ahci_stop_engine(void __iomem *port_mmio);
+static void ahci_start_fis_rx(void __iomem *port_mmio,
+ struct ahci_port_priv *pp,
+ struct ahci_host_priv *hpriv);
+static int ahci_stop_fis_rx(void __iomem *port_mmio);
static int ahci_probe_reset(struct ata_port *ap, unsigned int
*classes);
static void ahci_irq_clear(struct ata_port *ap);
static int ahci_port_start(struct ata_port *ap);
@@ -544,6 +548,77 @@ static int ahci_start_engine(void __iome
return 0;
}
+static int ahci_stop_fis_rx(void __iomem *port_mmio)
+{
+ u32 tmp;
+
+ /*
+ * Get current status
+ */
+ tmp = readl(port_mmio + PORT_CMD);
+
+ /* Check if FIS RX is already disabled */
+ if ((tmp & PORT_CMD_FIS_RX) == 0)
+ return 0;
+
+ /*
+ * AHCI Rev 1.1 section 10.3.2
+ * Software shall not clear PxCMD.FRE while
+ * PxCMD.ST or PxCMD.CR is set to '1'
+ */
+ if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_START)) {
+ return -EPERM;
+ }
+
+ /*
+ * Disable FIS reception
+ *
+ * AHCI Rev 1.1 Section 10.1.2:
+ * If PxCMD.FRE is set to '1', software should clear it
+ * to '0' and wait at least 500 milliseconds for PxCMD.FR
+ * to return '0' when read. If PxCMD.FR does not clear
+ * '0' correctly, then software may attempt a port reset
+ * of a full HBA reset to recover.
+ */
+ tmp &= ~(PORT_CMD_FIS_RX);
+ writel(tmp, port_mmio + PORT_CMD);
+
+ tmp = ata_wait_register(port_mmio + PORT_CMD, PORT_CMD_FIS_ON,
+ PORT_CMD_FIS_ON, 1, 1000);
+ if(tmp & PORT_CMD_FIS_ON)
+ return -EBUSY;
+
+ return 0;
+}
+
+static void ahci_start_fis_rx(void __iomem *port_mmio,
+ struct ahci_port_priv *pp,
+ struct ahci_host_priv *hpriv)
+{
+ u32 tmp;
+
+ /*
+ * Set FIS registers
+ */
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->cmd_slot_dma >> 16) >> 16, port_mmio + PORT_LST_ADDR_HI);
+ writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
+ readl(port_mmio + PORT_LST_ADDR); /* flush */
+
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->rx_fis_dma >> 16) >> 16, port_mmio + PORT_FIS_ADDR_HI);
+ writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR);
+ readl(port_mmio + PORT_FIS_ADDR); /* flush */
+
+ /*
+ * Enable FIS reception
+ */
+ tmp = readl(port_mmio + PORT_CMD);
+ tmp |= PORT_CMD_FIS_RX;
+ writel(tmp, port_mmio + PORT_CMD);
+ readl(port_mmio + PORT_CMD); /* flush */
+}
+
static unsigned int ahci_dev_classify(struct ata_port *ap)
{
void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
--
1.2.6
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
2006-07-10 3:35 zhao, forrest
@ 2006-07-10 17:08 ` Jens Axboe
0 siblings, 0 replies; 14+ messages in thread
From: Jens Axboe @ 2006-07-10 17:08 UTC (permalink / raw)
To: zhao, forrest; +Cc: jgarzik, htejun, hare, linux-ide
On Mon, Jul 10 2006, zhao, forrest wrote:
> Put the "start/stop FIS RX" operation into ahci_start_fis_rx() and
> ahci_stop_fis_rx().
>
> Signed-off-by: Forrest Zhao <forrest.zhaot@intel.com>
> Signed-off-by: Hannes Reinecke <hare@suse.de>
> Signed-off-by: Jens Axboe <axboe@suse.de>
this patch has line-wrapping issues, it cannot apply.
--
Jens Axboe
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
@ 2006-07-11 6:37 zhao, forrest
0 siblings, 0 replies; 14+ messages in thread
From: zhao, forrest @ 2006-07-11 6:37 UTC (permalink / raw)
To: jgarzik, htejun, hare, axboe; +Cc: linux-ide
Put the "start/stop FIS RX" operation into ahci_start_fis_rx() and
ahci_stop_fis_rx().
Signed-off-by: Forrest Zhao <forrest.zhaot@intel.com>
Signed-off-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Jens Axboe <axboe@suse.de>
---
drivers/scsi/ahci.c | 75 ++++++++++++++++++++++++++++++++++++++++++++
+++++++
1 files changed, 75 insertions(+), 0 deletions(-)
a94f89e6d8fecdbc0b196a69c0c966df9eb5c648
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index 0ff8be1..f4dd60c 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -207,6 +207,10 @@ static int ahci_port_start(struct ata_po
static void ahci_port_stop(struct ata_port *ap);
static int ahci_start_engine(void __iomem *port_mmio);
static int ahci_stop_engine(void __iomem *port_mmio);
+static void ahci_start_fis_rx(void __iomem *port_mmio,
+ struct ahci_port_priv *pp,
+ struct ahci_host_priv *hpriv);
+static int ahci_stop_fis_rx(void __iomem *port_mmio);
static void ahci_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
static void ahci_qc_prep(struct ata_queued_cmd *qc);
static u8 ahci_check_status(struct ata_port *ap);
@@ -570,6 +574,77 @@ static int ahci_start_engine(void __iome
return 0;
}
+static int ahci_stop_fis_rx(void __iomem *port_mmio)
+{
+ u32 tmp;
+
+ /*
+ * Get current status
+ */
+ tmp = readl(port_mmio + PORT_CMD);
+
+ /* Check if FIS RX is already disabled */
+ if ((tmp & PORT_CMD_FIS_RX) == 0)
+ return 0;
+
+ /*
+ * AHCI Rev 1.1 section 10.3.2
+ * Software shall not clear PxCMD.FRE while
+ * PxCMD.ST or PxCMD.CR is set to '1'
+ */
+ if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_START)) {
+ return -EPERM;
+ }
+
+ /*
+ * Disable FIS reception
+ *
+ * AHCI Rev 1.1 Section 10.1.2:
+ * If PxCMD.FRE is set to '1', software should clear it
+ * to '0' and wait at least 500 milliseconds for PxCMD.FR
+ * to return '0' when read. If PxCMD.FR does not clear
+ * '0' correctly, then software may attempt a port reset
+ * of a full HBA reset to recover.
+ */
+ tmp &= ~(PORT_CMD_FIS_RX);
+ writel(tmp, port_mmio + PORT_CMD);
+
+ tmp = ata_wait_register(port_mmio + PORT_CMD, PORT_CMD_FIS_ON,
+ PORT_CMD_FIS_ON, 1, 1000);
+ if(tmp & PORT_CMD_FIS_ON)
+ return -EBUSY;
+
+ return 0;
+}
+
+static void ahci_start_fis_rx(void __iomem *port_mmio,
+ struct ahci_port_priv *pp,
+ struct ahci_host_priv *hpriv)
+{
+ u32 tmp;
+
+ /*
+ * Set FIS registers
+ */
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->cmd_slot_dma >> 16) >> 16, port_mmio + PORT_LST_ADDR_HI);
+ writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
+ readl(port_mmio + PORT_LST_ADDR); /* flush */
+
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->rx_fis_dma >> 16) >> 16, port_mmio + PORT_FIS_ADDR_HI);
+ writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR);
+ readl(port_mmio + PORT_FIS_ADDR); /* flush */
+
+ /*
+ * Enable FIS reception
+ */
+ tmp = readl(port_mmio + PORT_CMD);
+ tmp |= PORT_CMD_FIS_RX;
+ writel(tmp, port_mmio + PORT_CMD);
+ readl(port_mmio + PORT_CMD); /* flush */
+}
+
static unsigned int ahci_dev_classify(struct ata_port *ap)
{
void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
--
1.2.6
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx()
@ 2006-07-13 5:38 zhao, forrest
0 siblings, 0 replies; 14+ messages in thread
From: zhao, forrest @ 2006-07-13 5:38 UTC (permalink / raw)
To: jgarzik, htejun, hare, axboe; +Cc: linux-ide
Put the "start/stop FIS RX" operation into ahci_start_fis_rx() and
ahci_stop_fis_rx().
Signed-off-by: Forrest Zhao <forrest.zhao@intel.com>
Signed-off-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Jens Axboe <axboe@suse.de>
---
drivers/scsi/ahci.c | 75 ++++++++++++++++++++++++++++++++++++++++++++
+++++++
1 files changed, 75 insertions(+), 0 deletions(-)
e8b302fd248ec99f6c4cf99c468b467f585e7818
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index f1516ca..5bed7c3 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -207,6 +207,10 @@ static int ahci_port_start(struct ata_po
static void ahci_port_stop(struct ata_port *ap);
static int ahci_start_engine(void __iomem *port_mmio);
static int ahci_stop_engine(void __iomem *port_mmio);
+static void ahci_start_fis_rx(void __iomem *port_mmio,
+ struct ahci_port_priv *pp,
+ struct ahci_host_priv *hpriv);
+static int ahci_stop_fis_rx(void __iomem *port_mmio);
static void ahci_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
static void ahci_qc_prep(struct ata_queued_cmd *qc);
static u8 ahci_check_status(struct ata_port *ap);
@@ -570,6 +574,77 @@ static int ahci_start_engine(void __iome
return 0;
}
+static int ahci_stop_fis_rx(void __iomem *port_mmio)
+{
+ u32 tmp;
+
+ /*
+ * Get current status
+ */
+ tmp = readl(port_mmio + PORT_CMD);
+
+ /* Check if FIS RX is already disabled */
+ if ((tmp & PORT_CMD_FIS_RX) == 0)
+ return 0;
+
+ /*
+ * AHCI Rev 1.1 section 10.3.2
+ * Software shall not clear PxCMD.FRE while
+ * PxCMD.ST or PxCMD.CR is set to '1'
+ */
+ if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_START)) {
+ return -EPERM;
+ }
+
+ /*
+ * Disable FIS reception
+ *
+ * AHCI Rev 1.1 Section 10.1.2:
+ * If PxCMD.FRE is set to '1', software should clear it
+ * to '0' and wait at least 500 milliseconds for PxCMD.FR
+ * to return '0' when read. If PxCMD.FR does not clear
+ * '0' correctly, then software may attempt a port reset
+ * of a full HBA reset to recover.
+ */
+ tmp &= ~(PORT_CMD_FIS_RX);
+ writel(tmp, port_mmio + PORT_CMD);
+
+ tmp = ata_wait_register(port_mmio + PORT_CMD, PORT_CMD_FIS_ON,
+ PORT_CMD_FIS_ON, 1, 1000);
+ if(tmp & PORT_CMD_FIS_ON)
+ return -EBUSY;
+
+ return 0;
+}
+
+static void ahci_start_fis_rx(void __iomem *port_mmio,
+ struct ahci_port_priv *pp,
+ struct ahci_host_priv *hpriv)
+{
+ u32 tmp;
+
+ /*
+ * Set FIS registers
+ */
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->cmd_slot_dma >> 16) >> 16, port_mmio + PORT_LST_ADDR_HI);
+ writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
+ readl(port_mmio + PORT_LST_ADDR); /* flush */
+
+ if (hpriv->cap & HOST_CAP_64)
+ writel((pp->rx_fis_dma >> 16) >> 16, port_mmio + PORT_FIS_ADDR_HI);
+ writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR);
+ readl(port_mmio + PORT_FIS_ADDR); /* flush */
+
+ /*
+ * Enable FIS reception
+ */
+ tmp = readl(port_mmio + PORT_CMD);
+ tmp |= PORT_CMD_FIS_RX;
+ writel(tmp, port_mmio + PORT_CMD);
+ readl(port_mmio + PORT_CMD); /* flush */
+}
+
static unsigned int ahci_dev_classify(struct ata_port *ap)
{
void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
--
1.2.6
^ permalink raw reply related [flat|nested] 14+ messages in thread
end of thread, other threads:[~2006-07-13 5:52 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2006-06-02 7:44 [PATCH 2/6] The definition of ahci_start_fis_rx() and ahci_stop_fis_rx() zhao, forrest
2006-06-02 8:08 ` Hannes Reinecke
2006-06-02 9:15 ` Jens Axboe
2006-06-02 9:09 ` zhao, forrest
2006-06-02 9:26 ` Jens Axboe
2006-06-02 9:21 ` zhao, forrest
2006-06-03 12:51 ` Tejun Heo
2006-06-03 19:10 ` Jeff Garzik
-- strict thread matches above, loose matches on Subject: below --
2006-06-06 10:16 zhao, forrest
2006-06-29 8:18 zhao, forrest
2006-07-10 3:35 zhao, forrest
2006-07-10 17:08 ` Jens Axboe
2006-07-11 6:37 zhao, forrest
2006-07-13 5:38 zhao, forrest
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