From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tejun Heo Subject: Re: [PATCH] sata_sil: update device hotplug handling Date: Mon, 12 Jun 2006 16:42:15 +0900 Message-ID: <448D1AD7.3000807@gmail.com> References: <20060612051822.GE9166@htj.dyndns.org> <448D04C5.9030603@pobox.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: Received: from py-out-1112.google.com ([64.233.166.183]:60307 "EHLO py-out-1112.google.com") by vger.kernel.org with ESMTP id S1750809AbWFLHmV (ORCPT ); Mon, 12 Jun 2006 03:42:21 -0400 Received: by py-out-1112.google.com with SMTP id x31so1603477pye for ; Mon, 12 Jun 2006 00:42:21 -0700 (PDT) In-Reply-To: <448D04C5.9030603@pobox.com> Sender: linux-ide-owner@vger.kernel.org List-Id: linux-ide@vger.kernel.org To: Jeff Garzik Cc: linux-ide@vger.kernel.org Jeff Garzik wrote: > Tejun Heo wrote: >> Some flavors of 3112 cannot mask SATA_IRQ reliably and ends up >> scheduling hotplug event during hardreset. >=20 > Can you give more detail? This sounds like a software bug? I don't = see=20 > SError clearing the pre-patched code path, the lack of which may crea= te=20 > the conditions you describe. This is from a sil3112 PCMCIA card. # lspci -nvvv -s 07:00 0000:07:00.0 0180: 1095:3112 (rev 02) Subsystem: 1095:3112 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-=20 ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=3Dmedium=20 >TAbort- SERR-