Tejun Heo wrote:
> Hello, Andi.
> 
> Andi Kleen wrote:
>> Still doesn't work with it - see 
>> http://one.firstfloor.org/~andi/sata3.jpg
> 
> * SATA_IRQ bit is stuck (on all other sil controllers, this gets cleared 
> when SError is cleared)
> 
> * whenever interrupt occurs (from itself or from any other ones sharing 
> the IRQ), irq handler sees SATA_IRQ bit set and thus thinks it just 
> received phy status changed IRQ.
> 
> * phy status change aborts the active command, so no command gets 
> completed.
> 
> I'm attaching two patches.  The first one tries to clear SATA_IRQ by 
> writing 1 to it in thaw() assuming the bit is implemented as W1C (which 
> BTW is out of spec).  The second one kills SATA_IRQ handling completely. 
>  I wish the first one works but if not I'll update the second one such 
> that it applies only to ATI IXP.

And another one, just in case they were crazy enough to implement the 
bit as RW.

-- 
tejun