From: Jeff Garzik <jgarzik@pobox.com>
To: Tejun Heo <htejun@gmail.com>
Cc: nabiki@teleline.es, Keith Owens <kaos@ocs.com.au>,
stevenm@umd.edu, jfs@keytradebank.com, 0602@eq.cz,
Andrew Morton <akpm@osdl.org>,
"linux-ide@vger.kernel.org" <linux-ide@vger.kernel.org>
Subject: Re: Continuing ata_piix PCS saga...
Date: Tue, 26 Sep 2006 17:33:26 -0400 [thread overview]
Message-ID: <45199CA6.3050308@pobox.com> (raw)
In-Reply-To: <450F6F21.7080909@gmail.com>
Judging from early Intel responses, on ICH >= 6, we should use SATA phy
registers via AHCI space rather than PCS.
[implying, I suppose, that PCS must be used when there is no AHCI PCI
BAR address assigned]
Still waiting on further response from Intel...
Jeff
prev parent reply other threads:[~2006-09-26 21:33 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-09-19 4:16 Continuing ata_piix PCS saga Tejun Heo
2006-09-26 21:33 ` Jeff Garzik [this message]
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