sata_sil and byte-aligned mmio

sata_sil and byte-aligned mmio

[Kevin Hilman]

Tejun,

A while back you provided a patch for sata_sil to use PCI IO space since
so that it can work on hardware that doesn't support byte-aligned MMIO.

I'd like to see a fix for this pushed upstream, but IIRC, Jeff Garzik
prefers that the driver be fixed up to use 32-bit aligned MMIO instead
of making the driver use IO space.

If you can point me in the right direction, as to where the
byte-alignement assumtions are, I can fix up the driver and test it on
my hardware.

Thanks,

Kevin

Re: sata_sil and byte-aligned mmio

[Tejun Heo]

Hello, Kevin.

Kevin Hilman wrote:
> Tejun,
> 
> A while back you provided a patch for sata_sil to use PCI IO space since
> so that it can work on hardware that doesn't support byte-aligned MMIO.
> 
> I'd like to see a fix for this pushed upstream, but IIRC, Jeff Garzik
> prefers that the driver be fixed up to use 32-bit aligned MMIO instead
> of making the driver use IO space.
> 
> If you can point me in the right direction, as to where the
> byte-alignement assumtions are, I can fix up the driver and test it on
> my hardware.

Byte-aligned IO accesses are in the default ATA operations - 
ata_tf_load/read, ata_check_status, ata_exec_command, 
ata_std_dev_select, all the bmdma ops, etc...  Basically, traditional 
ATA interface is designed to use byte-aligned registers to operate.

sil3112 family of controllers allow all those ops implemented using 
32bit ops, so you need to implement sata_sil's own methods to replace 
those standard byte-aligned ops.  I don't think it's gonna be too difficult.

Good luck. :-)

-- 
tejun

Re: sata_sil and byte-aligned mmio

[Tejun Heo]

Tejun Heo wrote:
> Hello, Kevin.
> 
> Kevin Hilman wrote:
>> Tejun,
>>
>> A while back you provided a patch for sata_sil to use PCI IO space since
>> so that it can work on hardware that doesn't support byte-aligned MMIO.
>>
>> I'd like to see a fix for this pushed upstream, but IIRC, Jeff Garzik
>> prefers that the driver be fixed up to use 32-bit aligned MMIO instead
>> of making the driver use IO space.
>>
>> If you can point me in the right direction, as to where the
>> byte-alignement assumtions are, I can fix up the driver and test it on
>> my hardware.
> 
> Byte-aligned IO accesses are in the default ATA operations - 
> ata_tf_load/read, ata_check_status, ata_exec_command, 
> ata_std_dev_select, all the bmdma ops, etc...  Basically, traditional 
> ATA interface is designed to use byte-aligned registers to operate.
> 
> sil3112 family of controllers allow all those ops implemented using 
> 32bit ops, so you need to implement sata_sil's own methods to replace 
> those standard byte-aligned ops.  I don't think it's gonna be too 
> difficult.

Oh, and just in case you don't have them already, the specs are 
available at the following URL.

http://gkernel.sourceforge.net/specs/sii/

-- 
tejun