* [PATCH 2.6.19-rc6][RESEND] ata_piix: IDE mode SATA patch for Intel ICH9
@ 2006-11-22 20:36 Jason Gaston
2006-11-22 23:55 ` Tejun Heo
2006-11-28 8:41 ` Jeff Garzik
0 siblings, 2 replies; 8+ messages in thread
From: Jason Gaston @ 2006-11-22 20:36 UTC (permalink / raw)
To: jgarzik, linux-ide, linux-kernel, jason.d.gaston, htejun
This updated patch adds the Intel ICH9 IDE mode SATA controller DID's.
Signed-off-by: Jason Gaston <jason.d.gaston@intel.com>
--- linux-2.6.19-rc6/drivers/ata/ata_piix.c.orig 2006-11-20 04:58:48.000000000 -0800
+++ linux-2.6.19-rc6/drivers/ata/ata_piix.c 2006-11-22 02:59:05.000000000 -0800
@@ -227,15 +227,27 @@
{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
/* 2801GBM/GHM (ICH7M, identical to ICH6M) */
{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci },
- /* Enterprise Southbridge 2 (where's the datasheet?) */
+ /* Enterprise Southbridge 2 (631xESB/632xESB) */
{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
- /* SATA Controller 1 IDE (ICH8, no datasheet yet) */
+ /* SATA Controller 1 IDE (ICH8) */
{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
- /* SATA Controller 2 IDE (ICH8, ditto) */
+ /* SATA Controller 2 IDE (ICH8) */
{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
- /* Mobile SATA Controller IDE (ICH8M, ditto) */
+ /* Mobile SATA Controller IDE (ICH8M) */
{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
-
+ /* SATA Controller IDE (ICH9) */
+ { 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
+ /* SATA Controller IDE (ICH9) */
+ { 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
+ /* SATA Controller IDE (ICH9) */
+ { 0x8086, 0x2926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
+ /* SATA Controller IDE (ICH9M) */
+ { 0x8086, 0x2928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
+ /* SATA Controller IDE (ICH9M) */
+ { 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
+ /* SATA Controller IDE (ICH9M) */
+ { 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
+
{ } /* terminate list */
};
^ permalink raw reply [flat|nested] 8+ messages in thread* RE: [PATCH 2.6.19-rc6][RESEND] ata_piix: IDE mode SATA patch for Intel ICH9
@ 2006-11-28 18:05 Gaston, Jason D
0 siblings, 0 replies; 8+ messages in thread
From: Gaston, Jason D @ 2006-11-28 18:05 UTC (permalink / raw)
To: Jeff Garzik; +Cc: linux-ide, linux-kernel, htejun
Yes, I sent an updated patch that uses the ICH8 structures.
Do you need me to send this again.
Jason
>-----Original Message-----
>From: Jeff Garzik [mailto:jgarzik@pobox.com]
>Sent: Tuesday, November 28, 2006 12:41 AM
>To: Gaston, Jason D
>Cc: linux-ide@vger.kernel.org; linux-kernel@vger.kernel.org;
>htejun@gmail.com
>Subject: Re: [PATCH 2.6.19-rc6][RESEND] ata_piix: IDE mode SATA patch
for
>Intel ICH9
>
>did I see a resend of this floating around?
>
>I can't apply this one...
>
>Looks OK though
^ permalink raw reply [flat|nested] 8+ messages in thread
* RE: [PATCH 2.6.19-rc6][RESEND] ata_piix: IDE mode SATA patch for Intel ICH9
@ 2006-11-22 1:30 Gaston, Jason D
2006-11-22 1:43 ` Tejun Heo
0 siblings, 1 reply; 8+ messages in thread
From: Gaston, Jason D @ 2006-11-22 1:30 UTC (permalink / raw)
To: Tejun Heo; +Cc: jgarzik, linux-ide, linux-kernel
I was thinking that if a functional difference was found, it would be
easier to tweak.
There are differences between the ICH8 and ICH9 SATA controller. For
example, the PCS register now has port present bits that used to be
reserved in ICH8. I'm not sure how or if these could be used in
ata_piix.
Jason
>-----Original Message-----
>From: Tejun Heo [mailto:htejun@gmail.com]
>Sent: Tuesday, November 21, 2006 5:23 PM
>To: Gaston, Jason D
>Cc: jgarzik@pobox.com; linux-ide@vger.kernel.org; linux-
>kernel@vger.kernel.org
>Subject: Re: [PATCH 2.6.19-rc6][RESEND] ata_piix: IDE mode SATA patch
for
>Intel ICH9
>
>Jason Gaston wrote:
>> This patch adds the Intel ICH9 IDE mode SATA controller DID's.
>>
>> Signed-off-by: Jason Gaston <jason.d.gaston@intel.com>
>>
>> --- linux-2.6.19-rc6/drivers/ata/ata_piix.c.orig 2006-11-20
>04:58:48.000000000 -0800
>> +++ linux-2.6.19-rc6/drivers/ata/ata_piix.c 2006-11-20
>06:15:12.000000000 -0800
>
>Yeap, it came through fine this time, but ich8 and ich9 are identical
>from ata_piix's point of view. Don't add ich9_sata_ahci, just use
>ich8_sata_ahci.
>
>--
>tejun
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2.6.19-rc6][RESEND] ata_piix: IDE mode SATA patch for Intel ICH9
2006-11-22 1:30 Gaston, Jason D
@ 2006-11-22 1:43 ` Tejun Heo
0 siblings, 0 replies; 8+ messages in thread
From: Tejun Heo @ 2006-11-22 1:43 UTC (permalink / raw)
To: Gaston, Jason D; +Cc: jgarzik, linux-ide, linux-kernel
Gaston, Jason D wrote:
> I was thinking that if a functional difference was found, it would be
> easier to tweak.
>
> There are differences between the ICH8 and ICH9 SATA controller. For
> example, the PCS register now has port present bits that used to be
> reserved in ICH8. I'm not sure how or if these could be used in
> ata_piix.
Separating ich9 out from ich8 isn't difficult. Let's do that when there
is need. ata_piix always has been using the same entry if there is no
code difference and I don't see any reason to depart from that with ich9.
Thanks.
--
tejun
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2.6.19-rc6][RESEND] ata_piix: IDE mode SATA patch for Intel ICH9
@ 2006-11-22 0:53 Jason Gaston
2006-11-22 1:22 ` Tejun Heo
0 siblings, 1 reply; 8+ messages in thread
From: Jason Gaston @ 2006-11-22 0:53 UTC (permalink / raw)
To: jgarzik, linux-ide, linux-kernel, jason.d.gaston
This patch adds the Intel ICH9 IDE mode SATA controller DID's.
Signed-off-by: Jason Gaston <jason.d.gaston@intel.com>
--- linux-2.6.19-rc6/drivers/ata/ata_piix.c.orig 2006-11-20 04:58:48.000000000 -0800
+++ linux-2.6.19-rc6/drivers/ata/ata_piix.c 2006-11-20 06:15:12.000000000 -0800
@@ -127,6 +127,7 @@
ich6_sata_ahci = 8,
ich6m_sata_ahci = 9,
ich8_sata_ahci = 10,
+ ich9_sata_ahci = 11,
/* constants for mapping table */
P0 = 0, /* port 0 */
@@ -227,14 +228,26 @@
{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
/* 2801GBM/GHM (ICH7M, identical to ICH6M) */
{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci },
- /* Enterprise Southbridge 2 (where's the datasheet?) */
+ /* Enterprise Southbridge 2 (631xESB/632xESB) */
{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
- /* SATA Controller 1 IDE (ICH8, no datasheet yet) */
+ /* SATA Controller 1 IDE (ICH8) */
{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
- /* SATA Controller 2 IDE (ICH8, ditto) */
+ /* SATA Controller 2 IDE (ICH8) */
{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
- /* Mobile SATA Controller IDE (ICH8M, ditto) */
+ /* Mobile SATA Controller IDE (ICH8M) */
{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
+ /* SATA Controller 1 IDE (ICH9) */
+ { 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_sata_ahci },
+ /* SATA Controller 1 IDE (ICH9) */
+ { 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_sata_ahci },
+ /* SATA Controller 2 IDE (ICH9) */
+ { 0x8086, 0x2926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_sata_ahci },
+ /* Mobile SATA Controller 1 IDE (ICH9M) */
+ { 0x8086, 0x2928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_sata_ahci },
+ /* Mobile SATA Controller 2 IDE (ICH9M) */
+ { 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_sata_ahci },
+ /* Mobile SATA Controller 2 IDE (ICH9M) */
+ { 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_sata_ahci },
{ } /* terminate list */
};
@@ -425,6 +438,19 @@
},
};
+static const struct piix_map_db ich9_map_db = {
+ .mask = 0x3,
+ .port_enable = 0x3,
+ .present_shift = 8,
+ .map = {
+ /* PM PS SM SS MAP */
+ { P0, P2, P1, P3 }, /* 00b (hardwired when in AHCI) */
+ { RV, RV, RV, RV },
+ { IDE, IDE, NA, NA }, /* 10b (IDE mode) */
+ { RV, RV, RV, RV },
+ },
+};
+
static const struct piix_map_db *piix_map_db_table[] = {
[ich5_sata] = &ich5_map_db,
[esb_sata] = &ich5_map_db,
@@ -432,6 +458,8 @@
[ich6_sata_ahci] = &ich6_map_db,
[ich6m_sata_ahci] = &ich6m_map_db,
[ich8_sata_ahci] = &ich8_map_db,
+ [ich9_sata_ahci] = &ich9_map_db,
+
};
static struct ata_port_info piix_port_info[] = {
@@ -553,6 +581,18 @@
.port_ops = &piix_sata_ops,
},
+ /* ich9_sata_ahci: 11 */
+ {
+ .sht = &piix_sht,
+ .flags = ATA_FLAG_SATA |
+ PIIX_FLAG_CHECKINTR | PIIX_FLAG_SCR |
+ PIIX_FLAG_AHCI,
+ .pio_mask = 0x1f, /* pio0-4 */
+ .mwdma_mask = 0x07, /* mwdma0-2 */
+ .udma_mask = 0x7f, /* udma0-6 */
+ .port_ops = &piix_sata_ops,
+ },
+
};
static struct pci_bits piix_enable_bits[] = {
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH 2.6.19-rc6][RESEND] ata_piix: IDE mode SATA patch for Intel ICH9
2006-11-22 0:53 Jason Gaston
@ 2006-11-22 1:22 ` Tejun Heo
0 siblings, 0 replies; 8+ messages in thread
From: Tejun Heo @ 2006-11-22 1:22 UTC (permalink / raw)
To: Jason Gaston; +Cc: jgarzik, linux-ide, linux-kernel
Jason Gaston wrote:
> This patch adds the Intel ICH9 IDE mode SATA controller DID's.
>
> Signed-off-by: Jason Gaston <jason.d.gaston@intel.com>
>
> --- linux-2.6.19-rc6/drivers/ata/ata_piix.c.orig 2006-11-20 04:58:48.000000000 -0800
> +++ linux-2.6.19-rc6/drivers/ata/ata_piix.c 2006-11-20 06:15:12.000000000 -0800
Yeap, it came through fine this time, but ich8 and ich9 are identical
from ata_piix's point of view. Don't add ich9_sata_ahci, just use
ich8_sata_ahci.
--
tejun
^ permalink raw reply [flat|nested] 8+ messages in thread
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2006-11-22 20:36 [PATCH 2.6.19-rc6][RESEND] ata_piix: IDE mode SATA patch for Intel ICH9 Jason Gaston
2006-11-22 23:55 ` Tejun Heo
2006-11-28 8:41 ` Jeff Garzik
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2006-11-28 18:05 Gaston, Jason D
2006-11-22 1:30 Gaston, Jason D
2006-11-22 1:43 ` Tejun Heo
2006-11-22 0:53 Jason Gaston
2006-11-22 1:22 ` Tejun Heo
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