From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jeff Garzik <jeff@garzik.org>
Subject: Re: sata_vsc.c cache line size question
Date: Sun, 14 Jan 2007 13:21:49 -0500
Message-ID: <45AA74BD.9020803@garzik.org>
References: <92952AEF1F064042B6EF2522E0EEF43703EE316A@EXNA.corp.stratus.com>	<20070114080301.GD61246@sgi.com> <20070114144722.73fe0b49@localhost.localdomain>
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To: Alan <alan@lxorguk.ukuu.org.uk>
Cc: Jeremy Higdon <jeremy@sgi.com>, "Dailey, Nate" <Nate.Dailey@stratus.com>, linux-ide@vger.kernel.org

Alan wrote:
>> So I suppose the driver should be modified to set it to 0x80 only
>> if it's 0.  I believe that most PCI implementations will set it in
>> the BIOS or whatever.
> 
> pci_set_master should handle this automtically on most platforms.

pci_set_master() sets the latency timer not cacheline size

pci_set_mwi() on x86-ish platforms sets cacheline size.

	Jeff