Re: HPA and failed opcode was: 0x37 ?

[Steven Scholz <steven.scholz@imc-berlin.de>]

Sergei,

>> The FPGA does nothing except decoding adresseses from the ARM cpu,
>> controlling the A[2..0], CS[1..0], IOR, IOW lines of the HDD.
> 
>    I've not seen you quoting the code that sets ofsset for the
> IDE_CONTROL_REG, BTW... Without this register, LBA48 is completely broken

        for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
                hw.io_ports[i] = ide_virt_base + (i << 1);
        }

        hw.io_ports[IDE_CONTROL_OFFSET] = ide_virt_base + 0x10;

Thus it has an offset 0x10 from the base address.

ide0 at 0xc3856000-0xc3856007,0xc3856010 on irq 27

But I just noticed that A[2..0] should look like "110" when accessing the
"Device Control Register". Thus the offset should be 0x16 instead! Right?

--
Steven