[PATCH libata-dev#upstream-fixes] ahci/pata_jmicron: fix JMicron quirk

[PATCH libata-dev#upstream-fixes] ahci/pata_jmicron: fix JMicron quirk

[Tejun Heo]

For all JMicrons except for 361 and 368, AHCI mode enable bits in the
Control(1) should be set.  This used to be done in both ahci and
pata_jmicron but while moving programming to PCI quirk, it was removed
from ahci part while still left in pata_jmicron.

The implemented JMicron PCI quirk was incorrect in that it didn't
program AHCI mode enable bits.  If pata_jmicron is loaded first and
programs those bits, the ahci ports work; otherwise, ahci device
detection fails miserably.

This patch makes JMicron PCI quirk clear SATA IDE mode bits and set
AHCI mode bits and remove the respective part from pata_jmicron.
Tested on JMB361, 363 and 368.

Signed-off-by: Tejun Heo <htejun@gmail.com>
---
Jeff, gotta be included in 2.6.20.
Justin, is this the problem you were seeing on suse?

diff --git a/drivers/ata/pata_jmicron.c b/drivers/ata/pata_jmicron.c
index 2d406a7..26365c1 100644
--- a/drivers/ata/pata_jmicron.c
+++ b/drivers/ata/pata_jmicron.c
@@ -202,20 +202,12 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i
 
 	u32 reg;
 
-	if (id->driver_data != 368) {
-		/* Put the controller into AHCI mode in case the AHCI driver
-		   has not yet been loaded. This can be done with either
-		   function present */
+	/* PATA controller is fn 1, AHCI is fn 0 */
+	if (id->driver_data != 368 && PCI_FUNC(pdev->devfn) != 1)
+		return -ENODEV;
 
-		/* FIXME: We may want a way to override this in future */
-		pci_write_config_byte(pdev, 0x41, 0xa1);
-
-		/* PATA controller is fn 1, AHCI is fn 0 */
-		if (PCI_FUNC(pdev->devfn) != 1)
-			return -ENODEV;
-	}
-	if ( id->driver_data == 365 || id->driver_data == 366) {
-		/* The 365/66 have two PATA channels, redirect the second */
+	/* The 365/66 have two PATA channels, redirect the second */
+	if (id->driver_data == 365 || id->driver_data == 366) {
 		pci_read_config_dword(pdev, 0x80, &reg);
 		reg |= (1 << 24);	/* IDE1 to PATA IDE secondary */
 		pci_write_config_dword(pdev, 0x80, reg);
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 5c34379..6f3e1bf 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1260,8 +1260,8 @@ static void quirk_jmicron_dualfn(struct pci_dev *pdev)
 			pci_read_config_dword(pdev, 0x40, &conf);
 			/* Enable dual function mode, AHCI on fn 0, IDE fn1 */
 			/* Set the class codes correctly and then direct IDE 0 */
-			conf &= ~0x000F0200;	/* Clear bit 9 and 16-19 */
-			conf |=  0x00C20002;	/* Set bit 1, 17, 22, 23 */
+			conf &= ~0x000FF200; /* Clear bit 9 and 12-19 */
+			conf |=  0x00C2A102; /* Set 1, 8, 13, 15, 17, 22, 23 */
 			pci_write_config_dword(pdev, 0x40, conf);
 
 			/* Reconfigure so that the PCI scanner discovers the

Re: [PATCH libata-dev#upstream-fixes] ahci/pata_jmicron: fix JMicron quirk

[Alan]

> This patch makes JMicron PCI quirk clear SATA IDE mode bits and set
> AHCI mode bits and remove the respective part from pata_jmicron.
> Tested on JMB361, 363 and 368.
> 
> Signed-off-by: Tejun Heo <htejun@gmail.com>

Acked-by: Alan Cox <alan@redhat.com>

Re: [PATCH libata-dev#upstream-fixes] ahci/pata_jmicron: fix JMicron quirk

[Jeff Garzik]

Tejun Heo wrote:
> For all JMicrons except for 361 and 368, AHCI mode enable bits in the
> Control(1) should be set.  This used to be done in both ahci and
> pata_jmicron but while moving programming to PCI quirk, it was removed
> from ahci part while still left in pata_jmicron.
> 
> The implemented JMicron PCI quirk was incorrect in that it didn't
> program AHCI mode enable bits.  If pata_jmicron is loaded first and
> programs those bits, the ahci ports work; otherwise, ahci device
> detection fails miserably.
> 
> This patch makes JMicron PCI quirk clear SATA IDE mode bits and set
> AHCI mode bits and remove the respective part from pata_jmicron.
> Tested on JMB361, 363 and 368.
> 
> Signed-off-by: Tejun Heo <htejun@gmail.com>

applied