[PATCH] pata_sl82c105: wrong assumptions about compatible PIO modes

[PATCH] pata_sl82c105: wrong assumptions about compatible PIO modes

[Sergei Shtylyov]

Fix the wrong "compatible" PIO mode choices: MWDMA0 has 480 ns cycle while PIO1
only has 383 ns cycle, and MWDMA2 timings matchs those of PIO4 exactly.

---
Frankly speaking, I'm not sure this function is useful or correct at all --
with the DMA timings being actually programmed in sl82c105_bmdma_start()...

And the issue of the same registers being used for both PIO and DMA timings is
not specific for this driver at all but seems to be addressed only by it...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>

 drivers/ata/pata_sl82c105.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

Index: linux-2.6/drivers/ata/pata_sl82c105.c
===================================================================
--- linux-2.6.orig/drivers/ata/pata_sl82c105.c
+++ linux-2.6/drivers/ata/pata_sl82c105.c
@@ -139,13 +139,13 @@ static void sl82c105_set_dmamode(struct 
 {
 	switch(adev->dma_mode) {
 		case XFER_MW_DMA_0:
-			sl82c105_configure_piomode(ap, adev, 1);
+			sl82c105_configure_piomode(ap, adev, 0);
 			break;
 		case XFER_MW_DMA_1:
 			sl82c105_configure_piomode(ap, adev, 3);
 			break;
 		case XFER_MW_DMA_2:
-			sl82c105_configure_piomode(ap, adev, 3);
+			sl82c105_configure_piomode(ap, adev, 4);
 			break;
 		default:
 			BUG();

Re: [PATCH] pata_sl82c105: wrong assumptions about compatible PIO modes

[Alan]

On Tue, 30 Jan 2007 20:40:30 +0300
Sergei Shtylyov <sshtylyov@ru.mvista.com> wrote:

> Fix the wrong "compatible" PIO mode choices: MWDMA0 has 480 ns cycle while PIO1
> only has 383 ns cycle, and MWDMA2 timings matchs those of PIO4 exactly.

Thanks for all this review work

> Frankly speaking, I'm not sure this function is useful or correct at all --
> with the DMA timings being actually programmed in sl82c105_bmdma_start()...

It ought to be right
- bmdma_start loads the real DMA mode
- set_dmamode/set_piomode load the right PIO timings
- bmdma_stop restores the right PIO timings

> And the issue of the same registers being used for both PIO and DMA timings is
> not specific for this driver at all but seems to be addressed only by it...

For most drivers (those using the ata_timing interface) the timing merge
is done by ata_timing_compute(). 

> Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>

Acked-by: Alan Cox <alan@redhat.com>

Re: [PATCH] pata_sl82c105: wrong assumptions about compatible PIO modes

[Sergei Shtylyov]

Hello.

Alan wrote:

>>Fix the wrong "compatible" PIO mode choices: MWDMA0 has 480 ns cycle while PIO1
>>only has 383 ns cycle, and MWDMA2 timings matchs those of PIO4 exactly.

> Thanks for all this review work

    Oh, I've only started but there's too much to do elsewhere... :-)

>>Frankly speaking, I'm not sure this function is useful or correct at all --
>>with the DMA timings being actually programmed in sl82c105_bmdma_start()...

> It ought to be right
> - bmdma_start loads the real DMA mode
> - set_dmamode/set_piomode load the right PIO timings

    You just said set_piomode() is called before set_dmamode() by the libata 
core anyway -- there seems to be no point in re-writing the modes until the 
actual DMA is started.

> - bmdma_stop restores the right PIO timings

>>And the issue of the same registers being used for both PIO and DMA timings is
>>not specific for this driver at all but seems to be addressed only by it...

> For most drivers (those using the ata_timing interface) the timing merge
> is done by ata_timing_compute(). 

    Ah...

>>Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>

> Acked-by: Alan Cox <alan@redhat.com>

MBR, Sergei

Re: [PATCH] pata_sl82c105: wrong assumptions about compatible PIO modes

[Alan]

On Tue, 30 Jan 2007 22:08:12 +0300
Sergei Shtylyov <sshtylyov@ru.mvista.com> wrote:
>     You just said set_piomode() is called before set_dmamode() by the libata 
> core anyway -- there seems to be no point in re-writing the modes until the 
> actual DMA is started.

Agreed, I'll remove that bit of the code.

Alan

Re: [PATCH] pata_sl82c105: wrong assumptions about compatible PIO modes

[Jeff Garzik]

Sergei Shtylyov wrote:
> Fix the wrong "compatible" PIO mode choices: MWDMA0 has 480 ns cycle while PIO1
> only has 383 ns cycle, and MWDMA2 timings matchs those of PIO4 exactly.
> 
> ---
> Frankly speaking, I'm not sure this function is useful or correct at all --
> with the DMA timings being actually programmed in sl82c105_bmdma_start()...
> 
> And the issue of the same registers being used for both PIO and DMA timings is
> not specific for this driver at all but seems to be addressed only by it...
> 
> Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
> 
>  drivers/ata/pata_sl82c105.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)

applied