Re: [PATCH 8/8] libata: ack more unsolicited INTRQ

[Albert Lee <albertcc@tw.ibm.com>]

Alan Cox wrote:
>>As previously discussed, the possible issue with this patch is:
>>Some ATA/ATAPI devices might be unhappy if the STATUS register
>>is read during data transfer (not sure if this is true or not).
>>(Patch 5/8 doesn't have such issue.) 
> 
> 
> Some older intel eats your disk if you do that.

Ah, too bad. Thanks for the advice.

> 
> Neither of these approaches quite work. Much as I dislike the "old IDE"
> disable/enable irq approach it does look like that is the only safe
> answer for some controllers.
> 

Agreed reading the status register during data transfer looks bad.
Please disregard this patch.

Back to the problem that the patch was trying to solve,
i.e. unsolicited interrupt when HSM doing data transfer in the wq,
is there any experience about how often such situation occurs?

IMHO, it seems not something that happens often. If the cable/devices
are well configured, the intrq would mostly occur when it should.

Even if the unsolicited irq happens, maybe the current code has
good chance to handle it?
e.g. ata_irq_task() already reads the status before data transfer,
thus possibly clearing some of unsolicited irqs.
e.g. maybe the data transfer in the workqueue is quick enough?
If yes, hopefully the ATA_PFLAG_HSM_WQ is soon cleared, and
then the interrupt handler can come in ack the irq. (Much the same
way when the irq handler encounters "early irq" by bad devices.)

--
albert