From: Matt Sealey <matt@genesi-usa.com>
To: linux-ide@vger.kernel.org
Subject: Read Prefetch, Post Write on IDE chipsets
Date: Sun, 02 Sep 2007 13:51:43 +0100 [thread overview]
Message-ID: <46DAB1DF.5050109@genesi-usa.com> (raw)
Hi guys,
Does anyone have any decent information on the purpose, performance potential
or perhaps quirks of the "read prefetch" and "post write" buffer features on
some IDE chipsets?
It doesn't look like any standard but at least is included in quite a few
of the libata drivers, and a lot of x86 BIOS control has toggles to try and
turn it on or off.
But, what is it? I've never seen any documentation but which register to use
to toggle it.. no vendor recommendations to turn it on, it seems like a rather
secret feature..?
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
next reply other threads:[~2007-09-02 12:50 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-09-02 12:51 Matt Sealey [this message]
2007-09-02 14:00 ` Read Prefetch, Post Write on IDE chipsets Alan Cox
2007-09-02 14:04 ` Matt Sealey
2007-09-02 14:07 ` Sergei Shtylyov
2007-09-02 14:12 ` Sergei Shtylyov
2007-09-02 14:23 ` Sergei Shtylyov
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