* [CALL-FOR-HELP] pata_ali: can't get MWDMA working!
@ 2008-01-09 16:52 Tejun Heo
2008-01-09 17:01 ` Tejun Heo
` (4 more replies)
0 siblings, 5 replies; 11+ messages in thread
From: Tejun Heo @ 2008-01-09 16:52 UTC (permalink / raw)
To: Jeff Garzik, Mark Lord, Alan Cox, IDE/ATA development list, andre,
Bartlomiej
[-- Attachment #1: Type: text/plain, Size: 1500 bytes --]
Hello, all.
Broken MWDMA on pata_ali has caused a number of bug reports. I've been
trying to fix it for some time now && finally got a machine with
pata_ali and non-working MWDMA2 ATAPI device on my desk a few weeks ago.
Testing confirms what users have been reporting - MWDMA2 works fine
with the IDE alim15x3 driver while any DMA data transfer on pata_ali
times out.
At first I thought this was simple timing programming error, but no.
pata_ali's mode programming wasn't wrong although it was different in
how it programs empty slots. Even after making pata_ali to program the
controller exactly the same as alim15x3 (identical lspci -xxx results),
MWDMA didn't work. (attached)
I wondered whether the device was configured differently, so compared
hdparm --Istdout results. They were identical too. (attached)
I walked through IDE and libata codes and found some differences in the
order registers are accessed and which values are written (e.g. libata
never turns on device 0/1 DMA capable bits in BMDMA status register
while IDE does). I made them access the registers in the same order and
write the same values. Still no go.
Then, I made libata probing sequence very close to IDE such that no
reset is performed and NIEN isn't tempered with. No go.
I thought maybe the drive should just be blacklisted. I took the laptop
apart, took out the DVD combo drive to ICH7 ata_piix. It works just fine.
So, I'm out of ideas at this point. Any suggestions? Ideas?
Thanks.
--
tejun
[-- Attachment #2: libata.pci --]
[-- Type: text/plain, Size: 1825 bytes --]
00:10.0 IDE interface [Class 0101]: ALi Corporation M5229 IDE [10b9:5229] (rev c4) (prog-if b0)
Subsystem: Hewlett-Packard Company Pavilion ze4400 builtin IDE [103c:0024]
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 32 (500ns min, 1000ns max)
Interrupt: pin A routed to IRQ 0
Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [disabled] [size=8]
Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [disabled] [size=1]
Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [disabled] [size=8]
Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [disabled] [size=1]
Region 4: I/O ports at 8080 [size=16]
Capabilities: [60] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00: b9 10 29 52 05 00 90 02 c4 b0 01 01 00 20 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 81 80 00 00 00 00 00 00 00 00 00 00 3c 10 24 00
30: 00 00 00 00 60 00 00 00 00 00 00 00 00 01 02 04
40: 00 00 00 0f 00 00 00 00 30 00 20 c9 00 00 ba 3a
50: 02 00 00 89 05 00 0f 00 01 31 31 00 01 31 31 00
60: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[-- Attachment #3: libata.hdparm --]
[-- Type: text/plain, Size: 1290 bytes --]
/dev/sda:
045a 3fff c837 0010 0000 0000 003f 0000
0000 0000 2020 2020 2020 4d52 4732 3038
4b32 4b33 4133 3748 0003 0d98 0004 4d4f
324f 4144 3541 4943 3235 4e30 3430 4154
4d52 3034 2d30 2020 2020 2020 2020 2020
2020 2020 2020 2020 2020 2020 2020 8010
0000 0f00 4000 0200 0200 0007 3fff 0010
003f fc10 00fb 0110 5300 04a8 0000 0007
0003 0078 0078 00f0 0078 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
007c 0019 746b 7fe8 4023 f469 3e48 4023
203f 0011 0000 4080 fffe 600b 80fe 0000
0000 0000 0000 0000 5300 04a8 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0009 000b 00fd 0000 0000 0000 0000 0000
41fc 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 8000 0000
3243 0000 0000 1212 0101 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 c3a5
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [CALL-FOR-HELP] pata_ali: can't get MWDMA working!
2008-01-09 16:52 [CALL-FOR-HELP] pata_ali: can't get MWDMA working! Tejun Heo
@ 2008-01-09 17:01 ` Tejun Heo
2008-01-09 17:16 ` Alan Cox
` (3 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: Tejun Heo @ 2008-01-09 17:01 UTC (permalink / raw)
To: Jeff Garzik, Mark Lord, Alan Cox, IDE/ATA development list, andre,
Bartlomiej
Oh... I forgot to mention something.
I traced DMA command execution and the following is what happens.
1. host setups DMA engine (programs BMDMA controller)
2. host issues PACKET
3. device sets BSY
4. host transfers CDB when BSY clears and DRQ sets (Status turns to 0xd0)
5. host activates BMDMA engine
6. device reports 0xd0 for all TF regs for short moment and then it
clears BSY and sets DRQ and other regs.
7. nothing happens for quite long time (>10s)
8. after a while, device seems to give up and clears DRQ and sets
DRDY.
9. BMDMA status is 0x21 and doesn't change.
10. after a while, timeout occurrs.
I cleared the buffer before issuing commnad and checked whether DMA
engine delievered anything from EH. It transfered nothing. It looks
like for some reason the BMDMA engine is losing its chance to start.
Thanks.
--
tejun
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [CALL-FOR-HELP] pata_ali: can't get MWDMA working!
2008-01-09 16:52 [CALL-FOR-HELP] pata_ali: can't get MWDMA working! Tejun Heo
2008-01-09 17:01 ` Tejun Heo
@ 2008-01-09 17:16 ` Alan Cox
2008-01-09 17:28 ` Alan Cox
2008-01-10 1:44 ` Tejun Heo
2008-01-09 17:25 ` Mark Lord
` (2 subsequent siblings)
4 siblings, 2 replies; 11+ messages in thread
From: Alan Cox @ 2008-01-09 17:16 UTC (permalink / raw)
To: Tejun Heo
Cc: Jeff Garzik, Mark Lord, IDE/ATA development list, andre,
Bartlomiej Zolnierkiewicz
> trying to fix it for some time now && finally got a machine with
> pata_ali and non-working MWDMA2 ATAPI device on my desk a few weeks ago.
Oh good. I've been through a pile of ones that just work.
Which North and south does it have and what revision ?
> I walked through IDE and libata codes and found some differences in the
> order registers are accessed and which values are written (e.g. libata
> never turns on device 0/1 DMA capable bits in BMDMA status register
> while IDE does). I made them access the registers in the same order and
> write the same values. Still no go.
Tried that.
> Then, I made libata probing sequence very close to IDE such that no
> reset is performed and NIEN isn't tempered with. No go.
Ditto, and removing the taskfile writing optimisations
> So, I'm out of ideas at this point. Any suggestions? Ideas?
Short of doing a printk of each access to the PCI and I/O space and
comparing them no. I ran out of ideas as well. I guess some kind of weird
chance alignment bug but who knows, and the docs I have don't explain it.
Alan
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [CALL-FOR-HELP] pata_ali: can't get MWDMA working!
2008-01-09 16:52 [CALL-FOR-HELP] pata_ali: can't get MWDMA working! Tejun Heo
2008-01-09 17:01 ` Tejun Heo
2008-01-09 17:16 ` Alan Cox
@ 2008-01-09 17:25 ` Mark Lord
2008-01-10 1:49 ` Tejun Heo
2008-01-09 17:27 ` Sergei Shtylyov
2008-01-09 22:55 ` Bartlomiej Zolnierkiewicz
4 siblings, 1 reply; 11+ messages in thread
From: Mark Lord @ 2008-01-09 17:25 UTC (permalink / raw)
To: Tejun Heo
Cc: Jeff Garzik, Alan Cox, IDE/ATA development list, andre,
Bartlomiej Zolnierkiewicz
Are you really sure that the old IDE is actually issuing DMA commands,
rather than falling back to PIO ?
Cheers
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [CALL-FOR-HELP] pata_ali: can't get MWDMA working!
2008-01-09 16:52 [CALL-FOR-HELP] pata_ali: can't get MWDMA working! Tejun Heo
` (2 preceding siblings ...)
2008-01-09 17:25 ` Mark Lord
@ 2008-01-09 17:27 ` Sergei Shtylyov
2008-01-10 2:14 ` Tejun Heo
2008-01-09 22:55 ` Bartlomiej Zolnierkiewicz
4 siblings, 1 reply; 11+ messages in thread
From: Sergei Shtylyov @ 2008-01-09 17:27 UTC (permalink / raw)
To: Tejun Heo
Cc: Jeff Garzik, Mark Lord, Alan Cox, IDE/ATA development list, andre,
Bartlomiej Zolnierkiewicz
Tejun Heo wrote:
> Hello, all.
>
> Broken MWDMA on pata_ali has caused a number of bug reports. I've been
> trying to fix it for some time now && finally got a machine with
> pata_ali and non-working MWDMA2 ATAPI device on my desk a few weeks ago.
> Testing confirms what users have been reporting - MWDMA2 works fine
Heh, it works by accident: PIO4 timings correspond to MWDMA ones. The
driver does *not* support MWDMA modes -- there's FIXME in ali_set_dma_mode().
> with the IDE alim15x3 driver while any DMA data transfer on pata_ali
> times out.
> At first I thought this was simple timing programming error, but no.
> pata_ali's mode programming wasn't wrong although it was different in
> how it programs empty slots. Even after making pata_ali to program the
> controller exactly the same as alim15x3 (identical lspci -xxx results),
> MWDMA didn't work. (attached)
I don't quite understand -- MWDMA mode programming is simply not there in
the alim15x3 driver...
> I wondered whether the device was configured differently, so compared
> hdparm --Istdout results. They were identical too. (attached)
> I walked through IDE and libata codes and found some differences in the
> order registers are accessed and which values are written (e.g. libata
> never turns on device 0/1 DMA capable bits in BMDMA status register
> while IDE does). I made them access the registers in the same order and
> write the same values. Still no go.
> Then, I made libata probing sequence very close to IDE such that no
> reset is performed and NIEN isn't tempered with. No go.
> I thought maybe the drive should just be blacklisted. I took the laptop
> apart, took out the DVD combo drive to ICH7 ata_piix. It works just fine.
> So, I'm out of ideas at this point. Any suggestions? Ideas?
> Thanks.
> ------------------------------------------------------------------------
>
> 00:10.0 IDE interface [Class 0101]: ALi Corporation M5229 IDE [10b9:5229] (rev c4) (prog-if b0)
Hm, channel enables (bits 4/5) are set but bit 6 is cleared... looking
into the datasheet, bits 4/5/6 should be read as 0 by default...
> Subsystem: Hewlett-Packard Company Pavilion ze4400 builtin IDE [103c:0024]
> Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
> Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
> Latency: 32 (500ns min, 1000ns max)
> Interrupt: pin A routed to IRQ 0
Interrupt not routed... well, we're in legacy mode anyway with native mode
not supported, so why the device is requesting interrupt at all is not clear.
> Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [disabled] [size=8]
> Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [disabled] [size=1]
> Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [disabled] [size=8]
> Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [disabled] [size=1]
What?! The minimum PCI resource size is 4 bytes, not 1. And why those are
seen as memory resources?
> Region 4: I/O ports at 8080 [size=16]
> Capabilities: [60] Power Management version 2
> Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
> Status: D0 PME-Enable- DSel=0 DScale=0 PME-
> 00: b9 10 29 52 05 00 90 02 c4 b0 01 01 00 20 00 00
> 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 20: 81 80 00 00 00 00 00 00 00 00 00 00 3c 10 24 00
> 30: 00 00 00 00 60 00 00 00 00 00 00 00 00 01 02 04
> 40: 00 00 00 0f 00 00 00 00 30 00 20 c9 00 00 ba 3a
> 50: 02 00 00 89 05 00 0f 00 01 31 31 00 01 31 31 00
> 60: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00
> 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
MBR, Sergei
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [CALL-FOR-HELP] pata_ali: can't get MWDMA working!
2008-01-09 17:16 ` Alan Cox
@ 2008-01-09 17:28 ` Alan Cox
2008-01-10 1:44 ` Tejun Heo
1 sibling, 0 replies; 11+ messages in thread
From: Alan Cox @ 2008-01-09 17:28 UTC (permalink / raw)
To: Alan Cox
Cc: Tejun Heo, Jeff Garzik, Mark Lord, IDE/ATA development list,
andre, Bartlomiej Zolnierkiewicz
On Wed, 9 Jan 2008 17:16:35 +0000
Alan Cox <alan@lxorguk.ukuu.org.uk> wrote:
> > trying to fix it for some time now && finally got a machine with
> > pata_ali and non-working MWDMA2 ATAPI device on my desk a few weeks ago.
>
> Oh good. I've been through a pile of ones that just work.
>
> Which North and south does it have and what revision ?
Doh ignore that missed the traces at the bottom.
Alan
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [CALL-FOR-HELP] pata_ali: can't get MWDMA working!
2008-01-09 16:52 [CALL-FOR-HELP] pata_ali: can't get MWDMA working! Tejun Heo
` (3 preceding siblings ...)
2008-01-09 17:27 ` Sergei Shtylyov
@ 2008-01-09 22:55 ` Bartlomiej Zolnierkiewicz
2008-01-10 1:39 ` Tejun Heo
4 siblings, 1 reply; 11+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2008-01-09 22:55 UTC (permalink / raw)
To: Tejun Heo
Cc: Jeff Garzik, Mark Lord, Alan Cox, IDE/ATA development list, andre
Hi Tejun,
On Wednesday 09 January 2008, Tejun Heo wrote:
> Hello, all.
>
> Broken MWDMA on pata_ali has caused a number of bug reports. I've been
> trying to fix it for some time now && finally got a machine with
> pata_ali and non-working MWDMA2 ATAPI device on my desk a few weeks ago.
> Testing confirms what users have been reporting - MWDMA2 works fine
> with the IDE alim15x3 driver while any DMA data transfer on pata_ali
> times out.
>
> At first I thought this was simple timing programming error, but no.
> pata_ali's mode programming wasn't wrong although it was different in
> how it programs empty slots. Even after making pata_ali to program the
> controller exactly the same as alim15x3 (identical lspci -xxx results),
> MWDMA didn't work. (attached)
>
> I wondered whether the device was configured differently, so compared
> hdparm --Istdout results. They were identical too. (attached)
ATA device, with non-removable media
Model Number: IC25N040ATMR04-0
Serial Number: MRG208K2K3A37H
Firmware Revision: MO2OAD5A
...
Could you also send hdparm output for ATAPI device? Does it use CDB intr?
> I walked through IDE and libata codes and found some differences in the
> order registers are accessed and which values are written (e.g. libata
> never turns on device 0/1 DMA capable bits in BMDMA status register
> while IDE does). I made them access the registers in the same order and
> write the same values. Still no go.
>
> Then, I made libata probing sequence very close to IDE such that no
> reset is performed and NIEN isn't tempered with. No go.
>
> I thought maybe the drive should just be blacklisted. I took the laptop
> apart, took out the DVD combo drive to ICH7 ata_piix. It works just fine.
>
> So, I'm out of ideas at this point. Any suggestions? Ideas?
If ATAPI device uses CDB intr then ->irq_clear will be called by
ata_host_intr() on CDB IRQ and may confuse DMA engine (it shouldn't
on most chipsets but older ALi-s are pretty weird)...?
Thanks,
Bart
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [CALL-FOR-HELP] pata_ali: can't get MWDMA working!
2008-01-09 22:55 ` Bartlomiej Zolnierkiewicz
@ 2008-01-10 1:39 ` Tejun Heo
0 siblings, 0 replies; 11+ messages in thread
From: Tejun Heo @ 2008-01-10 1:39 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz
Cc: Jeff Garzik, Mark Lord, Alan Cox, IDE/ATA development list, andre
Hello,
Bartlomiej Zolnierkiewicz wrote:
>> I wondered whether the device was configured differently, so compared
>> hdparm --Istdout results. They were identical too. (attached)
>
> ATA device, with non-removable media
> Model Number: IC25N040ATMR04-0
> Serial Number: MRG208K2K3A37H
> Firmware Revision: MO2OAD5A
Eeek. sorry about that. Correct one...
/dev/sr0:
ATAPI CD-ROM, with removable media
Model Number: HL-DT-STCD-RW/DVD DRIVE GCC-4241N
Serial Number:
Firmware Revision: 0C29
Standards:
Likely used CD-ROM ATAPI-1
Configuration:
DRQ response: 50us.
Packet size: 12 bytes
Capabilities:
LBA, IORDY(can be disabled)
DMA: sdma0 sdma1 sdma2 mdma0 mdma1 *mdma2
Cycle time: min=120ns recommended=120ns
PIO: pio0 pio1 pio2 pio3 pio4
Cycle time: no flow control=120ns IORDY flow control=120ns
HW reset results:
CBLID- below Vih
Device num = 0 determined by CSEL
/dev/sr0:
85c0 0000 0000 0000 0000 0000 0000 0000
0000 0000 2020 2020 2020 2020 2020 2020
2020 2020 2020 2020 0000 0000 0000 3043
3239 2020 2020 484c 2d44 542d 5354 4344
2d52 572f 4456 4420 4452 4956 4520 4743
432d 3432 3431 4e20 2020 2020 2020 0000
0000 0f00 0000 0200 0200 0002 0000 0000
0000 0000 0000 0000 0000 0000 0007 0407
0003 0078 0078 0078 0078 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
003c 0013 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 404d 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 fffe 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000
> Could you also send hdparm output for ATAPI device? Does it use CDB intr?
>
>> I walked through IDE and libata codes and found some differences in the
>> order registers are accessed and which values are written (e.g. libata
>> never turns on device 0/1 DMA capable bits in BMDMA status register
>> while IDE does). I made them access the registers in the same order and
>> write the same values. Still no go.
>>
>> Then, I made libata probing sequence very close to IDE such that no
>> reset is performed and NIEN isn't tempered with. No go.
>>
>> I thought maybe the drive should just be blacklisted. I took the laptop
>> apart, took out the DVD combo drive to ICH7 ata_piix. It works just fine.
>>
>> So, I'm out of ideas at this point. Any suggestions? Ideas?
>
> If ATAPI device uses CDB intr then ->irq_clear will be called by
> ata_host_intr() on CDB IRQ and may confuse DMA engine (it shouldn't
> on most chipsets but older ALi-s are pretty weird)...?
Unfortunately no CDB intr.
Thanks.
--
tejun
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [CALL-FOR-HELP] pata_ali: can't get MWDMA working!
2008-01-09 17:16 ` Alan Cox
2008-01-09 17:28 ` Alan Cox
@ 2008-01-10 1:44 ` Tejun Heo
1 sibling, 0 replies; 11+ messages in thread
From: Tejun Heo @ 2008-01-10 1:44 UTC (permalink / raw)
To: Alan Cox
Cc: Jeff Garzik, Mark Lord, IDE/ATA development list, andre,
Bartlomiej Zolnierkiewicz
[-- Attachment #1: Type: text/plain, Size: 1285 bytes --]
Alan Cox wrote:
>> trying to fix it for some time now && finally got a machine with
>> pata_ali and non-working MWDMA2 ATAPI device on my desk a few weeks ago.
>
> Oh good. I've been through a pile of ones that just work.
>
> Which North and south does it have and what revision ?
Attached full output of 'lspci -nnvvvxxx' just in case.
>> Then, I made libata probing sequence very close to IDE such that no
>> reset is performed and NIEN isn't tempered with. No go.
>
> Ditto, and removing the taskfile writing optimisations
Yeah, I did that too. I also converted pata_ali to use 32bit PIO for
CDB transfer. :-/
>> So, I'm out of ideas at this point. Any suggestions? Ideas?
>
> Short of doing a printk of each access to the PCI and I/O space and
> comparing them no. I ran out of ideas as well. I guess some kind of weird
> chance alignment bug but who knows, and the docs I have don't explain it.
The problem is not on the PCI bus as the harddisk works just fine. The
drive too works fine if connected to ata_piix. I'm thinking of ordering
a slim UDMA capable combo drive and see whether UDMA works; then, we can
tell whether the controller doesn't like ATAPI command sequence used by
libata (I made it behave the same way as IDE, but still...).
Thanks.
--
tejun
[-- Attachment #2: lspci.out --]
[-- Type: text/plain, Size: 20432 bytes --]
00:00.0 Host bridge [Class 0600]: ATI Technologies Inc AGP Bridge [IGP 320M] [1002:cab0] (rev 13)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
Latency: 32
Region 0: Memory at d4000000 (32-bit, prefetchable) [size=64M]
Region 1: Memory at d0400000 (32-bit, prefetchable) [size=4K]
Region 2: I/O ports at 8090 [disabled] [size=4]
Capabilities: [a0] AGP version 2.0
Status: RQ=16 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans- 64bit- FW+ AGP3- Rate=x1,x2,x4
Command: RQ=1 ArqSz=0 Cal=0 SBA- AGP- GART64- 64bit- FW- Rate=<none>
00: 02 10 b0 ca 06 00 30 22 13 00 00 06 00 20 00 00
10: 08 00 00 d4 08 00 40 d0 91 80 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 0b 03 00 00 00 00 00 00 04 0d 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: bd 0c a2 85 24 36 e2 56 00 00 00 00 00 01 06 c1
70: e0 0d 20 30 84 84 84 84 00 00 00 00 00 00 00 00
80: 00 00 00 00 96 10 83 00 33 00 30 00 13 00 00 00
90: 00 00 00 00 1f 1f 05 00 00 00 e4 7f 80 00 00 00
a0: 02 00 20 00 17 02 00 0f 00 00 00 00 03 00 00 00
b0: 00 00 00 00 08 00 00 00 05 00 04 04 00 00 00 00
c0: 00 00 00 ff 5a 15 05 0f 00 1c ff 1f 00 00 84 00
d0: eb 7b 0f 00 eb 7b 4f 00 6a 00 60 10 00 00 00 ff
e0: 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 ff
f0: 1f 00 09 00 00 00 00 ff 00 10 10 18 00 00 00 00
00:01.0 PCI bridge [Class 0604]: ATI Technologies Inc PCI Bridge [IGP 320M] [1002:700f] (rev 01) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 99
Bus: primary=00, secondary=01, subordinate=01, sec-latency=68
I/O behind bridge: 00009000-00009fff
Memory behind bridge: d0100000-d01fffff
Prefetchable memory behind bridge: e0000000-efffffff
Secondary status: 66MHz+ FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA+ VGA+ MAbort- >Reset- FastB2B-
00: 02 10 0f 70 07 00 20 02 01 00 04 06 00 63 01 00
10: 00 00 00 00 00 00 00 00 00 01 01 44 91 91 20 22
20: 10 d0 10 d0 00 e0 f0 ef 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 0c 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:02.0 USB Controller [Class 0c03]: ALi Corporation USB 1.1 Controller [10b9:5237] (rev 03) (prog-if 10 [OHCI])
Subsystem: Hewlett-Packard Company Pavilion ze4400 builtin USB [103c:0024]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 64 (20000ns max)
Interrupt: pin A routed to IRQ 9
Region 0: Memory at d0004000 (32-bit, non-prefetchable) [size=4K]
Capabilities: [60] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00: b9 10 37 52 17 00 90 02 03 10 03 0c 00 40 00 00
10: 00 40 00 d0 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 24 00
30: 00 00 00 00 60 00 00 00 00 00 00 00 09 01 00 50
40: 00 00 1f 00 82 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 01 00 02 80 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:06.0 Multimedia audio controller [Class 0401]: ALi Corporation M5451 PCI AC-Link Controller Audio Device [10b9:5451] (rev 02)
Subsystem: Hewlett-Packard Company Pavilion ze4400 builtin Audio [103c:0024]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR+ <PERR+
Latency: 64 (500ns min, 6000ns max)
Interrupt: pin A routed to IRQ 5
Region 0: I/O ports at 8400 [size=256]
Region 1: Memory at d0005000 (32-bit, non-prefetchable) [size=4K]
Capabilities: [dc] Power Management version 2
Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2+,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00: b9 10 51 54 07 00 90 c2 02 00 01 04 00 40 00 00
10: 01 84 00 00 00 50 00 d0 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 24 00
30: 00 00 00 00 dc 00 00 00 00 00 00 00 05 01 02 18
40: 00 00 00 00 00 40 08 e2 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 22 e6
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:07.0 ISA bridge [Class 0601]: ALi Corporation M1533/M1535 PCI to ISA Bridge [Aladdin IV/V/V+] [10b9:1533]
Subsystem: ALi Corporation ALi M1533 Aladdin IV/V ISA Bridge [10b9:1533]
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 0
Capabilities: [a0] Power Management version 1
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00: b9 10 33 15 0f 00 10 02 00 00 01 06 00 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 b9 10 33 15
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 01 d3 0b ea 5d 42 00 03 90 00 90 02 00 00 cd 33
50: 00 00 00 00 02 00 02 00 4c 00 80 00 00 00 e0 f0
60: 62 21 00 00 00 00 00 00 00 00 00 00 00 64 00 00
70: d2 00 23 00 00 1f 81 01 40 00 00 00 61 00 00 91
80: a5 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 01 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:08.0 Modem [Class 0703]: ALi Corporation M5457 AC'97 Modem Controller [10b9:5457] (prog-if 00 [Generic])
Subsystem: Hewlett-Packard Company Pavilion ze4400 builtin Modem Device [103c:0024]
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin A routed to IRQ 3
Region 0: Memory at d0006000 (32-bit, non-prefetchable) [size=4K]
Region 1: I/O ports at 8800 [size=256]
Capabilities: [40] Power Management version 2
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00: b9 10 57 54 03 00 90 02 00 00 03 07 00 40 00 00
10: 00 60 00 d0 01 88 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 24 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 03 01 00 00
40: 01 00 22 c0 00 00 00 00 01 00 00 00 00 00 00 00
50: 3c 10 24 00 00 00 00 00 08 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:0a.0 CardBus bridge [Class 0607]: O2 Micro, Inc. OZ6933/711E1 CardBus/SmartCardBus Controller [1217:6933] (rev 01)
Subsystem: Unknown device [6933:0002]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 168
Interrupt: pin A routed to IRQ 11
Region 0: Memory at 30010000 (32-bit, non-prefetchable) [size=4K]
Bus: primary=00, secondary=02, subordinate=05, sec-latency=176
Memory window 0: 20000000-23fff000 (prefetchable)
Memory window 1: 24000000-27fff000
I/O window 0: 00001000-000010ff
I/O window 1: 00001400-000014ff
BridgeCtl: Parity- SERR- ISA- VGA- MAbort- >Reset- 16bInt+ PostWrite+
16-bit legacy interface ports at 0001
00: 17 12 33 69 87 00 10 04 01 00 07 06 00 a8 82 00
10: 00 00 01 30 a0 00 00 02 00 02 05 b0 00 00 00 20
20: 00 f0 ff 23 00 00 00 24 00 f0 ff 27 01 10 00 00
30: fd 10 00 00 01 14 00 00 fd 14 00 00 0a 01 80 05
40: 33 69 02 00 01 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 a0 00 08 ea 03 42 82 00 00 50 20 00 00 00 00
a0: 01 00 02 fe 00 40 c0 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:0a.1 CardBus bridge [Class 0607]: O2 Micro, Inc. OZ6933/711E1 CardBus/SmartCardBus Controller [1217:6933] (rev 01)
Subsystem: Unknown device [6933:0002]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 168
Interrupt: pin B routed to IRQ 11
Region 0: Memory at 30011000 (32-bit, non-prefetchable) [size=4K]
Bus: primary=00, secondary=06, subordinate=09, sec-latency=176
Memory window 0: 28000000-2bfff000 (prefetchable)
Memory window 1: 2c000000-2ffff000
I/O window 0: 00001800-000018ff
I/O window 1: 00001c00-00001cff
BridgeCtl: Parity- SERR- ISA- VGA- MAbort- >Reset- 16bInt+ PostWrite+
16-bit legacy interface ports at 0001
00: 17 12 33 69 87 00 10 04 01 00 07 06 00 a8 82 00
10: 00 10 01 30 a0 00 00 02 00 06 09 b0 00 00 00 28
20: 00 f0 ff 2b 00 00 00 2c 00 f0 ff 2f 01 18 00 00
30: fd 18 00 00 01 1c 00 00 fd 1c 00 00 0a 02 80 05
40: 33 69 02 00 01 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 a0 00 08 ea 03 42 82 00 00 50 20 00 00 00 00
a0: 01 00 02 fe 00 40 c0 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:0c.0 FireWire (IEEE 1394) [Class 0c00]: Texas Instruments TSB43AB21 IEEE-1394a-2000 Controller (PHY/Link) [104c:8026] (prog-if 10 [OHCI])
Subsystem: Hewlett-Packard Company Unknown device [103c:0024]
Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin A routed to IRQ 9
Region 0: Memory at d0007000 (32-bit, non-prefetchable) [size=2K]
Region 1: Memory at d0000000 (32-bit, non-prefetchable) [size=16K]
Capabilities: [44] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00: 4c 10 26 80 12 00 10 02 00 10 00 0c 10 40 00 00
10: 00 70 00 d0 00 00 00 d0 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 24 00
30: 00 00 00 00 44 00 00 00 00 00 00 00 09 01 02 04
40: 00 00 00 00 01 00 02 7e 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 88 00 00 00
f0: 10 00 00 00 82 10 00 00 3c 10 24 00 00 00 00 00
00:10.0 IDE interface [Class 0101]: ALi Corporation M5229 IDE [10b9:5229] (rev c4) (prog-if b0)
Subsystem: Hewlett-Packard Company Pavilion ze4400 builtin IDE [103c:0024]
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 32 (500ns min, 1000ns max)
Interrupt: pin A routed to IRQ 0
Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [disabled] [size=8]
Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [disabled] [size=1]
Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [disabled] [size=8]
Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [disabled] [size=1]
Region 4: I/O ports at 8080 [size=16]
Capabilities: [60] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00: b9 10 29 52 05 00 90 02 c4 b0 01 01 00 20 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 81 80 00 00 00 00 00 00 00 00 00 00 3c 10 24 00
30: 00 00 00 00 60 00 00 00 00 00 00 00 00 01 02 04
40: 00 00 00 0f 00 00 00 00 30 00 20 c9 00 00 ba 3a
50: 02 00 00 89 05 00 0f 00 01 31 31 00 01 31 31 00
60: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:11.0 Bridge [Class 0680]: ALi Corporation M7101 Power Management Controller [PMU] [10b9:7101]
Subsystem: Hewlett-Packard Company Pavilion ze4400 [103c:0024]
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
00: b9 10 01 71 00 00 00 02 00 00 80 06 00 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 24 00
30: 00 00 00 00 e4 00 00 00 00 00 00 00 00 00 00 00
40: 00 40 00 00 00 80 21 00 aa 20 00 30 00 00 00 00
50: 00 01 00 00 00 00 00 00 00 05 05 00 00 00 00 00
60: 00 00 00 00 a5 00 00 00 00 00 00 22 00 00 00 0e
70: 00 00 00 00 00 00 00 28 f7 77 00 a2 38 1e 13 00
80: 76 89 15 13 00 33 00 00 0e 00 00 9a 99 00 00 99
90: 50 03 00 00 00 00 00 33 d3 00 00 21 00 01 00 00
a0: 00 00 00 c0 00 00 00 28 10 fe 00 fe 00 00 00 00
b0: 00 84 00 08 00 0f 01 00 60 04 00 01 00 01 00 a5
c0: 13 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 46 04 00 00 00 00 00 00 00 40 00 00 80 00 00
e0: 00 80 40 80 01 00 01 00 00 00 00 00 00 00 00 00
f0: 01 00 20 1e 00 00 00 00 00 00 00 00 00 00 00 00
00:12.0 Ethernet controller [Class 0200]: National Semiconductor Corporation DP83815 (MacPhyter) Ethernet Controller [100b:0020]
Subsystem: Hewlett-Packard Company Pavilion ze4400 builtin Network [103c:0024]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 90 (2750ns min, 13000ns max)
Interrupt: pin A routed to IRQ 11
Region 0: I/O ports at 8c00 [size=256]
Region 1: Memory at d0008000 (32-bit, non-prefetchable) [size=4K]
[virtual] Expansion ROM at 30000000 [disabled] [size=64K]
Capabilities: [40] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=320mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME+
00: 0b 10 20 00 07 00 90 02 00 00 00 02 00 5a 00 00
10: 01 8c 00 00 00 80 00 d0 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 24 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 0b 34
40: 01 00 82 ff 00 80 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
01:05.0 VGA compatible controller [Class 0300]: ATI Technologies Inc Radeon Mobility U1 [1002:4336] (prog-if 00 [VGA])
Subsystem: Hewlett-Packard Company Pavilion ze4400 builtin Video [103c:0024]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 66 (2000ns min), Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 10
Region 0: Memory at e0000000 (32-bit, prefetchable) [size=256M]
Region 1: I/O ports at 9000 [size=256]
Region 2: Memory at d0100000 (32-bit, non-prefetchable) [size=64K]
[virtual] Expansion ROM at d0120000 [disabled] [size=128K]
Capabilities: [58] AGP version 2.0
Status: RQ=48 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans- 64bit- FW- AGP3- Rate=x1,x2,x4
Command: RQ=1 ArqSz=0 Cal=0 SBA+ AGP- GART64- 64bit- FW- Rate=<none>
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00: 02 10 36 43 87 02 b0 02 00 00 00 03 10 42 00 00
10: 08 00 00 e0 01 90 00 00 00 00 10 d0 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 24 00
30: 00 00 00 00 58 00 00 00 00 00 00 00 0a 01 08 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 24 00
50: 01 00 02 06 00 00 00 00 02 50 20 00 07 02 00 2f
60: 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [CALL-FOR-HELP] pata_ali: can't get MWDMA working!
2008-01-09 17:25 ` Mark Lord
@ 2008-01-10 1:49 ` Tejun Heo
0 siblings, 0 replies; 11+ messages in thread
From: Tejun Heo @ 2008-01-10 1:49 UTC (permalink / raw)
To: Mark Lord
Cc: Jeff Garzik, Alan Cox, IDE/ATA development list, andre,
Bartlomiej Zolnierkiewicz
Mark Lord wrote:
> Are you really sure that the old IDE is actually issuing DMA commands,
> rather than falling back to PIO ?
Yeap, pretty sure. Here is debug dump of IDE transferring sector zero.
[ 114.377898] XXX writing 0x8 to dma_cmd
[ 114.381718] XXX read dma_stat 0x24 and writing 0x26
[ 114.386638] XXX writing feat=0x1 ireason=0 sector=0 cntl=0x0
cnth=0x80 ctrl=0x8
[ 114.393991] XXX executing WIN_PACKETCMD
[ 114.397878] XXX CDB 28 00 00 00 00 00 00 00 01 00 00 00
[ 114.403899] XXX writing 0x8 | 1 to dma_command
--
tejun
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [CALL-FOR-HELP] pata_ali: can't get MWDMA working!
2008-01-09 17:27 ` Sergei Shtylyov
@ 2008-01-10 2:14 ` Tejun Heo
0 siblings, 0 replies; 11+ messages in thread
From: Tejun Heo @ 2008-01-10 2:14 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: Jeff Garzik, Mark Lord, Alan Cox, IDE/ATA development list, andre,
Bartlomiej Zolnierkiewicz
Hello, Sergei.
Sergei Shtylyov wrote:
> Heh, it works by accident: PIO4 timings correspond to MWDMA ones. The
> driver does *not* support MWDMA modes -- there's FIXME in
> ali_set_dma_mode().
Yeap, I saw that and lifted MWDMA programming from pata_ali. That's how
I got the identical PCI configuration area but still no go.
>> with the IDE alim15x3 driver while any DMA data transfer on pata_ali
>> times out.
>
>> At first I thought this was simple timing programming error, but no.
>> pata_ali's mode programming wasn't wrong although it was different in
>> how it programs empty slots. Even after making pata_ali to program the
>> controller exactly the same as alim15x3 (identical lspci -xxx results),
>> MWDMA didn't work. (attached)
>
> I don't quite understand -- MWDMA mode programming is simply not
> there in the alim15x3 driver...
And PIO4 timing seems to be doing just fine for IDE. Unfortunately, it
doesn't work for libata.
>> Subsystem: Hewlett-Packard Company Pavilion ze4400 builtin IDE
>> [103c:0024]
>> Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop-
>> ParErr- Stepping- SERR- FastB2B-
>> Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
>> <TAbort- <MAbort- >SERR- <PERR-
>> Latency: 32 (500ns min, 1000ns max)
>> Interrupt: pin A routed to IRQ 0
>
> Interrupt not routed... well, we're in legacy mode anyway with native
> mode not supported, so why the device is requesting interrupt at all is
> not clear.
And it's the same story for IDE and libata. Also, the UDMA hard drive
connected to the primary channel works just fine. I watched how BMDMA
status and TF status changes after ATAPI DMA is initiated and it's not
IRQ problem. DMA engine just doesn't sits there doing nothing even
after the device indicates DRQ!
>> Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable)
>> [disabled] [size=8]
>> Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable)
>> [disabled] [size=1]
>> Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable)
>> [disabled] [size=8]
>> Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable)
>> [disabled] [size=1]
>
> What?! The minimum PCI resource size is 4 bytes, not 1. And why those
> are seen as memory resources?
Those are from Alan's PCI resource fix up so that legacy and native
modes look alike. It's weird that they show up as memory tho. Okay,
that looks like a bug in lspci. Here's dump of sysfs resource file.
ali:/sys/bus/pci/devices/0000:00:10.0 # cat resource
0x00000000000001f0 0x00000000000001f7 0x0000000000000110
0x00000000000003f6 0x00000000000003f6 0x0000000000000110
0x0000000000000170 0x0000000000000177 0x0000000000000110
0x0000000000000376 0x0000000000000376 0x0000000000000110
0x0000000000008080 0x000000000000808f 0x0000000000000101
0x0000000000000000 0x0000000000000000 0x0000000000000000
0x0000000000000000 0x0000000000000000 0x0000000000000000
The last field is flags and 0x100 is IO alright.
--
tejun
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2008-01-10 2:14 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2008-01-09 16:52 [CALL-FOR-HELP] pata_ali: can't get MWDMA working! Tejun Heo
2008-01-09 17:01 ` Tejun Heo
2008-01-09 17:16 ` Alan Cox
2008-01-09 17:28 ` Alan Cox
2008-01-10 1:44 ` Tejun Heo
2008-01-09 17:25 ` Mark Lord
2008-01-10 1:49 ` Tejun Heo
2008-01-09 17:27 ` Sergei Shtylyov
2008-01-10 2:14 ` Tejun Heo
2008-01-09 22:55 ` Bartlomiej Zolnierkiewicz
2008-01-10 1:39 ` Tejun Heo
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