From: Mark Lord <liml@rtr.ca>
To: IDE/ATA development list <linux-ide@vger.kernel.org>,
Jeff Garzik <jgarzik@pobox.com>, Tejun Heo <htejun@gmail.com>
Subject: [PATCH 3/5] sata_mv fix ifctl handling
Date: Mon, 31 Mar 2008 19:35:13 -0400 [thread overview]
Message-ID: <47F17531.9080607@rtr.ca> (raw)
In-Reply-To: <47F1736F.8020104@rtr.ca>
Fix handling of the SATA_INTERFACE_CFG register to match datasheet requirements.
Signed-off-by: Mark Lord <mlord@pobox.com>
---
--- old/drivers/ata/sata_mv.c 2008-03-31 18:12:56.000000000 -0400
+++ linux/drivers/ata/sata_mv.c 2008-03-31 18:14:40.000000000 -0400
@@ -2242,6 +2242,16 @@
return;
}
+static void mv_setup_ifctl(void __iomem *port_mmio, int want_gen2i)
+{
+ u32 ifctl = readl(port_mmio + SATA_INTERFACE_CFG);
+
+ ifctl = (ifctl & 0xf7f) | 0x9b1000; /* from chip spec */
+ if (want_gen2i)
+ ifctl |= (1 << 7); /* enable gen2i speed */
+ writelfl(ifctl, port_mmio + SATA_INTERFACE_CFG);
+}
+
/*
* Caller must ensure that EDMA is not active,
* by first doing mv_stop_edma() where needed.
@@ -2253,18 +2263,17 @@
writelfl(ATA_RST, port_mmio + EDMA_CMD_OFS);
- if (IS_GEN_II(hpriv)) {
- u32 ifctl = readl(port_mmio + SATA_INTERFACE_CFG);
- ifctl |= (1 << 7); /* enable gen2i speed */
- ifctl = (ifctl & 0xfff) | 0x9b1000; /* from chip spec */
- writelfl(ifctl, port_mmio + SATA_INTERFACE_CFG);
+ if (!IS_GEN_I(hpriv)) {
+ /* Enable 3.0gb/s link speed */
+ mv_setup_ifctl(port_mmio, 1);
}
-
- udelay(25); /* allow reset propagation */
-
- /* Spec never mentions clearing the bit. Marvell's driver does
- * clear the bit, however.
+ /*
+ * Strobing ATA_RST here causes a hard reset of the SATA transport,
+ * link, and physical layers. It resets all SATA interface registers
+ * (except for SATA_INTERFACE_CFG), and issues a COMRESET to the dev.
*/
+ writelfl(ATA_RST, port_mmio + EDMA_CMD_OFS);
+ udelay(25); /* allow reset propagation */
writelfl(0, port_mmio + EDMA_CMD_OFS);
hpriv->ops->phy_errata(hpriv, mmio, port_no);
@@ -2711,19 +2720,6 @@
hpriv->ops->enable_leds(hpriv, mmio);
for (port = 0; port < host->n_ports; port++) {
- if (IS_GEN_II(hpriv)) {
- void __iomem *port_mmio = mv_port_base(mmio, port);
-
- u32 ifctl = readl(port_mmio + SATA_INTERFACE_CFG);
- ifctl |= (1 << 7); /* enable gen2i speed */
- ifctl = (ifctl & 0xfff) | 0x9b1000; /* from chip spec */
- writelfl(ifctl, port_mmio + SATA_INTERFACE_CFG);
- }
-
- hpriv->ops->phy_errata(hpriv, mmio, port);
- }
-
- for (port = 0; port < host->n_ports; port++) {
struct ata_port *ap = host->ports[port];
void __iomem *port_mmio = mv_port_base(mmio, port);
next prev parent reply other threads:[~2008-03-31 23:35 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-03-31 23:27 [PATCH 0/5] sata_mv cleanups Mark Lord
2008-03-31 23:33 ` [PATCH 1/5] sata_mv cosmetic fixes Mark Lord
2008-04-04 7:56 ` Jeff Garzik
2008-03-31 23:34 ` [PATCH 2/5] sata_mv clean up mv_stop_edma usage Mark Lord
2008-04-02 1:59 ` Tejun Heo
2008-04-02 19:33 ` Mark Lord
2008-04-02 19:42 ` Jeff Garzik
2008-04-02 19:47 ` Mark Lord
2008-04-03 0:47 ` Tejun Heo
2008-04-04 7:59 ` Jeff Garzik
2008-03-31 23:35 ` Mark Lord [this message]
2008-03-31 23:35 ` [PATCH 4/5] sata_mv new mv_sata_hardreset handler Mark Lord
2008-04-02 2:31 ` Tejun Heo
2008-04-02 19:33 ` Mark Lord
2008-04-02 19:51 ` Mark Lord
2008-04-03 0:49 ` Tejun Heo
2008-04-03 2:48 ` Mark Lord
2008-04-03 3:15 ` Tejun Heo
2008-04-03 14:01 ` Mark Lord
2008-04-03 14:04 ` Mark Lord
2008-04-03 14:09 ` Tejun Heo
2008-04-03 14:21 ` Mark Lord
2008-04-03 14:35 ` Tejun Heo
2008-04-03 15:05 ` Mark Lord
2008-04-03 14:05 ` Tejun Heo
2008-03-31 23:36 ` [PATCH 5/5] sata_mv remove mv_phy_reset and mv_postreset Mark Lord
2008-04-04 8:02 ` Jeff Garzik
2008-04-04 14:25 ` Mark Lord
2008-04-11 0:21 ` [PATCH] sata_mv rework hardreset sequence Mark Lord
2008-04-16 1:17 ` Mark Lord
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