From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergei Shtylyov Subject: Re: [PATCH] pata_hpt3x2n: fix overclocked MWDMA0 timing Date: Fri, 27 Nov 2009 22:41:55 +0300 Message-ID: <4B102B83.1080102@ru.mvista.com> References: <200911271956.55939.bzolnier@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Return-path: Received: from gateway-1237.mvista.com ([206.112.117.35]:64026 "HELO imap.sh.mvista.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with SMTP id S1751274AbZK0Tkz (ORCPT ); Fri, 27 Nov 2009 14:40:55 -0500 In-Reply-To: <200911271956.55939.bzolnier@gmail.com> Sender: linux-ide-owner@vger.kernel.org List-Id: linux-ide@vger.kernel.org To: Bartlomiej Zolnierkiewicz Cc: linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org Bartlomiej Zolnierkiewicz wrote: > Remove superfluous timings table entry while at it. > Signed-off-by: Bartlomiej Zolnierkiewicz > --- > Sergei, XFER_UDMA_5 timing also looks suspicious, > please take a look when you have a minute, thanks. Yeah, but it's the same as XFER_UDMA_4, so actually underclocked... However, it matches what the HPT371N datasheet and the vendor drivers have. The 'hpt366' driver uses more speedy mode, with 22.5 ns cycle. ;-) MBR, Sergei