[PATCH 1/3] sata_mv: increase PIO IORDY timeout

[PATCH 1/3] sata_mv: increase PIO IORDY timeout

[Saeed Bishara]

The old value (0xbc) in cycles of the IORDY timeout is suitable for
devices with core clock of 166 MHz, but some SoC controllers have
faster core clocks. The new value will make the IORDY timeout large
enough also for all SoC devices.

Signed-off-by: Saeed Bishara <saeed@marvell.com>
---
 drivers/ata/sata_mv.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 23714ae..644436e 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -3368,7 +3368,7 @@ static void mv_soc_reset_hc_port(struct mv_host_priv *hpriv,
 	ZERO(0x024);		/* respq outp */
 	ZERO(0x020);		/* respq inp */
 	ZERO(0x02c);		/* test control */
-	writel(0xbc, port_mmio + EDMA_IORDY_TMOUT);
+	writel(0x800, port_mmio + EDMA_IORDY_TMOUT);
 }
 
 #undef ZERO
-- 
1.6.0.4

[PATCH 2/3] sata_mv: support clkdev framework

[Saeed Bishara]

Signed-off-by: Saeed Bishara <saeed@marvell.com>
---
 drivers/ata/sata_mv.c |   37 ++++++++++++++++++++++++++++++++++---
 1 files changed, 34 insertions(+), 3 deletions(-)
 mode change 100644 => 100755 drivers/ata/sata_mv.c

diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
old mode 100644
new mode 100755
index 644436e..ca9157d
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -59,6 +59,7 @@
 #include <linux/dmapool.h>
 #include <linux/dma-mapping.h>
 #include <linux/device.h>
+#include <linux/clk.h>
 #include <linux/platform_device.h>
 #include <linux/ata_platform.h>
 #include <linux/mbus.h>
@@ -548,6 +549,10 @@ struct mv_host_priv {
 	u32			irq_cause_offset;
 	u32			irq_mask_offset;
 	u32			unmask_all_irqs;
+
+#if defined(CONFIG_HAVE_CLK)
+	struct clk		*clk;
+#endif
 	/*
 	 * These consistent DMA memory pools give us guaranteed
 	 * alignment for hardware-accessed data structures,
@@ -4016,6 +4021,14 @@ static int mv_platform_probe(struct platform_device *pdev)
 				   res->end - res->start + 1);
 	hpriv->base -= SATAHC0_REG_BASE;
 
+#if defined(CONFIG_HAVE_CLK)
+	hpriv->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(hpriv->clk))
+		dev_notice(&pdev->dev, "cannot get clkdev\n");
+	else
+		clk_enable(hpriv->clk);
+#endif
+
 	/*
 	 * (Re-)program MBUS remapping windows if we are asked to.
 	 */
@@ -4024,12 +4037,12 @@ static int mv_platform_probe(struct platform_device *pdev)
 
 	rc = mv_create_dma_pools(hpriv, &pdev->dev);
 	if (rc)
-		return rc;
+		goto err;
 
 	/* initialize adapter */
 	rc = mv_init_host(host, chip_soc);
 	if (rc)
-		return rc;
+		goto err;
 
 	dev_printk(KERN_INFO, &pdev->dev,
 		   "slots %u ports %d\n", (unsigned)MV_MAX_Q_DEPTH,
@@ -4037,6 +4050,15 @@ static int mv_platform_probe(struct platform_device *pdev)
 
 	return ata_host_activate(host, platform_get_irq(pdev, 0), mv_interrupt,
 				 IRQF_SHARED, &mv6_sht);
+err:
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(hpriv->clk)) {
+		clk_disable(hpriv->clk);
+		clk_put(hpriv->clk);
+	}
+#endif
+
+	return rc;
 }
 
 /*
@@ -4051,8 +4073,17 @@ static int __devexit mv_platform_remove(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct ata_host *host = dev_get_drvdata(dev);
-
+#if defined(CONFIG_HAVE_CLK)
+	struct mv_host_priv *hpriv = host->private_data;
+#endif
 	ata_host_detach(host);
+
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(hpriv->clk)) {
+		clk_disable(hpriv->clk);
+		clk_put(hpriv->clk);
+	}
+#endif
 	return 0;
 }
 
-- 
1.6.0.4

[PATCH 3/3] sata_mv: add power management support for the platform driver

[Saeed Bishara]

Signed-off-by: Saeed Bishara <saeed@marvell.com>
---
 drivers/ata/sata_mv.c |   42 ++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 42 insertions(+), 0 deletions(-)

diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index ca9157d..6723a9a 100755
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -4087,9 +4087,51 @@ static int __devexit mv_platform_remove(struct platform_device *pdev)
 	return 0;
 }
 
+#ifdef CONFIG_PM
+static int mv_platform_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct ata_host *host = dev_get_drvdata(&pdev->dev);
+	if (host)
+		return ata_host_suspend(host, state);
+	return 0;
+}
+
+static int mv_platform_resume(struct platform_device *pdev)
+{
+	struct ata_host *host = dev_get_drvdata(&pdev->dev);
+	int ret;
+
+	if (host) {
+		struct mv_host_priv *hpriv = host->private_data;
+		const struct mv_sata_platform_data *mv_platform_data = \
+			pdev->dev.platform_data;
+		/*
+		 * (Re-)program MBUS remapping windows if we are asked to.
+		 */
+		if (mv_platform_data->dram != NULL)
+			mv_conf_mbus_windows(hpriv, mv_platform_data->dram);
+
+		/* initialize adapter */
+		ret = mv_init_host(host, chip_soc);
+		if (ret) {
+			printk(KERN_ERR DRV_NAME ": Error during HW init\n");
+			return ret;
+		}
+		ata_host_resume(host);
+	}
+
+	return 0;
+}
+#else
+#define mv_platform_suspend NULL
+#define mv_platform_resume NULL
+#endif
+
 static struct platform_driver mv_platform_driver = {
 	.probe			= mv_platform_probe,
 	.remove			= __devexit_p(mv_platform_remove),
+	.suspend		= mv_platform_suspend,
+	.resume			= mv_platform_resume,
 	.driver			= {
 				   .name = DRV_NAME,
 				   .owner = THIS_MODULE,
-- 
1.6.0.4

Re: [PATCH 1/3] sata_mv: increase PIO IORDY timeout

[Jeff Garzik]

Saeed Bishara wrote:
> The old value (0xbc) in cycles of the IORDY timeout is suitable for
> devices with core clock of 166 MHz, but some SoC controllers have
> faster core clocks. The new value will make the IORDY timeout large
> enough also for all SoC devices.
> 
> Signed-off-by: Saeed Bishara <saeed@marvell.com>
> ---
>  drivers/ata/sata_mv.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
> index 23714ae..644436e 100644
> --- a/drivers/ata/sata_mv.c
> +++ b/drivers/ata/sata_mv.c
> @@ -3368,7 +3368,7 @@ static void mv_soc_reset_hc_port(struct mv_host_priv *hpriv,
>  	ZERO(0x024);		/* respq outp */
>  	ZERO(0x020);		/* respq inp */
>  	ZERO(0x02c);		/* test control */
> -	writel(0xbc, port_mmio + EDMA_IORDY_TMOUT);
> +	writel(0x800, port_mmio + EDMA_IORDY_TMOUT);

Do we really want to increase the timeout for older devices?  How does 
this change behavior for existing devices?

	Jeff

Re: [PATCH 1/3] sata_mv: increase PIO IORDY timeout

[Saeed Bishara]

On Wed, 24 Jun 2009, Jeff Garzik wrote:

> Saeed Bishara wrote:
> > The old value (0xbc) in cycles of the IORDY timeout is suitable for
> > devices with core clock of 166 MHz, but some SoC controllers have
> > faster core clocks. The new value will make the IORDY timeout large
> > enough also for all SoC devices.
> >
> > Signed-off-by: Saeed Bishara <saeed@marvell.com>
> > ---
> >  drivers/ata/sata_mv.c |    2 +-
> >  1 files changed, 1 insertions(+), 1 deletions(-)
> >
> > diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
> > index 23714ae..644436e 100644
> > --- a/drivers/ata/sata_mv.c
> > +++ b/drivers/ata/sata_mv.c
> > @@ -3368,7 +3368,7 @@ static void mv_soc_reset_hc_port(struct mv_host_priv *hpriv,
> >       ZERO(0x024);            /* respq outp */
> >       ZERO(0x020);            /* respq inp */
> >       ZERO(0x02c);            /* test control */
> > -     writel(0xbc, port_mmio + EDMA_IORDY_TMOUT);
> > +     writel(0x800, port_mmio + EDMA_IORDY_TMOUT);
>
> Do we really want to increase the timeout for older devices?  How does
> this change behavior for existing devices?
This patch affects only soc devices, the 0xbc value sets the IORDY timeout
to 1.25 micro seconds when the core clock is 150MHz (not 166MHz as I
mentioned in the commit's message). This timeout defines the maximum time
the cpu will be held when reading the PIO data register and no data is
available. Sata devices usually fine with timeout, this means that
during PIO data fises, the device will send the data dword within 1.25
micro seconds from the last one.

Recent Marvell soc devices uses higher core clocks (e.g. 200MHz in
kirkwood), so the IORDY timeout must be increased accordingly as it's
defined in core clock cycle. I choose to use the value 0x800 so it will be
good enough also for future devices, and, this large timeout will be good
in case some sata device has big delays within its DATA fises.

 >
>         Jeff
>
>
>
>
>

Re: [PATCH 1/3] sata_mv: increase PIO IORDY timeout

[saeed bishara]

Jeff, any idea if this patch and the following two patches going to be merged?
saeed

Re: [PATCH 1/3] sata_mv: increase PIO IORDY timeout

[Jeff Garzik]

On 12/01/2009 10:37 AM, saeed bishara wrote:
> Jeff, any idea if this patch and the following two patches going to be merged?

hrm, I cannot find these in my mail archives for some reason.  Can you 
resend, please?

	Jeff