Re: [PATCH] pata_hpt3x2n: fix overclocked MWDMA0 timing

[Sergei Shtylyov <sshtylyov@ru.mvista.com>]

Hello.

Jeff Garzik wrote:

>>>> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
>>>> ---
>>>> Sergei, XFER_UDMA_5 timing also looks suspicious,
>>>> please take a look when you have a minute, thanks.
>>
>>> Yeah, but it's the same as XFER_UDMA_4, so actually underclocked...
>>> However, it matches what the HPT371N datasheet and the vendor drivers
>>> have. The 'hpt366' driver uses more speedy mode, with 22.5 ns cycle. 
>>> ;-)
>>
>> I have just verified: this driver has always used this timing
>> historically, at least for HPT372+ chips.
>
> Could you clarify which "this timing" you are referring to?  :)

   UDMA5 timing which looked suspicious to Bart: 'hpt366' driver uses 
faster timing at 66 MHz clock than the vendor drivers and HPT371N 
datasheet have (they have it the same as UDMA4).

>   I never saw an Acked-by on this one.

   I usually don't ACK libata patches, but this one can be an exception:

Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>

   Though I guess you're waiting for Alan's ACK... :-)

>     Jeff

MBR, Sergei