From: Tejun Heo <tj@kernel.org>
To: Krzysztof Halasa <khc@pm.waw.pl>
Cc: Jeff Garzik <jgarzik@pobox.com>,
linux-ide@vger.kernel.org, lkml <linux-kernel@vger.kernel.org>
Subject: Re: SATA_SIL: Add a work-around for IXP4xx CPU.
Date: Tue, 15 Dec 2009 17:19:32 +0900 [thread overview]
Message-ID: <4B274694.6020701@kernel.org> (raw)
In-Reply-To: <m3fx8m0vwh.fsf@intrepid.localdomain>
Hello,
On 11/11/2009 09:04 AM, Krzysztof Halasa wrote:
> IXP4xx CPUs can't read from 8 and 16-bit PCI MMIO registers, we have to read
> from normal IO regions instead.
>
> Tested on SIL3512, and specifically not tested on 4-port SIL3114.
>
> Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Hmmm... Given that there are some platforms which have problem with
mmio and sil3112/4 can do everything via io accesses, it would be nice
to generalize this so that there's CONFIG_SATA_SIL_NO_MMIO which is
selected by affected platforms. Are you interested in doing it?
Thanks.
--
tejun
next prev parent reply other threads:[~2009-12-15 8:18 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-11-11 0:04 SATA_SIL: Add a work-around for IXP4xx CPU Krzysztof Halasa
2009-12-15 8:19 ` Tejun Heo [this message]
2009-12-15 23:03 ` Krzysztof Halasa
2009-12-15 23:09 ` Jeff Garzik
2009-12-16 0:39 ` Tejun Heo
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