From: Tejun Heo <tj@kernel.org>
To: Jassi Brar <jassisinghbrar@gmail.com>
Cc: linux-pci@vger.kernel.org, linux-ide@vger.kernel.org, jgarzik@pobox.com
Subject: Re: SIL24: pcie_set_readrq 4096
Date: Thu, 22 Jul 2010 22:42:38 +0200 [thread overview]
Message-ID: <4C48AD3E.1060108@kernel.org> (raw)
In-Reply-To: <AANLkTiltS3zLLSBgv_VNEXpQvEez2PpObhjmbcZxJ2c8@mail.gmail.com>
On 07/22/2010 04:34 PM, Jassi Brar wrote:
> On Thu, Jul 22, 2010 at 10:18 PM, Tejun Heo <tj@kernel.org> wrote:
>> It's been a while since I read pci-e spec but IIUC readrq size and
>> payload size are independent and if readrq is larger than payload size
>> it's supposed to complete in multiple steps. I could be wrong tho.
> AFAIUI readrq size is independent and not greater than the max_payload size.
> Payload size is what max a device can handle and readrq is what a device can
> ask.
> SIL24 does support 4096 and hence can set readrq to that limit, but if the
> payload capacity of the RC is less than 4096, I am not sure if it is supposed to
> work.
Hmm... my impression is that a single read request may be served by
multiple TLPs, so readrq size can go over payload size which limits
the size of payload in a single TLP, but let's wait for someone more
knowledgeable to chime in.
Thanks.
--
tejun
next prev parent reply other threads:[~2010-07-22 20:42 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-22 2:47 SIL24: pcie_set_readrq 4096 Jassi Brar
2010-07-22 13:18 ` Tejun Heo
2010-07-22 14:34 ` Jassi Brar
2010-07-22 20:42 ` Tejun Heo [this message]
2010-07-23 5:30 ` Rolf Eike Beer
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