Re: sata_sil boot failure with 2.6.35

[Tejun Heo <tj@kernel.org>]

Hello,

On 08/23/2010 05:47 PM, Jan Beulich wrote:
>>>> On 23.08.10 at 15:58, Tejun Heo <tj@kernel.org> wrote:
>>   ata1: ST-ATA: DRQ=0 without device error, dev_stat 0x50
>>
>> which is _really_ weird.  Hmmm... can you please apply the following
>> patch and see whether anything changes?
> 
> No difference, but log attached again just in case.

I can't reproduce the problem w/ my 3114 and unfortunately I don't
have a 3112 or 3512 around.  :-(

The only thing I can think of is the following.  Can you please try
this one?  If this one fails, we might have to resort to bisecting.
It's very weird.  The sff common code is used by other controllers but
until now the problem is only being reported on sata_sil.

Thanks.

diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index 3cb69d5..35bd5cc 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -565,19 +565,6 @@ static void sil_freeze(struct ata_port *ap)
 	tmp |= SIL_MASK_IDE0_INT << ap->port_no;
 	writel(tmp, mmio_base + SIL_SYSCFG);
 	readl(mmio_base + SIL_SYSCFG);	/* flush */
-
-	/* Ensure DMA_ENABLE is off.
-	 *
-	 * This is because the controller will not give us access to the
-	 * taskfile registers while a DMA is in progress
-	 */
-	iowrite8(ioread8(ap->ioaddr.bmdma_addr) & ~SIL_DMA_ENABLE,
-		 ap->ioaddr.bmdma_addr);
-
-	/* According to ata_bmdma_stop, an HDMA transition requires
-	 * on PIO cycle. But we can't read a taskfile register.
-	 */
-	ioread8(ap->ioaddr.bmdma_addr);
 }

 static void sil_thaw(struct ata_port *ap)


-- 
tejun