From: Jiri Slaby <jirislaby@gmail.com>
To: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Jiri Slaby <jslaby@suse.cz>,
jbarnes@virtuousgeek.org, linux-pci@vger.kernel.org,
linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org,
"David S. Miller" <davem@davemloft.net>,
Thomas Renninger <trenn@suse.de>
Subject: Re: [PATCH 1/1] PCI: tune up ICH4 quirk for broken BIOSes
Date: Thu, 13 Jan 2011 11:07:24 +0100 [thread overview]
Message-ID: <4D2ECEDC.4040804@gmail.com> (raw)
In-Reply-To: <201101101140.45501.bjorn.helgaas@hp.com>
On 01/10/2011 07:40 PM, Bjorn Helgaas wrote:
> On Saturday, January 08, 2011 02:58:01 am Jiri Slaby wrote:
>> On 01/08/2011 01:16 AM, Bjorn Helgaas wrote:
>>> On Friday, January 07, 2011 04:29:00 pm Jiri Slaby wrote:
>>>> On 01/08/2011 12:03 AM, Bjorn Helgaas wrote:
>>>>> On Friday, January 07, 2011 01:44:35 pm Jiri Slaby wrote:
>>>>>> On 01/06/2011 08:24 PM, Bjorn Helgaas wrote:
>>>>>>> Theoretically, ACPI tells us about the GPIO/TCO/etc. regions in a
>>>>>>> generic way via namespace devices or something in the static tables.
>>>>>>> Is that generic information missing, or is it there and Linux is
>>>>>>> ignoring it? If we're ignoring it, I'd rather fix that.
>>>>>>
>>>>>> It works for most boxes I would say. Try to google for "claimed by ICH4
>>>>>> ACPI/GPIO/TCO", it reports sane ranges like 0400-047f or 4000-407f.
>>>>>
>>>>> My point is that BIOS should be telling the OS about GPIO/TCO/etc.
>>>>> regions via an ACPI mechanism, and, ideally, we would use that rather
>>>>> than reading the address out of chipset-dependent registers.
>>>>>
>>>>> Even though PMBASE says the ACPI registers occupy 128 bytes from
>>>>> 0x100-0x17f, it's likely there's no actual conflict between the
>>>>> last 16 bytes and the IDE device.
>>>>
>>>> I wouldn't say so. According to the datasheet 0x60-0x7f of the space
>>>> (i.e. 0x160-0x17f here) is for TCO registers. There:
>>>> 0x10 -- Software IRQ Generation Register (i.e. 0x170)
>>>> 0x11-0x1f -- reserved (0x171-0x17f)
>>>>
>>>> So at least 0x170 should be conflicting. Unless TCO is unused/disabled
>>>> and not mapped there at all. May be that the case?
>>>
>>> Maybe. All your patch does is avoid reserving this 0x100-0x1f7
>>> region; it doesn't actually *move* anything. And the IDE device
>>> apparently works at the 0x170 compatibility address. So the
>>> ICH ACPI stuff is still at 0x100-0x17f, so apparently they don't
>>> conflict or maybe the ICH ACPI stuff is disabled. If the box
>>> doesn't even have ACPI, I suppose there would be no reason to
>>> have the ACPI registers enabled. Is there something in ICH
>>> that tells us whether they're enabled?
>>
>> Hmm, there is:
>> bit 4: ACPI Enable (ACPI_EN) — R/W.
>> 0 = Disable.
>> 1 = Decode of the I/O range pointed to by the ACPI Base register is
>> enabled, and the ACPI power management function is enabled. Note that
>> the APM power management ranges (B2/B3h) are always enabled and are not
>> affected by this bit.
>>
>> at 0x44 in the bridge conf space. So we should definitely check the value.
>>
>> I don't have the actual value in that register when ACPI is disabled in
>> BIOS. From the run where acpi=off was passed to the kernel, there is
>> 0x10 (i.e. ACPI_EN=1). However I don't know whether ACPI was disabled in
>> BIOS at that time.
>
> Checking ACPI_EN before doing anything in the quirk looks like
> the simplest thing (if the BIOS actually sets ACPI_EN=0 when
> it disables ACPI).
Unfortunately, they double checked and the BIOS leaves ACPI_EN=1 even
when ACPI is disabled.
From hexdump -Cv /sys/bus/pci/devices/0000\:00\:1f.0/config:
00000040 01 01 00 00 10 00 00 00 00 00 00 00 00 00 01 00
^base addr^|^-- 4th bit ~ ACPI_EN
But I think we still should add the check in any case, the same for GPIO
(there is GPIO_EN) and maybe for newer ICHs. What do you think?
The problem is we can't add a quirk based on DMI for this one, since
there is no DMI table.
I'm out of ideas now.
thanks,
--
js
next prev parent reply other threads:[~2011-01-13 10:07 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-06 15:17 [PATCH 1/1] PCI: tune up ICH4 quirk for broken BIOSes Jiri Slaby
2011-01-06 19:24 ` Bjorn Helgaas
2011-01-07 20:44 ` Jiri Slaby
2011-01-07 22:37 ` Jesse Barnes
2011-01-07 23:13 ` Jiri Slaby
2011-01-07 23:03 ` Bjorn Helgaas
2011-01-07 23:29 ` Jiri Slaby
2011-01-08 0:16 ` Bjorn Helgaas
2011-01-08 9:58 ` Jiri Slaby
2011-01-10 18:40 ` Bjorn Helgaas
2011-01-13 10:07 ` Jiri Slaby [this message]
2011-01-13 23:19 ` Bjorn Helgaas
2011-01-14 0:15 ` Linus Torvalds
2011-01-14 10:31 ` Jiri Slaby
2011-01-14 10:32 ` [PATCH 1/2] PCI: add more checking to ICH region quirks Jiri Slaby
2011-01-14 10:32 ` [PATCH option B 2/2] PCI: do not create quirk I/O regions below PCIBIOS_MIN_IO for ICH Jiri Slaby
2011-02-11 12:09 ` Sergei Shtylyov
2011-02-11 14:16 ` Jiri Slaby
2011-01-14 10:32 ` [PATCH option A 2/2] PCI: do not create quirk I/O regions below PCIBIOS_MIN_IO Jiri Slaby
2011-01-14 16:10 ` [PATCH 1/1] PCI: tune up ICH4 quirk for broken BIOSes Bjorn Helgaas
2011-01-15 15:39 ` Robert Hancock
2011-02-08 9:55 ` Jiri Slaby
2011-02-08 21:20 ` Jesse Barnes
2011-02-11 10:32 ` Jiri Slaby
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