From: Brijesh Singh <brijesh.singh@amd.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, mark.rutland@arm.com,
devicetree@vger.kernel.org, pawel.moll@arm.com,
ijc+devicetree@hellion.org.uk, linux-ide@vger.kernel.org,
robh+dt@kernel.org, galak@codeaurora.org, tj@kernel.org
Subject: Re: [PATCH] ata: add AMD Seattle platform driver
Date: Thu, 7 Jan 2016 19:46:08 -0600 [thread overview]
Message-ID: <568F14E0.4060107@amd.com> (raw)
In-Reply-To: <4983521.tEaWggKCCv@wuerfel>
Hi,
On 01/07/2016 05:42 PM, Arnd Bergmann wrote:
> On Thursday 07 January 2016 16:24:22 Brijesh Singh wrote:
>>>> +
>>>> +Examples:
>>>> + sata0@e0300000 {
>>>> + compatible = "amd,seattle-ahci";
>>>> + reg = <0x0 0xe0300000 0x0 0xf0000>, <0x0 0xe0000078 0x0 0x1>;
>>>
>>> Looking at the register values, I doubt that the SGPIO is actually part of the
>>> sata device. More likely, you are pointing in the middle of an actual
>>> GPIO controller.
>>>
>>
>> That address is SGPIO control register for SATA. The current hardware implementation to control activity LED is not ideal.
>
> Of course its a control register "for" SATA, what I meant is that it's
> not part "of" the SATA IP block, which is hopefully a standard AHCI
> compliant part as required by SBSA.
>
Yes, its not part of SATA IP block. We just need a method of pass SGPIO
control register address to driver.
Should I consider adding a property "sgpio-ctrl" to pass the register
address ?
e.g
sata0@e0300000 {
compatible = "amd,seattle-ahci";
reg = <0 0xe0300000 0 0x800>;
amd,sgpio-ctrl = <0xe0000078>;
interrupts = <0 355 4>;
clocks = <&sataclk_333mhz>;
dma-coherent;
};
>> A57 does not have access to GPIO's connected to backplane controller
>> instead SoC has exposed two SGPIO control registers (LSIOC_SGPIO_CONTROL0:
>> 0xE000_0078 and LSIOC_SGPIO_CONTROL1: 0xE000_007C) to A57. All we
>> need to do is to program these registers based on the disk activity.
>> The firmware running on A5 reads the values and generate proper SGPIO
>> timing and toggles the LEDs etc.
>
> It still sounds like SGPIO is not part of the AHCI standard spec, but
> rather a subset of a device called LSIOC.
>
>> These registers are defined in SATA0/1 DSDT resource template and also
>> documented in SoC BKDG. I just noticed that BKDG has wrong register
>> definition so will ask documentation folks to fix that.
>>
>> This driver is using SGPIO LED control similar to sata_highbank [1]
>> except bit bang GPIO (which is done by firmware).
>>
>> [1] http://lxr.free-electrons.com/source/drivers/ata/sata_highbank.c#L140
>
> This one is rather different: there is a single device that combines
> registers for AHCI, the PHY attached to it and the LED. This is not
> SBSA compliant of course, and it requires having a special driver.
>
> What you have instead looks like a regular AHCI implementation that
> should just work with the standard driver as long as you describe how
> it gets its LEDs.
>
Yes, its regular AHCI implementation and works well with ahci_platform
driver. In standard ahci_platform driver activity LEDs are blinked
through enclosure management interface. Given the current hardware
limitation it seems like creating a new driver would be cleaner. I am
open to suggestion.
Thanks for all your review feedbacks.
> Arnd
>
next prev parent reply other threads:[~2016-01-08 1:46 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-07 20:53 [PATCH] ata: add AMD Seattle platform driver Brijesh Singh
2016-01-07 21:25 ` Arnd Bergmann
2016-01-07 22:24 ` Brijesh Singh
2016-01-07 23:42 ` Arnd Bergmann
2016-01-08 1:46 ` Brijesh Singh [this message]
2016-01-08 8:46 ` Arnd Bergmann
2016-01-08 22:21 ` Brijesh Singh
2016-01-08 22:47 ` Arnd Bergmann
2016-01-11 18:56 ` Brijesh Singh
[not found] ` <5693FAC2.4070003-5C7GfCeVMHo@public.gmane.org>
2016-01-12 14:24 ` Arnd Bergmann
2016-01-13 16:55 ` Brijesh Singh
2016-01-13 20:39 ` Arnd Bergmann
[not found] ` <5690367E.8060609-5C7GfCeVMHo@public.gmane.org>
2016-01-11 15:33 ` Mark Langsdorf
2016-01-11 16:55 ` Brijesh Singh
2016-01-07 22:56 ` Rob Herring
2016-01-08 19:59 ` Joe Perches
2016-01-11 10:23 ` Hans de Goede
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=568F14E0.4060107@amd.com \
--to=brijesh.singh@amd.com \
--cc=arnd@arndb.de \
--cc=devicetree@vger.kernel.org \
--cc=galak@codeaurora.org \
--cc=ijc+devicetree@hellion.org.uk \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-ide@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=pawel.moll@arm.com \
--cc=robh+dt@kernel.org \
--cc=tj@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox