Re: [PATCH 0/2][RFC] Make delay before debouncing configurable

[Damien Le Moal <damien.lemoal@opensource.wdc.com>]

On 2/24/22 23:34, Paul Menzel wrote:
[...]
>> Thank you for cooking this up. I tested this on the ASUS F2A85-M PRO 
>> (AMD, 1022:0x7801), MSI B350M MORTAR (AMD, 1022:0x7901), and IBM S822LC 
>> (Marvell, 1b4b:9235) with no issues and the expected decrease in boot time.
> 
> There is still one issue I noticed. The MSI B350M MORTAR has nine(?) 
> SATA ports, and only one is connected to an SSD. For some of the other 
> unpopulated ports a delay of 100 ms happens (although in Linux kernel 
> threads, but still in serial and not parallel). Unfortunately, that 
> system uses LUKS encryption, and as things are happening in initrd, I do 
> not know if the delays would hold up the overall boot. I need to do more 
> tests.
> 
> ```
> $ grep sata_link_hardreset 20220220-sata-hardreset.txt
>      0.706289 |    0)   scsi_eh-70   |               | 
> sata_link_hardreset() {
>      0.718497 |    0)   scsi_eh-92   |               | 
> sata_link_hardreset() {
>      0.728425 |    0)   scsi_eh-92   | # 9927.978 us |  } /* 
> sata_link_hardreset */
>      0.811159 |    2)   scsi_eh-70   | @ 104870.3 us |  } /* 
> sata_link_hardreset */
>      0.811329 |    2)   scsi_eh-72   |               | 
> sata_link_hardreset() {
>      0.920672 |    3)   scsi_eh-72   | @ 109343.5 us |  } /* 
> sata_link_hardreset */
>      0.920915 |    2)   scsi_eh-78   |               | 
> sata_link_hardreset() {
>      1.024618 |    2)   scsi_eh-78   | @ 103703.7 us |  } /* 
> sata_link_hardreset */
>      1.025027 |    0)   scsi_eh-80   |               | 
> sata_link_hardreset() {
>      1.128589 |    0)   scsi_eh-80   | @ 103561.6 us |  } /* 
> sata_link_hardreset */
> ```

This looks like the delay for the link stability check in
sata_link_debounce(). 100ms is added (more for hotplug case) to ensure
that the SStatus register DET field provides a stable value.

As mentioned in another email on this subject, I cannot find any text in
the AHCI and SATA IO specs that mandate such large delay. Still need to
dig the history of this delay and why it was added.



-- 
Damien Le Moal
Western Digital Research