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From: Niklas Cassel <cassel@kernel.org>
To: Mikko Juhani Korhonen <mjkorhon@gmail.com>
Cc: Damien Le Moal <dlemoal@kernel.org>,
	Ioannis Barkas <jnyb.de@gmail.com>,
	linux-ide@vger.kernel.org
Subject: Re: [PATCH v4] ata: libata: disable LPM for WDC WD20EFAX-68FB5N0 hard drives
Date: Thu, 5 Jun 2025 14:18:16 +0200	[thread overview]
Message-ID: <aEGLCBnh_PSON3Sx@ryzen> (raw)
In-Reply-To: <CAAZ0mTcge55H4Ow0JG8PE5Wpgtz6TG60uvGxRUXrq-aVH4k9aQ@mail.gmail.com>

Hello Mikko,

On Mon, Jun 02, 2025 at 02:17:49PM +0300, Mikko Juhani Korhonen wrote:
> 
> Or shall we just disable dipm on ports 5-6 along lines of:
> 
> diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
> index 163ac909bd06..65dadac93461 100644
> --- a/drivers/ata/ahci.c
> +++ b/drivers/ata/ahci.c
> @@ -52,6 +52,7 @@ enum board_ids {
>        board_ahci_ign_iferr,
>        board_ahci_no_debounce_delay,
>        board_ahci_no_msi,
> +       board_ahci_no_dipm_ports45,
>        /*
>         * board_ahci_pcs_quirk is for legacy Intel platforms.
>         * Modern Intel platforms should use board_ahci instead.
> @@ -152,6 +153,12 @@ static const struct ata_port_info ahci_port_info[] = {
>                .udma_mask      = ATA_UDMA6,
>                .port_ops       = &ahci_ops,
>        },
> +       [board_ahci_no_dipm_ports45] = {
> +               .flags          = AHCI_FLAG_COMMON | ATA_FLAG_NO_DIPM_PORTS45,
> +               .pio_mask       = ATA_PIO4,
> +               .udma_mask      = ATA_UDMA6,
> +               .port_ops       = &ahci_ops,
> +       },
>        [board_ahci_no_msi] = {
>                AHCI_HFLAGS     (AHCI_HFLAG_NO_MSI),
>                .flags          = AHCI_FLAG_COMMON,
> @@ -466,6 +473,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
>        { PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /*
> AMD Hudson-2 (AHCI mode) */
>        { PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */
>        { PCI_VDEVICE(AMD, 0x7901), board_ahci }, /* AMD Green Sardine */
> +       { PCI_VDEVICE(AMD, 0x43EB), board_ahci_no_dipm_ports45 }, /*
> 500 Series Chipset */
>        /* AMD is using RAID class only for ahci controllers */
>        { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
>          PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci },
> diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
> index b990c1ee0b12..de4e058401a5 100644
> --- a/drivers/ata/libata-eh.c
> +++ b/drivers/ata/libata-eh.c
> @@ -3432,7 +3432,10 @@ static int ata_eh_set_lpm(struct ata_link
> *link, enum ata_lpm_policy policy,
>        struct ata_eh_context *ehc = &link->eh_context;
>        struct ata_device *dev, *link_dev = NULL, *lpm_dev = NULL;
>        enum ata_lpm_policy old_policy = link->lpm_policy;
> -       bool no_dipm = link->ap->flags & ATA_FLAG_NO_DIPM;
> +       bool no_dipm = link->ap->flags & ATA_FLAG_NO_DIPM ||
> +               ( link->ap->flags & ATA_FLAG_NO_DIPM_PORTS45 &&
> +               ( link->ap->port_no == 4 ||
> +               link->ap->port_no == 5 ));
>        unsigned int hints = ATA_LPM_EMPTY | ATA_LPM_HIPM;
>        unsigned int err_mask;
>        int rc;
> diff --git a/include/linux/libata.h b/include/linux/libata.h
> index e5695998acb0..467a91362d2d 100644
> --- a/include/linux/libata.h
> +++ b/include/linux/libata.h
> @@ -218,6 +218,7 @@ enum {
>                                              * led */
>        ATA_FLAG_NO_DIPM        = (1 << 23), /* host not happy with DIPM */
>        ATA_FLAG_SAS_HOST       = (1 << 24), /* SAS host */
> +       ATA_FLAG_NO_DIPM_PORTS45= (1 << 25), /* host ports 45 not
> happy with DIPM */
> 
>        /* bits 24:31 of ap->flags are reserved for LLD specific flags */
> 
> or for all ports (Damien's patch earlier in this thread) ? I don't know.

Personally, I think that checking for certain port numbers, for a specific
motherboard makes the code very ugly, and will not scale very well if some
other motherboard has a different subset of ports where LPM does not work,
so I would rather avoid a quirk handling port numbers.

It is unfortunate that the BIOS manufacturer has managed to mess this up,
but since this is the first motherboard where I've heard about the problem
of LPM only working on certain ports, even though it is a per controller
thing, just not having good power saving for this motherboard seems fine.

I suggest that we simply add the DMI name of your motherboard to
ahci_broken_lpm().

(Since LPM works on the other ports, it seems wrong to quirk all of this
generation of AMD AHCI. It is most likely a BIOS problem and not a AHCI
controller problem.)


Kind regards,
Niklas

  reply	other threads:[~2025-06-05 12:18 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-30 20:36 [PATCH v4] ata: libata: disable LPM for WDC WD20EFAX-68FB5N0 hard drives Ioannis Barkas
2025-05-01 18:47 ` Damien Le Moal
2025-05-02  1:32   ` Damien Le Moal
2025-05-05  7:58     ` Mikko Juhani Korhonen
2025-05-05 15:37       ` Niklas Cassel
2025-05-05 17:09         ` Mikko Juhani Korhonen
2025-05-07  8:55           ` Damien Le Moal
2025-05-10 10:14             ` Mikko Juhani Korhonen
2025-05-10 11:59               ` Niklas Cassel
2025-05-10 18:29                 ` Ioannis Barkas
2025-05-11 17:08                 ` Mikko Juhani Korhonen
2025-05-11 18:53                   ` Niklas Cassel
2025-05-11 18:59                     ` Mikko Juhani Korhonen
2025-05-11 19:18                       ` Niklas Cassel
2025-05-11 20:40                         ` Mikko Juhani Korhonen
2025-05-12  5:37                         ` Mikko Juhani Korhonen
2025-05-12  9:25                           ` Niklas Cassel
2025-05-12 10:34                             ` Mikko Juhani Korhonen
2025-05-12 11:20                               ` Niklas Cassel
     [not found]                                 ` <CAAZ0mTeiVqZQvkWzJ8aFH4FUPCZwy5O+9hPBgDPhSgNNz+t6HA@mail.gmail.com>
2025-05-14 17:57                                   ` Niklas Cassel
2025-05-17 16:31                                     ` Mikko Juhani Korhonen
     [not found]                                     ` <CAAZ0mTdZEd6n+tDvqbqzMQS2W+3efpYOeHupYcj3rDSVeuHFBA@mail.gmail.com>
2025-05-23 14:05                                       ` Niklas Cassel
2025-06-02 11:17                                     ` Mikko Juhani Korhonen
2025-06-05 12:18                                       ` Niklas Cassel [this message]
2025-06-09 13:49                                         ` Niklas Cassel
2025-06-11 13:14                                           ` Mikko Juhani Korhonen
2025-06-11 13:33                                             ` Niklas Cassel
2025-05-07  8:59           ` Niklas Cassel
2025-05-08 19:24             ` Mario Limonciello
2025-05-07  8:59           ` Damien Le Moal
2025-05-11 18:55             ` Mikko Juhani Korhonen
  -- strict thread matches above, loose matches on Subject: below --
2025-05-05 19:38 Ioannis Barkas
2025-05-05 23:33 ` Damien Le Moal
2025-05-06 11:29 ` Mikko Juhani Korhonen
2025-04-29 16:44 Mikko Korhonen
2025-04-30  6:35 ` Niklas Cassel

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