Re: [PATCH v2] ata: ahci: work around lost interrupts on Marvell 88SE61xx

[Niklas Cassel <cassel@kernel.org>]

On Fri, Aug 28, 2026 at 09:04:52PM +0200, Pali Rohár wrote:
> On Friday 28 August 2026 09:05:21 Hajo Noerenberg wrote:
> > ahci_single_level_irq_intr() services the ports first and clears the
> > global HOST_IRQ_STAT afterwards, as recommended by AHCI 1.1 section
> > 10.6.2.  The Marvell 88SE6111/6121/6145 family stops reporting interrupts
> > for a port when HOST_IRQ_STAT is cleared while PxIS still holds bits:
> > PxIS keeps its content, HOST_IRQ_STAT reads back as 0, the port is never
> > looked at again, and the command in flight only ends in a timeout.
> > 
> > Measured on a Seagate Blackarmor NAS440 (Marvell 88F6281 Kirkwood,
> > 88SE6121 rev B2 behind PCIe) by polling the AHCI registers from userspace
> > while an IDENTIFY was outstanding:
> > 
> >   t=303.046  irqs 127  PxIS 0x00000000  PxCI 0x00000001
> >              IDENTIFY issued
> >   t=303.057  irqs 128  PxIS 0x00000020  PxCI 0x00000000
> >              CI cleared, DPS set, one interrupt taken
> >              ... PxIS stays 0x00000020, HOST_IRQ_STAT stays 0 ...
> >   t~308.05   qc timeout after 5000 msecs
> > 
> > The command had completed - PxCI was clear and PxIS had DPS set - so
> > ahci_qc_complete() would have completed it.  It never got the chance
> > because the handler read HOST_IRQ_STAT as 0 and returned IRQ_NONE.
> > 
> > Marvell's own driver for these chips clears the two registers in the
> > opposite order and says so ("clear global before channel"), and
> > ahci_xgene handles its broken edge latch the same way.  Since the
> > reordering costs at most one spurious interrupt per valid one on
> > conforming controllers, do it in a private interrupt handler selected for
> > board_ahci_mv instead of changing libahci for everyone.
> > 
> > With this applied, SATA-2 and SATA-3 disks work at 3.0 Gbps on the
> > 88SE6121 without the drive-side 1.5 Gbps jumper that was needed before.
> > Time from link up to a successful IDENTIFY:
> > 
> >   WDC WD5000AADS-00S9B0  port 0    7 ms  (never identified before)
> >   WDC WD3202ABYS-01B7A0  port 1   28 ms
> >   WDC WD30EFRX-68EUZN0   port 1  200 ms  (3 TB, HPA detection ok)
> > 
> > Only the 88SE6121 was tested; board_ahci_mv also covers the 88SE6145,
> > which Marvell's driver treats identically.
> > 
> > Link: https://lore.kernel.org/linux-ide/db6b48b7-d69a-564b-24f0-75fbd6a9e543@noerenberg.de/
> > Link: https://bugzilla.kernel.org/show_bug.cgi?id=216094
> > Signed-off-by: Hajo Noerenberg <hajo-linux-ide@noerenberg.de>
> 
> Thank you for successfully addressing this issue after working on it for
> a longer time.  It is very nice to see a successful story at the end.
> 
> For me the change looks good.
> 
> Acked-by: Pali Rohár <pali@kernel.org>
> 
> As this change is fixing the support for more disks, I would suggest to
> backport this change also into older kernels, ideally by cc: stable
> line (so it would be automatic).


This patch does not apply.

Looking at the line numbers, this patch looks like it is based on some ancient kernel.

Please:
1) Rebase patch on top of 7.3-rc1
2) Add Cc: stable@vger.kernel.org
3) Add Fixes: cd70c26617f4 ("[libata] AHCI: Add support for Marvell AHCI-like chips (initially 6145)")


Tip: if you use:
$ git format-patch --base=HEAD~ -1

the SHA1 that your patch is based on will be included in the patch trailer.


Kind regards,
Niklas