* Re: [RESEND PATCH] arm: assabet_defconfig: disable IDE subsystem
From: Bartlomiej Zolnierkiewicz @ 2016-12-12 12:45 UTC (permalink / raw)
To: Sekhar Nori
Cc: Russell King, Arnd Bergmann, Dmitry Eremin-Solenikov,
Kevin Hilman, linux-kernel, linux-ide, Olof Johansson,
linux-arm-kernel
In-Reply-To: <578CEB74.2080002@ti.com>
Hi,
On Monday, July 18, 2016 08:15:08 PM Sekhar Nori wrote:
> On Friday 15 July 2016 08:45 PM, Kevin Hilman wrote:
> > Arnd Bergmann <arnd@arndb.de> writes:
> >
> >> On Wednesday, July 13, 2016 12:59:23 PM CEST Bartlomiej Zolnierkiewicz wrote:
> >>>
> >>> On Friday, July 08, 2016 10:23:48 PM Arnd Bergmann wrote:
> >>>> On Friday, July 8, 2016 5:24:41 PM CEST Bartlomiej Zolnierkiewicz wrote:
> >>>>> This patch disables deprecated IDE subsystem in assabet_defconfig
> >>>>> (no IDE host drivers are selected in this config so there is no
> >>>>> valid reason to enable IDE subsystem itself).
> >>>>>
> >>>>> Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
> >>>>> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
> >>>>
> >>>> I think the series makes a lot of sense. I have checked your assertions
> >>>> in the changelogs and found no flaws in your logic, so I think we should
> >>>> take them all through arm-soc unless there are other concerns.
> >>>
> >>> Thank you.
> >>>
> >>> Should I resend everything or just patches that were not reposted yet
> >>> (the ones that were marked as RFT initially and got no feedback)?
> >>
> >> I'd be fine with just getting a pull request with all the patches that
> >> had no negative feedback and that were not already applied (if any).
> >>
> >>>> Do you have a list of ARM defconfigs that keep using CONFIG_IDE and
> >>>> how you determined that they need it?
> >>>
> >>> The only such defconfig is davinci_all_defconfig which uses
> >>> palm_bk3710 host driver (CONFIG_BLK_DEV_PALMCHIP_BK3710).
> >>>
> >>>> I know that ARCH_RPC/ARCH_ACORN has a couple of special drivers that
> >>>> have no libata replacement, are there any others like that, or are
> >>>> they all platforms that should in theory work with libata but need
> >>>> testing?
> >>>
> >>> All platforms except ARCH_ACORN, ARCH_DAVINCI & ARCH_RPC should work
> >>> with libata.
> >>
> >> Adding Sekhar and Kevin for DaVinci: At first sight, palm_bk3710 looks
> >> fairly straightforward (meaning someone has to do a few day's work)
> >> to convert into a libata driver.
> >>
> >> As this is on on-chip controller that is part of a dm644x and dm646x,
> >> it should also not be hard to test (as long as someone can find
> >> a hard drive to plug in).
> >
> > I have a hard drive, but don't have any dm64xx hardware anymore to test
> > this. My last working dm644x board died last year.
>
> I have a working DM6446 EVM. I was able to connect a hard drive to it
> and do some basic tests with v4.6 kernel.
>
> I will look into converting the driver to libata. Might take some time
> because this is unfamiliar territory for me.
Do you need some help with it?
I can provide you with draft driver patch if you want.
I'm also on #kernel IRC channel in case you have some questions..
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
^ permalink raw reply
* Re: [RESEND PATCH] arm: assabet_defconfig: disable IDE subsystem
From: Sekhar Nori @ 2016-12-12 13:54 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz
Cc: Kevin Hilman, Arnd Bergmann, linux-arm-kernel, Russell King,
Dmitry Eremin-Solenikov, linux-kernel, linux-ide, Olof Johansson
In-Reply-To: <5370936.ZbqF1HU8Jz@amdc3058>
Hi Bartlomiej,
On Monday 12 December 2016 06:15 PM, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> On Monday, July 18, 2016 08:15:08 PM Sekhar Nori wrote:
>> On Friday 15 July 2016 08:45 PM, Kevin Hilman wrote:
>>> Arnd Bergmann <arnd@arndb.de> writes:
>>>
>>>> On Wednesday, July 13, 2016 12:59:23 PM CEST Bartlomiej Zolnierkiewicz wrote:
>>>>>
>>>>> On Friday, July 08, 2016 10:23:48 PM Arnd Bergmann wrote:
>>>>>> On Friday, July 8, 2016 5:24:41 PM CEST Bartlomiej Zolnierkiewicz wrote:
>>>>>>> This patch disables deprecated IDE subsystem in assabet_defconfig
>>>>>>> (no IDE host drivers are selected in this config so there is no
>>>>>>> valid reason to enable IDE subsystem itself).
>>>>>>>
>>>>>>> Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
>>>>>>> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
>>>>>>
>>>>>> I think the series makes a lot of sense. I have checked your assertions
>>>>>> in the changelogs and found no flaws in your logic, so I think we should
>>>>>> take them all through arm-soc unless there are other concerns.
>>>>>
>>>>> Thank you.
>>>>>
>>>>> Should I resend everything or just patches that were not reposted yet
>>>>> (the ones that were marked as RFT initially and got no feedback)?
>>>>
>>>> I'd be fine with just getting a pull request with all the patches that
>>>> had no negative feedback and that were not already applied (if any).
>>>>
>>>>>> Do you have a list of ARM defconfigs that keep using CONFIG_IDE and
>>>>>> how you determined that they need it?
>>>>>
>>>>> The only such defconfig is davinci_all_defconfig which uses
>>>>> palm_bk3710 host driver (CONFIG_BLK_DEV_PALMCHIP_BK3710).
>>>>>
>>>>>> I know that ARCH_RPC/ARCH_ACORN has a couple of special drivers that
>>>>>> have no libata replacement, are there any others like that, or are
>>>>>> they all platforms that should in theory work with libata but need
>>>>>> testing?
>>>>>
>>>>> All platforms except ARCH_ACORN, ARCH_DAVINCI & ARCH_RPC should work
>>>>> with libata.
>>>>
>>>> Adding Sekhar and Kevin for DaVinci: At first sight, palm_bk3710 looks
>>>> fairly straightforward (meaning someone has to do a few day's work)
>>>> to convert into a libata driver.
>>>>
>>>> As this is on on-chip controller that is part of a dm644x and dm646x,
>>>> it should also not be hard to test (as long as someone can find
>>>> a hard drive to plug in).
>>>
>>> I have a hard drive, but don't have any dm64xx hardware anymore to test
>>> this. My last working dm644x board died last year.
>>
>> I have a working DM6446 EVM. I was able to connect a hard drive to it
>> and do some basic tests with v4.6 kernel.
>>
>> I will look into converting the driver to libata. Might take some time
>> because this is unfamiliar territory for me.
>
> Do you need some help with it?
>
> I can provide you with draft driver patch if you want.
A draft driver patch will really help. I can test/debug. Otherwise, not
sure when I will really be able to get to this.
Regards,
Sekhar
^ permalink raw reply
* Re: [PATCH] pata_legacy: Allow disabling of legacy PATA device probes on non-PCI systems
From: Tejun Heo @ 2016-12-12 17:01 UTC (permalink / raw)
To: whiteheadm; +Cc: One Thousand Gnomes, Sergei Shtylyov, linux-ide
In-Reply-To: <CAP8WD_becq+h2=-g7t-6Pp1psmkCCvdB0YUcg+wYPocUP4dYdw@mail.gmail.com>
Hello,
On Fri, Dec 09, 2016 at 12:57:02PM -0500, tedheadster wrote:
> Tejun,
> here is the patch I applied:
>
> diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c
> index 4fe9d21..5c6c578 100644
> --- a/drivers/ata/pata_legacy.c
> +++ b/drivers/ata/pata_legacy.c
> @@ -963,6 +963,9 @@ static __init int legacy_init_one(struct legacy_probe
> *probe)
> if (IS_ERR(pdev))
> return PTR_ERR(pdev);
>
> + if (!devres_open_group(&pdev->dev, legacy_init_one, GFP_KERNEL))
> + return -ENOMEM;
Can you please drop the explicit group open/remove/release?
> ret = -EBUSY;
> if (devm_request_region(&pdev->dev, io, 8, "pata_legacy") == NULL ||
> devm_request_region(&pdev->dev, io + 0x0206, 1,
> @@ -1009,11 +1012,14 @@ static __init int legacy_init_one(struct
> legacy_probe *probe)
> if (!ata_dev_absent(dev)) {
> legacy_host[probe->slot] = host;
> ld->platform_dev = pdev;
> + devres_remove_group(&pdev->dev, legacy_init_one);
> return 0;
> }
> }
> ata_host_detach(host);
> fail:
> + devres_release_group(&pdev->dev, legacy_init_one);
> + printk("XXX pata_legacy: unregistering platform dev %p\n", pdev);
> platform_device_unregister(pdev);
So, the thing is that when the platform device is released here, it
should automatically trigger release of all resources attached to it
through...
> return ret;
> }
> diff --git a/drivers/base/core.c b/drivers/base/core.c
> index a235085..8e8948e 100644
> --- a/drivers/base/core.c
> +++ b/drivers/base/core.c
> @@ -214,6 +214,7 @@ static void device_release(struct kobject *kobj)
> * is deleted but alive, so release devres here to avoid
> * possible memory leak.
> */
> + printk("XXX device_release: invoking devres_release_all\n");
> devres_release_all(dev);
the devres_release_all() call here.
Can you please try to verify that devres_release_all() is being
invoked from platform device release? I'll try to see if I can repro
the problem here.
thanks.
--
tejun
^ permalink raw reply
* [V1] ata: sata_mv:- Handle return value of devm_ioremap.
From: Arvind Yadav @ 2016-12-12 17:43 UTC (permalink / raw)
To: tj; +Cc: linux-ide, linux-kernel
Here, If devm_ioremap will fail. It will return NULL.
Then hpriv->base = NULL - 0x20000; Kernel can run into
a NULL-pointer dereference. This error check will avoid
NULL pointer dereference.
Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
---
drivers/ata/sata_mv.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index efc48bf..9d0cdad 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -4119,6 +4119,9 @@ static int mv_platform_probe(struct platform_device *pdev)
host->iomap = NULL;
hpriv->base = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
+ if (!hpriv->base)
+ return -ENOMEM;
+
hpriv->base -= SATAHC0_REG_BASE;
hpriv->clk = clk_get(&pdev->dev, NULL);
--
2.7.4
^ permalink raw reply related
* [GIT PULL] libata changes for v4.10-rc1
From: Tejun Heo @ 2016-12-12 18:32 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linux-ide, linux-kernel
Hello, Linus.
* Adam added opt-in ATA command priority support.
* There are machines which hide multiple nvme devices behind an ahci
BAR. Dan Williams proposed a solution to force-switch the mode but
deemed too hackishd. People are gonna discuss the proper way to
handle the situation in nvme standard meetings. For now, detect and
warn about the situation.
* Low level driver specific changes.
Thanks.
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git for-4.10
for you to fetch changes up to aecec8b60422118b52e3347430ba9382e57d6d76:
ahci: warn about remapped NVMe devices (2016-12-05 14:31:24 -0500)
----------------------------------------------------------------
Adam Manzanares (4):
block: Add iocontext priority to request
ata: Enabling ATA Command Priorities
ata: ATA Command Priority Disabled By Default
ata: set ncq_prio_enabled iff device has support
Christoph Hellwig (2):
nvme: move NVMe class code to pci_ids.h
ahci: warn about remapped NVMe devices
Dan Williams (1):
ahci-remap.h: add ahci remapping definitions
Tang Yuantian (1):
ahci: qoriq: added ls1046a platform support
Vladimir Zapolskiy (4):
pata: imx: sort headers out
pata: imx: set controller PIO mode with .set_piomode callback
pata: imx: add support of setting timings for PIO modes
pata: imx: support controller modes up to PIO4
block/blk-core.c | 4 ++-
drivers/ata/ahci.c | 39 ++++++++++++++++++++++
drivers/ata/ahci_qoriq.c | 16 +++++++--
drivers/ata/libahci.c | 1 +
drivers/ata/libata-core.c | 35 +++++++++++++++++++-
drivers/ata/libata-scsi.c | 80 +++++++++++++++++++++++++++++++++++++++++++-
drivers/ata/libata.h | 2 +-
drivers/ata/pata_imx.c | 82 ++++++++++++++++++++++++++++++++--------------
drivers/nvme/host/pci.c | 3 --
include/linux/ahci-remap.h | 28 ++++++++++++++++
include/linux/ata.h | 6 ++++
include/linux/blkdev.h | 14 ++++++++
include/linux/libata.h | 5 +++
include/linux/pci_ids.h | 2 ++
14 files changed, 282 insertions(+), 35 deletions(-)
create mode 100644 include/linux/ahci-remap.h
^ permalink raw reply
* Re: [GIT PULL] libata changes for v4.10-rc1
From: Christoph Hellwig @ 2016-12-12 19:04 UTC (permalink / raw)
To: Tejun Heo; +Cc: Linus Torvalds, linux-ide, linux-kernel
In-Reply-To: <20161212183209.GE13864@htj.duckdns.org>
On Mon, Dec 12, 2016 at 01:32:09PM -0500, Tejun Heo wrote:
> Hello, Linus.
>
> * Adam added opt-in ATA command priority support.
>
> * There are machines which hide multiple nvme devices behind an ahci
> BAR. Dan Williams proposed a solution to force-switch the mode but
> deemed too hackishd. People are gonna discuss the proper way to
> handle the situation in nvme standard meetings. For now, detect and
> warn about the situation.
I wish that was the case. We've pretty much agreed that we'll want
to implement it as a virtual PCIe root bridge, similar to Intels other
"innovation" VMD that we work around that way. But Intel management
has apparently decided that they don't want to spend more cycles on
this now that Lenovo has an optional BIOS that doesn't force this
broken mode anymore, and no one outside of Intel has enough information
to implement something like this.
So for now I guess this warning is it, until Intel reconsideres and
spends resources on fixing up the damage their Chipset people caused.
^ permalink raw reply
* Re: [GIT PULL] libata changes for v4.10-rc1
From: Tejun Heo @ 2016-12-12 19:27 UTC (permalink / raw)
To: Christoph Hellwig; +Cc: Linus Torvalds, linux-ide, linux-kernel
In-Reply-To: <20161212190402.GA8592@infradead.org>
On Mon, Dec 12, 2016 at 11:04:02AM -0800, Christoph Hellwig wrote:
> I wish that was the case. We've pretty much agreed that we'll want
> to implement it as a virtual PCIe root bridge, similar to Intels other
> "innovation" VMD that we work around that way. But Intel management
> has apparently decided that they don't want to spend more cycles on
> this now that Lenovo has an optional BIOS that doesn't force this
> broken mode anymore, and no one outside of Intel has enough information
> to implement something like this.
>
> So for now I guess this warning is it, until Intel reconsideres and
> spends resources on fixing up the damage their Chipset people caused.
Dang, ah well, this is it then.
Thanks for explaining the situation.
--
tejun
^ permalink raw reply
* DO YOU NEED A LOAN??
From: bancoleite @ 2016-12-13 5:27 UTC (permalink / raw)
To: Recipients
Are you in need of a loan? Apply for more details.
^ permalink raw reply
* [GIT PULL UPDATED] libata changes for v4.10-rc1
From: Tejun Heo @ 2016-12-13 22:24 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linux-ide, linux-kernel
In-Reply-To: <20161212183209.GE13864@htj.duckdns.org>
Hello,
One more patch from Adam added. It makes libata skip probing for NCQ
prio unless the feature is explicitly requested by the user. This is
necessary because some controllers lock up after the optional feature
is probed.
* Adam added opt-in ATA command priority support.
* There are machines which hide multiple nvme devices behind an ahci
BAR. Dan Williams proposed a solution to force-switch the mode but
deemed too hackishd. People are gonna discuss the proper way to
handle the situation in nvme standard meetings. For now, detect and
warn about the situation.
* Low level driver specific changes.
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git for-4.10
for you to fetch changes up to 9f56eca3aeeab699a7dbfb397661d2eca4430e94:
ata: avoid probing NCQ Prio Support if not explicitly requested (2016-12-13 17:20:17 -0500)
----------------------------------------------------------------
Adam Manzanares (5):
block: Add iocontext priority to request
ata: Enabling ATA Command Priorities
ata: ATA Command Priority Disabled By Default
ata: set ncq_prio_enabled iff device has support
ata: avoid probing NCQ Prio Support if not explicitly requested
Christoph Hellwig (2):
nvme: move NVMe class code to pci_ids.h
ahci: warn about remapped NVMe devices
Dan Williams (1):
ahci-remap.h: add ahci remapping definitions
Tang Yuantian (1):
ahci: qoriq: added ls1046a platform support
Vladimir Zapolskiy (4):
pata: imx: sort headers out
pata: imx: set controller PIO mode with .set_piomode callback
pata: imx: add support of setting timings for PIO modes
pata: imx: support controller modes up to PIO4
block/blk-core.c | 4 ++-
drivers/ata/ahci.c | 39 +++++++++++++++++++++
drivers/ata/ahci_qoriq.c | 16 +++++++--
drivers/ata/libahci.c | 1 +
drivers/ata/libata-core.c | 42 ++++++++++++++++++++++-
drivers/ata/libata-scsi.c | 84 +++++++++++++++++++++++++++++++++++++++++++++-
drivers/ata/libata.h | 2 +-
drivers/ata/pata_imx.c | 82 ++++++++++++++++++++++++++++++--------------
drivers/nvme/host/pci.c | 3 --
include/linux/ahci-remap.h | 28 ++++++++++++++++
include/linux/ata.h | 6 ++++
include/linux/blkdev.h | 14 ++++++++
include/linux/libata.h | 5 +++
include/linux/pci_ids.h | 2 ++
14 files changed, 293 insertions(+), 35 deletions(-)
create mode 100644 include/linux/ahci-remap.h
^ permalink raw reply
* (unknown),
From: Mr Friedrich Mayrhofer @ 2016-12-14 2:45 UTC (permalink / raw)
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^ permalink raw reply
* (unknown),
From: robert.berry @ 2016-12-14 13:00 UTC (permalink / raw)
To: linux-ide
[-- Attachment #1: MICROSOFT_06124793158_linux-ide.zip --]
[-- Type: application/zip, Size: 16553 bytes --]
^ permalink raw reply
* Errors on Marvell
From: Emilio Lazo Zaia @ 2016-12-14 21:00 UTC (permalink / raw)
To: tj; +Cc: linux-ide
Hello!
I have a 4xSATA PCI-E card (SYBA brand, Marvell chipset) which behaves
bad on some circumstances that aren't clear to me, so I call that
behavior random.
My mobo is a Gigabyte GA-A75-UD4H/GA-A75-UD4H. The problem consists in
the quoted errors/debug info. I can't write DVD and sometimes
reading/writing to hard disks is slow.
I've disabled the Native Command Queue via kernel parameters
(libata.force=noncq); also I've lowered the speed of all ATA controllers
to 1,5Gbps. There is no difference. The issue persists.
--- lspci -v:
01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9215 (rev
11) (prog-if 01 [AHCI 1.0])
Subsystem: Marvell Technology Group Ltd. Device 9215
Flags: bus master, fast devsel, latency 0, IRQ 38
I/O ports at bf00 [size=8]
I/O ports at be00 [size=4]
I/O ports at bd00 [size=8]
I/O ports at bc00 [size=4]
I/O ports at bb00 [size=32]
Memory at fdbff000 (32-bit, non-prefetchable) [size=2K]
[virtual] Expansion ROM at fdb00000 [disabled] [size=64K]
Capabilities: [40] Power Management version 3
Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit-
Capabilities: [70] Express Legacy Endpoint, MSI 00
Capabilities: [e0] SATA HBA v0.0
Capabilities: [100] Advanced Error Reporting
Kernel driver in use: ahci
Kernel modules: ahci
---
I don't have more options to test. Do you have one? If I can help
improving something I'll do whatever steps necessary to provide debug
information to the kernel developers regarding this problem.
Kind regards
Emilio.
--- dmesg info
[434967.722795] ata9: exception Emask 0x10 SAct 0x0 SErr 0x4050000
action 0xe frozen
[434967.722807] ata9: irq_stat 0x80400040, connection status changed
[434967.722815] ata9: SError: { PHYRdyChg CommWake DevExch }
[434967.722827] ata9: hard resetting link
[434969.192373] ata9: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[434969.193014] ata9.00: FORCE: horkage modified (noncq)
[434969.215990] ata9.00: ATA-7: WDC WD3200AAJS-22RYA0, 12.01B01, max
UDMA/133
[434969.215997] ata9.00: 625142448 sectors, multi 0: LBA48 NCQ (not used)
[434969.216882] ata9.00: configured for UDMA/133
[434969.216903] ata9: EH complete
[434970.126924] ata9: exception Emask 0x10 SAct 0x0 SErr 0x190002 action
0xe frozen
[434970.126934] ata9: irq_stat 0x80400000, PHY RDY changed
[434970.126940] ata9: SError: { RecovComm PHYRdyChg 10B8B Dispar }
[434970.126949] ata9: hard resetting link
[434970.836345] ata9: SATA link down (SStatus 0 SControl 300)
[434970.916242] ata9: hard resetting link
[434974.892261] ata9: SATA link down (SStatus 0 SControl 300)
[434974.892269] ata9.00: link offline, clearing class 1 to NONE
[434974.892277] ata9: limiting SATA link speed to 1.5 Gbps
[434975.320012] ata9: hard resetting link
[434977.432186] ata9: SATA link down (SStatus 0 SControl 310)
[434977.432194] ata9.00: link offline, clearing class 1 to NONE
[434977.432201] ata9.00: disabled
[434977.432226] ata9: EH complete
[434977.432327] ata9.00: detaching (SCSI 8:0:0:0)
[434977.898235] ata9: exception Emask 0x10 SAct 0x0 SErr 0x4000000
action 0xe frozen
[434977.898248] ata9: irq_stat 0x80000040, connection status changed
[434977.898255] ata9: SError: { DevExch }
[434977.898267] ata9: hard resetting link
[434983.748063] ata9: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[434983.748703] ata9.00: FORCE: horkage modified (noncq)
[434983.771571] ata9.00: ATA-7: WDC WD3200AAJS-22RYA0, 12.01B01, max
UDMA/133
[434983.771579] ata9.00: 625142448 sectors, multi 0: LBA48 NCQ (not used)
[434983.772480] ata9.00: configured for UDMA/133
[434983.772501] ata9: EH complete
[435061.615367] ata9: exception Emask 0x10 SAct 0x0 SErr 0x190002 action
0xe frozen
[435061.615378] ata9: irq_stat 0x80400000, PHY RDY changed
[435061.615386] ata9: SError: { RecovComm PHYRdyChg 10B8B Dispar }
[435061.615396] ata9: hard resetting link
[435062.326353] ata9: SATA link down (SStatus 0 SControl 300)
[435067.386234] ata9: hard resetting link
[435067.702284] ata9: SATA link down (SStatus 0 SControl 300)
[435067.702297] ata9: limiting SATA link speed to 1.5 Gbps
[435072.762107] ata9: hard resetting link
[435073.078040] ata9: SATA link down (SStatus 0 SControl 310)
[435073.078052] ata9.00: disabled
[435073.078078] ata9: EH complete
[435073.078105] ata9.00: detaching (SCSI 8:0:0:0)
[435101.716072] ata8: exception Emask 0x10 SAct 0x0 SErr 0x4050000
action 0xe frozen
[435101.716084] ata8: irq_stat 0x80400040, connection status changed
[435101.716091] ata8: SError: { PHYRdyChg CommWake DevExch }
[435101.716104] ata8: hard resetting link
[435102.585464] ata8: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[435102.586086] ata8.00: FORCE: horkage modified (noncq)
[435102.607691] ata8.00: ATA-7: WDC WD3200AAJS-22RYA0, 12.01B01, max
UDMA/133
[435102.607699] ata8.00: 625142448 sectors, multi 0: LBA48 NCQ (not used)
[435102.608621] ata8.00: configured for UDMA/133
[435102.608642] ata8: EH complete
[435205.123301] ata7.00: exception Emask 0x0 SAct 0x0 SErr 0x0 action
0x6 frozen
[435205.123328] ata7.00: cmd a0/00:00:00:02:00/00:00:00:00:00/a0 tag 24
pio 16388 in
[435205.123335] ata7.00: status: { DRDY }
[435205.123342] ata7: hard resetting link
[435205.599244] ata7: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
[435205.605549] ata7.00: configured for UDMA/100
[435205.607873] ata7: EH complete
[435471.690523] ata8: exception Emask 0x10 SAct 0x0 SErr 0x190002 action
0xe frozen
[435471.690534] ata8: irq_stat 0x80400000, PHY RDY changed
[435471.690542] ata8: SError: { RecovComm PHYRdyChg 10B8B Dispar }
[435471.690552] ata8: hard resetting link
[435472.401447] ata8: SATA link down (SStatus 0 SControl 300)
[435477.489306] ata8: hard resetting link
[435477.805479] ata8: SATA link down (SStatus 0 SControl 300)
[435477.805492] ata8: limiting SATA link speed to 1.5 Gbps
[435482.865194] ata8: hard resetting link
[435483.181208] ata8: SATA link down (SStatus 0 SControl 310)
[435483.181216] ata8.00: disabled
[435483.181240] ata8: EH complete
[435483.181310] ata8.00: detaching (SCSI 7:0:0:0)
[435484.957529] ata9: exception Emask 0x10 SAct 0x0 SErr 0x4040000
action 0xe frozen
[435484.957541] ata9: irq_stat 0x80000040, connection status changed
[435484.957548] ata9: SError: { CommWake DevExch }
[435484.957560] ata9: hard resetting link
[435485.829144] ata9: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[435485.829757] ata9.00: FORCE: horkage modified (noncq)
[435485.852091] ata9.00: ATA-7: WDC WD3200AAJS-22RYA0, 12.01B01, max
UDMA/133
[435485.852097] ata9.00: 625142448 sectors, multi 0: LBA48 NCQ (not used)
[435485.852972] ata9.00: configured for UDMA/133
[435485.853104] ata9: EH complete
[435491.987610] ata9: exception Emask 0x10 SAct 0x0 SErr 0x190002 action
0xe frozen
[435491.987622] ata9: irq_stat 0x80400000, PHY RDY changed
[435491.987629] ata9: SError: { RecovComm PHYRdyChg 10B8B Dispar }
[435491.987639] ata9: hard resetting link
[435492.696998] ata9: SATA link down (SStatus 0 SControl 300)
[435497.712883] ata9: hard resetting link
[435498.028521] ata9: SATA link down (SStatus 0 SControl 300)
[435498.028534] ata9: limiting SATA link speed to 1.5 Gbps
[435503.088781] ata9: hard resetting link
[435503.404705] ata9: SATA link down (SStatus 0 SControl 310)
[435503.404717] ata9.00: disabled
[435503.404744] ata9: EH complete
[435503.404862] ata9.00: detaching (SCSI 8:0:0:0)
^ permalink raw reply
* [PATCH 1/1] libata: Fix ATA request sense
From: Damien Le Moal @ 2016-12-19 1:17 UTC (permalink / raw)
To: Tejun Heo; +Cc: linux-ide, Hannes Reinecke, Damien Le Moal
For an ATA device supporting the sense data reporting feature set,
a failed command will trigger the execution of ata_eh_request_sense if
the result task file of the failed command has the ATA_SENSE bit set
(sense data available bit). ata_eh_request_sense executes the
REQUEST SENSE DATA EXT command to retrieve the sense data of the failed
command. On success of REQUEST SENSE DATA EXT, the ATA_SENSE bit will
NOT be set (the command succeeded) but ata_eh_request_sense
nevertheless tests the availability of sense data by testing that bit
presence in the result tf of the REQUEST SENSE DATA EXT command.
This leads to a falsy assume that request sense data failed and to the
warning message:
atax.xx: request sense failed stat 50 emask 0
Upon success of REQUEST SENSE DATA EXT, set the ATA_SENSE bit in the
result task file command so that sense data can be returned by
ata_eh_request_sense.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
drivers/ata/libata-core.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 9cd0a2d..366a380 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -1702,6 +1702,8 @@ unsigned ata_exec_internal_sg(struct ata_device *dev,
if (qc->err_mask & ~AC_ERR_OTHER)
qc->err_mask &= ~AC_ERR_OTHER;
+ } else if (qc->tf.command == ATA_CMD_REQ_SENSE_DATA) {
+ qc->result_tf.command |= ATA_SENSE;
}
/* finish up */
--
2.7.4
^ permalink raw reply related
* Re: [PATCH 1/1] libata: Fix ATA request sense
From: Hannes Reinecke @ 2016-12-19 7:01 UTC (permalink / raw)
To: Damien Le Moal, Tejun Heo; +Cc: linux-ide
In-Reply-To: <1482110260-14551-1-git-send-email-damien.lemoal@wdc.com>
On 12/19/2016 02:17 AM, Damien Le Moal wrote:
> For an ATA device supporting the sense data reporting feature set,
> a failed command will trigger the execution of ata_eh_request_sense if
> the result task file of the failed command has the ATA_SENSE bit set
> (sense data available bit). ata_eh_request_sense executes the
> REQUEST SENSE DATA EXT command to retrieve the sense data of the failed
> command. On success of REQUEST SENSE DATA EXT, the ATA_SENSE bit will
> NOT be set (the command succeeded) but ata_eh_request_sense
> nevertheless tests the availability of sense data by testing that bit
> presence in the result tf of the REQUEST SENSE DATA EXT command.
> This leads to a falsy assume that request sense data failed and to the
> warning message:
>
> atax.xx: request sense failed stat 50 emask 0
>
> Upon success of REQUEST SENSE DATA EXT, set the ATA_SENSE bit in the
> result task file command so that sense data can be returned by
> ata_eh_request_sense.
>
> Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
> ---
> drivers/ata/libata-core.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
> index 9cd0a2d..366a380 100644
> --- a/drivers/ata/libata-core.c
> +++ b/drivers/ata/libata-core.c
> @@ -1702,6 +1702,8 @@ unsigned ata_exec_internal_sg(struct ata_device *dev,
>
> if (qc->err_mask & ~AC_ERR_OTHER)
> qc->err_mask &= ~AC_ERR_OTHER;
> + } else if (qc->tf.command == ATA_CMD_REQ_SENSE_DATA) {
> + qc->result_tf.command |= ATA_SENSE;
> }
>
> /* finish up */
>
D'oh.
Of course.
Reviewed-by: Hannes Reinecke <hare@suse.com>
Cheers,
Hannes
--
Dr. Hannes Reinecke Teamlead Storage & Networking
hare@suse.de +49 911 74053 688
SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: F. Imendörffer, J. Smithard, J. Guild, D. Upmanyu, G. Norton
HRB 21284 (AG Nürnberg)
^ permalink raw reply
* Re: [PATCH 1/1] libata: Fix ATA request sense
From: Sergei Shtylyov @ 2016-12-19 12:19 UTC (permalink / raw)
To: Damien Le Moal, Tejun Heo; +Cc: linux-ide, Hannes Reinecke
In-Reply-To: <1482110260-14551-1-git-send-email-damien.lemoal@wdc.com>
Hello!
On 12/19/2016 4:17 AM, Damien Le Moal wrote:
> For an ATA device supporting the sense data reporting feature set,
> a failed command will trigger the execution of ata_eh_request_sense if
> the result task file of the failed command has the ATA_SENSE bit set
> (sense data available bit). ata_eh_request_sense executes the
> REQUEST SENSE DATA EXT command to retrieve the sense data of the failed
> command. On success of REQUEST SENSE DATA EXT, the ATA_SENSE bit will
> NOT be set (the command succeeded) but ata_eh_request_sense
> nevertheless tests the availability of sense data by testing that bit
> presence in the result tf of the REQUEST SENSE DATA EXT command.
> This leads to a falsy assume that request sense data failed and to the
False assumption?
> warning message:
>
> atax.xx: request sense failed stat 50 emask 0
>
> Upon success of REQUEST SENSE DATA EXT, set the ATA_SENSE bit in the
> result task file command so that sense data can be returned by
> ata_eh_request_sense.
>
> Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
[...]
MBR, Sergei
^ permalink raw reply
* Re: [PATCH] pata_legacy: Allow disabling of legacy PATA device probes on non-PCI systems
From: tedheadster @ 2016-12-20 2:12 UTC (permalink / raw)
To: Tejun Heo, One Thousand Gnomes, Sergei Shtylyov, linux-ide
Cc: Matthew Whitehead
In-Reply-To: <CAP8WD_YMtnsuYmJHGz1eLmrQNemsB1Z6Soyb6f72brAfMNUNeg@mail.gmail.com>
Tejun,
apologies this took a while. Here is the patch I _think_ you were
asking me to test:
diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c
index bce2a8c..bfa63d1 100644
--- a/drivers/ata/pata_legacy.c
+++ b/drivers/ata/pata_legacy.c
@@ -1008,12 +1008,15 @@ static __init int legacy_init_one(struct
legacy_probe *probe)
if (!ata_dev_absent(dev)) {
legacy_host[probe->slot] = host;
ld->platform_dev = pdev;
+ devres_remove_group(&pdev->dev, legacy_init_one);
return 0;
}
}
ata_host_detach(host);
fail:
platform_device_unregister(pdev);
+ devres_release_group(&pdev->dev, legacy_init_one);
+ printk("XXX pata_legacy: unregistering platform dev %p\n", pdev);
return ret;
}
The /proc/interrupts entry is still bad:
CPU0
0: 95630 XT-PIC timer
1: 1028 XT-PIC i8042
2: 0 XT-PIC cascade
5: 0 XT-PIC pnp0-3c509-0
6: 3 XT-PIC floppy
7: 0 XT-PIC eisa0-3c59x-0
8: 0 XT-PIC rtc0
9: 7 XT-PIC aha1542
10: 0 XT-PIC platform[pata_legacy.3]
11: 0 XT-PIC platform[pata_legacy.2]
12: 0 XT-PIC platform[pata_legacy.5]
14: 66786 XT-PIC platform[pata_legacy.0]
15: 0 XT-PIC platform[pata_legacy.1]
and we have several backtraces :
[ 20.757765] SCSI subsystem initialized
[ 21.025769] libata version 3.00 loaded.
[ 21.925805] Floppy drive(s): fd0 is 1.44M
[ 21.950114] FDC 0 is a post-1991 82077
[ 23.625932] scsi host0: pata_legacy
[ 23.645903] ata1: PATA max PIO4 cmd 0x1f0 ctl 0x3f6 irq 14
[ 23.815254] ata1.00: ATA-4: QUANTUM FIREBALL CR8.4A, A5U.1200, max UDMA/66
[ 23.815254] ata1.00: 16514064 sectors, multi 0: LBA
[ 23.815254] ata1.00: configured for PIO
[ 23.822027] scsi 0:0:0:0: Direct-Access ATA QUANTUM
FIREBALL 1200 PQ: 0 ANSI: 5
[ 23.877945] sd 0:0:0:0: [sda] 16514064 512-byte logical blocks:
(8.46 GB/7.87 GiB)
[ 23.885910] sd 0:0:0:0: [sda] Write Protect is off
[ 23.885910] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
[ 23.885910] sd 0:0:0:0: [sda] Write cache: enabled, read cache:
enabled, doesn't support DPO or FUA
[ 24.009948] sda: sda1 sda2 sda3 sda4
[ 24.117952] sd 0:0:0:0: [sda] Attached SCSI disk
[ 24.117952] ------------[ cut here ]------------
[ 24.117952] WARNING: CPU: 0 PID: 131 at drivers/base/devres.c:629
devres_remove_group+0xaf/0xc0
[ 24.117952] Modules linked in: pata_legacy(+) sd_mod ext4 jbd2
crc16 ext2 mbcache floppy vfat msdos fat nls_cp437 ata_piix libata
scsi_mod uhci_hcd usbcore usb_common virtio_blk virtio_ring virtio
3c515 3c59x 3c509 mii
[ 24.117952] CPU: 0 PID: 131 Comm: modprobe Not tainted 4.9.0-rc6-tejun4+ #15
[ 24.117952] c2afbc48 c101c9f8 c15c0f5a 00000000 c2afbc50 c123e756
c2afbc84 c1048326
[ 24.117952] c15a3c80 00000000 00000083 c15dc5e0 00000275 c134088f
c134088f 00000275
[ 24.117952] c2aa5d48 c4a07f20 c2afbcb8 c2afbc98 c104836a 00000009
00000000 00000000
[ 24.117952] Call Trace:
[ 24.117952] [<c101c9f8>] show_stack+0x28/0x50
[ 24.117952] [<c123e756>] dump_stack+0x16/0x20
[ 24.117952] [<c1048326>] __warn+0xe6/0x100
[ 24.117952] [<c134088f>] ? devres_remove_group+0xaf/0xc0
[ 24.117952] [<c134088f>] ? devres_remove_group+0xaf/0xc0
[ 24.117952] [<c104836a>] warn_slowpath_null+0x2a/0x30
[ 24.117952] [<c134088f>] devres_remove_group+0xaf/0xc0
[ 24.117952] [<c49322ec>] legacy_init_one+0x2ec/0x2ee [pata_legacy]
[ 24.117952] [<c493291c>] legacy_init+0x62e/0xd12 [pata_legacy]
[ 24.117952] [<c1000410>] do_one_initcall+0x40/0x140
[ 24.117952] [<c49322ee>] ? legacy_init_one+0x2ee/0x2ee [pata_legacy]
[ 24.117952] [<c14c7e24>] ? preempt_schedule_common+0x14/0x20
[ 24.117952] [<c14c7e9a>] ? _cond_resched+0x1a/0x30
[ 24.117952] [<c10a61a9>] ? do_init_module+0x29/0x200
[ 24.117952] [<c10a61d7>] do_init_module+0x57/0x200
[ 24.117952] [<c10a90f5>] load_module+0x1085/0x12b0
[ 24.117952] [<c10a58e0>] ? do_free_init+0x20/0x20
[ 24.117952] [<c10a9491>] ? SyS_init_module+0x91/0x130
[ 24.117952] [<c10a94ef>] SyS_init_module+0xef/0x130
[ 24.117952] [<c1001813>] do_int80_syscall_32+0x63/0x130
[ 24.117952] [<c14cac5a>] entry_INT80_32+0x2a/0x2a
[ 24.117952] ---[ end trace 5aa726e4811c5039 ]---
[ 24.213926] scsi host1: pata_legacy
[ 24.237957] ata2: PATA max PIO4 cmd 0x170 ctl 0x376 irq 15
[ 24.449955] ------------[ cut here ]------------
[ 24.449955] WARNING: CPU: 0 PID: 131 at drivers/base/devres.c:667
devres_release_group+0x97/0xa0
[ 24.449955] Modules linked in: pata_legacy(+) sd_mod ext4 jbd2
crc16 ext2 mbcache floppy vfat msdos fat nls_cp437 ata_piix libata
scsi_mod uhci_hcd usbcore usb_common virtio_blk virtio_ring virtio
3c515 3c59x 3c509 mii
[ 24.449955] CPU: 0 PID: 131 Comm: modprobe Tainted: G W
4.9.0-rc6-tejun4+ #15
[ 24.449955] c2afbc50 c101c9f8 c15c0f5a 00000000 c2afbc58 c123e756
c2afbc8c c1048326
[ 24.449955] c15a3c80 00000000 00000083 c15dc5e0 0000029b c13407d7
c13407d7 0000029b
[ 24.449955] c4932000 c4a07f38 c2afbcb8 c2afbca0 c104836a 00000009
00000000 00000000
[ 24.449955] Call Trace:
[ 24.449955] [<c101c9f8>] show_stack+0x28/0x50
[ 24.449955] [<c123e756>] dump_stack+0x16/0x20
[ 24.449955] [<c1048326>] __warn+0xe6/0x100
[ 24.449955] [<c13407d7>] ? devres_release_group+0x97/0xa0
[ 24.449955] [<c13407d7>] ? devres_release_group+0x97/0xa0
[ 24.449955] [<c4932000>] ? 0xc4932000
[ 24.449955] [<c104836a>] warn_slowpath_null+0x2a/0x30
[ 24.449955] [<c13407d7>] devres_release_group+0x97/0xa0
[ 24.449955] [<c133f0c4>] ? platform_device_put+0x14/0x20
[ 24.449955] [<c49322aa>] legacy_init_one+0x2aa/0x2ee [pata_legacy]
[ 24.449955] [<c493291c>] legacy_init+0x62e/0xd12 [pata_legacy]
[ 24.449955] [<c1000410>] do_one_initcall+0x40/0x140
[ 24.449955] [<c49322ee>] ? legacy_init_one+0x2ee/0x2ee [pata_legacy]
[ 24.449955] [<c14c7e24>] ? preempt_schedule_common+0x14/0x20
[ 24.449955] [<c14c7e9a>] ? _cond_resched+0x1a/0x30
[ 24.449955] [<c10a61a9>] ? do_init_module+0x29/0x200
[ 24.449955] [<c10a61d7>] do_init_module+0x57/0x200
[ 24.449955] [<c10a90f5>] load_module+0x1085/0x12b0
[ 24.449955] [<c10a58e0>] ? do_free_init+0x20/0x20
[ 24.449955] [<c10a9491>] ? SyS_init_module+0x91/0x130
[ 24.449955] [<c10a94ef>] SyS_init_module+0xef/0x130
[ 24.449955] [<c1001813>] do_int80_syscall_32+0x63/0x130
[ 24.449955] [<c14cac5a>] entry_INT80_32+0x2a/0x2a
[ 24.449955] ---[ end trace 5aa726e4811c503a ]---
[ 24.455942] XXX pata_legacy: unregistering platform dev c2aeea00
[ 24.553972] scsi host2: pata_legacy
[ 24.577962] ata3: PATA max PIO4 cmd 0x1e8 ctl 0x3ee irq 11
[ 24.790171] ------------[ cut here ]------------
[ 24.790171] WARNING: CPU: 0 PID: 131 at drivers/base/devres.c:667
devres_release_group+0x97/0xa0
[ 24.790171] Modules linked in: pata_legacy(+) sd_mod ext4 jbd2
crc16 ext2 mbcache floppy vfat msdos fat nls_cp437 ata_piix libata
scsi_mod uhci_hcd usbcore usb_common virtio_blk virtio_ring virtio
3c515 3c59x 3c509 mii
[ 24.790171] CPU: 0 PID: 131 Comm: modprobe Tainted: G W
4.9.0-rc6-tejun4+ #15
[ 24.790171] c2afbc50 c101c9f8 c15c0f5a 00000000 c2afbc58 c123e756
c2afbc8c c1048326
[ 24.790171] c15a3c80 00000000 00000083 c15dc5e0 0000029b c13407d7
c13407d7 0000029b
[ 24.790171] c4932000 c4a07f50 c2afbcb8 c2afbca0 c104836a 00000009
00000000 00000000
[ 24.790171] Call Trace:
[ 24.790171] [<c101c9f8>] show_stack+0x28/0x50
[ 24.790171] [<c123e756>] dump_stack+0x16/0x20
[ 24.790171] [<c1048326>] __warn+0xe6/0x100
[ 24.790171] [<c13407d7>] ? devres_release_group+0x97/0xa0
[ 24.790171] [<c13407d7>] ? devres_release_group+0x97/0xa0
[ 24.790171] [<c4932000>] ? 0xc4932000
[ 24.790171] [<c104836a>] warn_slowpath_null+0x2a/0x30
[ 24.790171] [<c13407d7>] devres_release_group+0x97/0xa0
[ 24.790171] [<c133f0c4>] ? platform_device_put+0x14/0x20
[ 24.790171] [<c49322aa>] legacy_init_one+0x2aa/0x2ee [pata_legacy]
[ 24.790171] [<c493291c>] legacy_init+0x62e/0xd12 [pata_legacy]
[ 24.790171] [<c1000410>] do_one_initcall+0x40/0x140
[ 24.790171] [<c49322ee>] ? legacy_init_one+0x2ee/0x2ee [pata_legacy]
[ 24.790171] [<c14c7e24>] ? preempt_schedule_common+0x14/0x20
[ 24.790171] [<c14c7e9a>] ? _cond_resched+0x1a/0x30
[ 24.790171] [<c10a61a9>] ? do_init_module+0x29/0x200
[ 24.790171] [<c10a61d7>] do_init_module+0x57/0x200
[ 24.790171] [<c10a90f5>] load_module+0x1085/0x12b0
[ 24.790171] [<c10a58e0>] ? do_free_init+0x20/0x20
[ 24.790171] [<c10a9491>] ? SyS_init_module+0x91/0x130
[ 24.790171] [<c10a94ef>] SyS_init_module+0xef/0x130
[ 24.790171] [<c1001813>] do_int80_syscall_32+0x63/0x130
[ 24.790171] [<c14cac5a>] entry_INT80_32+0x2a/0x2a
[ 24.790171] ---[ end trace 5aa726e4811c503b ]---
[ 24.794770] XXX pata_legacy: unregistering platform dev c2623c00
[ 24.881963] scsi host3: pata_legacy
[ 24.905987] ata4: PATA max PIO4 cmd 0x168 ctl 0x36e irq 10
[ 25.122003] ------------[ cut here ]------------
[ 25.122003] WARNING: CPU: 0 PID: 131 at drivers/base/devres.c:667
devres_release_group+0x97/0xa0
[ 25.122003] Modules linked in: pata_legacy(+) sd_mod ext4 jbd2
crc16 ext2 mbcache floppy vfat msdos fat nls_cp437 ata_piix libata
scsi_mod uhci_hcd usbcore usb_common virtio_blk virtio_ring virtio
3c515 3c59x 3c509 mii
[ 25.122003] CPU: 0 PID: 131 Comm: modprobe Tainted: G W
4.9.0-rc6-tejun4+ #15
[ 25.122003] c2afbc50 c101c9f8 c15c0f5a 00000000 c2afbc58 c123e756
c2afbc8c c1048326
[ 25.122003] c15a3c80 00000000 00000083 c15dc5e0 0000029b c13407d7
c13407d7 0000029b
[ 25.122003] c4932000 c4a07f68 c2afbcb8 c2afbca0 c104836a 00000009
00000000 00000000
[ 25.122003] Call Trace:
[ 25.122003] [<c101c9f8>] show_stack+0x28/0x50
[ 25.122003] [<c123e756>] dump_stack+0x16/0x20
[ 25.122003] [<c1048326>] __warn+0xe6/0x100
[ 25.122003] [<c13407d7>] ? devres_release_group+0x97/0xa0
[ 25.122003] [<c13407d7>] ? devres_release_group+0x97/0xa0
[ 25.122003] [<c4932000>] ? 0xc4932000
[ 25.122003] [<c104836a>] warn_slowpath_null+0x2a/0x30
[ 25.122003] [<c13407d7>] devres_release_group+0x97/0xa0
[ 25.122003] [<c133f0c4>] ? platform_device_put+0x14/0x20
[ 25.122003] [<c49322aa>] legacy_init_one+0x2aa/0x2ee [pata_legacy]
[ 25.122003] [<c493291c>] legacy_init+0x62e/0xd12 [pata_legacy]
[ 25.122003] [<c1000410>] do_one_initcall+0x40/0x140
[ 25.122003] [<c49322ee>] ? legacy_init_one+0x2ee/0x2ee [pata_legacy]
[ 25.122003] [<c14c7e24>] ? preempt_schedule_common+0x14/0x20
[ 25.122003] [<c14c7e9a>] ? _cond_resched+0x1a/0x30
[ 25.122003] [<c10a61a9>] ? do_init_module+0x29/0x200
[ 25.122003] [<c10a61d7>] do_init_module+0x57/0x200
[ 25.122003] [<c10a90f5>] load_module+0x1085/0x12b0
[ 25.122003] [<c10a58e0>] ? do_free_init+0x20/0x20
[ 25.122003] [<c10a9491>] ? SyS_init_module+0x91/0x130
[ 25.122003] [<c10a94ef>] SyS_init_module+0xef/0x130
[ 25.122003] [<c1001813>] do_int80_syscall_32+0x63/0x130
[ 25.122003] [<c14cac5a>] entry_INT80_32+0x2a/0x2a
[ 25.122003] ---[ end trace 5aa726e4811c503c ]---
[ 25.126150] XXX pata_legacy: unregistering platform dev c2623e00
[ 25.138001] genirq: Flags mismatch irq 8. 00000000
(platform[pata_legacy.4]) vs. 00000080 (rtc0)
[ 25.146001] ------------[ cut here ]------------
[ 25.146001] WARNING: CPU: 0 PID: 131 at drivers/base/devres.c:667
devres_release_group+0x97/0xa0
[ 25.146001] Modules linked in: pata_legacy(+) sd_mod ext4 jbd2
crc16 ext2 mbcache floppy vfat msdos fat nls_cp437 ata_piix libata
scsi_mod uhci_hcd usbcore usb_common virtio_blk virtio_ring virtio
3c515 3c59x 3c509 mii
[ 25.146001] CPU: 0 PID: 131 Comm: modprobe Tainted: G W
4.9.0-rc6-tejun4+ #15
[ 25.146001] c2afbc50 c101c9f8 c15c0f5a 00000000 c2afbc58 c123e756
c2afbc8c c1048326
[ 25.146001] c15a3c80 00000000 00000083 c15dc5e0 0000029b c13407d7
c13407d7 0000029b
[ 25.146001] c4932000 c4a07f80 c4a08010 c2afbca0 c104836a 00000009
00000000 00000000
[ 25.146001] Call Trace:
[ 25.146001] [<c101c9f8>] show_stack+0x28/0x50
[ 25.146001] [<c123e756>] dump_stack+0x16/0x20
[ 25.146001] [<c1048326>] __warn+0xe6/0x100
[ 25.146001] [<c13407d7>] ? devres_release_group+0x97/0xa0
[ 25.146001] [<c13407d7>] ? devres_release_group+0x97/0xa0
[ 25.146001] [<c4932000>] ? 0xc4932000
[ 25.146001] [<c104836a>] warn_slowpath_null+0x2a/0x30
[ 25.146001] [<c13407d7>] devres_release_group+0x97/0xa0
[ 25.146001] [<c133f0c4>] ? platform_device_put+0x14/0x20
[ 25.146001] [<c49322aa>] legacy_init_one+0x2aa/0x2ee [pata_legacy]
[ 25.146001] [<c493291c>] legacy_init+0x62e/0xd12 [pata_legacy]
[ 25.146001] [<c1000410>] do_one_initcall+0x40/0x140
[ 25.146001] [<c49322ee>] ? legacy_init_one+0x2ee/0x2ee [pata_legacy]
[ 25.146001] [<c14c7e24>] ? preempt_schedule_common+0x14/0x20
[ 25.146001] [<c14c7e9a>] ? _cond_resched+0x1a/0x30
[ 25.146001] [<c10a61a9>] ? do_init_module+0x29/0x200
[ 25.146001] [<c10a61d7>] do_init_module+0x57/0x200
[ 25.146001] [<c10a90f5>] load_module+0x1085/0x12b0
[ 25.146001] [<c10a58e0>] ? do_free_init+0x20/0x20
[ 25.146001] [<c10a9491>] ? SyS_init_module+0x91/0x130
[ 25.146001] [<c10a94ef>] SyS_init_module+0xef/0x130
[ 25.146001] [<c1001813>] do_int80_syscall_32+0x63/0x130
[ 25.146001] [<c14cac5a>] entry_INT80_32+0x2a/0x2a
[ 25.146001] ---[ end trace 5aa726e4811c503d ]---
[ 25.151917] XXX pata_legacy: unregistering platform dev c2aee400
[ 25.237998] scsi host4: pata_legacy
[ 25.265989] ata5: PATA max PIO4 cmd 0x160 ctl 0x366 irq 12
[ 25.478021] ------------[ cut here ]------------
[ 25.478021] WARNING: CPU: 0 PID: 131 at drivers/base/devres.c:667
devres_release_group+0x97/0xa0
[ 25.478021] Modules linked in: pata_legacy(+) sd_mod ext4 jbd2
crc16 ext2 mbcache floppy vfat msdos fat nls_cp437 ata_piix libata
scsi_mod uhci_hcd usbcore usb_common virtio_blk virtio_ring virtio
3c515 3c59x 3c509 mii
[ 25.478021] CPU: 0 PID: 131 Comm: modprobe Tainted: G W
4.9.0-rc6-tejun4+ #15
[ 25.478021] c2afbc50 c101c9f8 c15c0f5a 00000000 c2afbc58 c123e756
c2afbc8c c1048326
[ 25.478021] c15a3c80 00000000 00000083 c15dc5e0 0000029b c13407d7
c13407d7 0000029b
[ 25.478021] c4932000 c4a07f98 c2afbcb8 c2afbca0 c104836a 00000009
00000000 00000000
[ 25.478021] Call Trace:
[ 25.478021] [<c101c9f8>] show_stack+0x28/0x50
[ 25.478021] [<c123e756>] dump_stack+0x16/0x20
[ 25.478021] [<c1048326>] __warn+0xe6/0x100
[ 25.478021] [<c13407d7>] ? devres_release_group+0x97/0xa0
[ 25.478021] [<c13407d7>] ? devres_release_group+0x97/0xa0
[ 25.478021] [<c4932000>] ? 0xc4932000
[ 25.478021] [<c104836a>] warn_slowpath_null+0x2a/0x30
[ 25.478021] [<c13407d7>] devres_release_group+0x97/0xa0
[ 25.478021] [<c133f0c4>] ? platform_device_put+0x14/0x20
[ 25.478021] [<c49322aa>] legacy_init_one+0x2aa/0x2ee [pata_legacy]
[ 25.478021] [<c493291c>] legacy_init+0x62e/0xd12 [pata_legacy]
[ 25.478021] [<c1000410>] do_one_initcall+0x40/0x140
[ 25.478021] [<c49322ee>] ? legacy_init_one+0x2ee/0x2ee [pata_legacy]
[ 25.478021] [<c14c7e24>] ? preempt_schedule_common+0x14/0x20
[ 25.478021] [<c14c7e9a>] ? _cond_resched+0x1a/0x30
[ 25.478021] [<c10a61a9>] ? do_init_module+0x29/0x200
[ 25.478021] [<c10a61d7>] do_init_module+0x57/0x200
[ 25.478021] [<c10a90f5>] load_module+0x1085/0x12b0
[ 25.478021] [<c10a58e0>] ? do_free_init+0x20/0x20
[ 25.478021] [<c10a9491>] ? SyS_init_module+0x91/0x130
[ 25.478021] [<c10a94ef>] SyS_init_module+0xef/0x130
[ 25.478021] [<c1001813>] do_int80_syscall_32+0x63/0x130
[ 25.478021] [<c14cac5a>] entry_INT80_32+0x2a/0x2a
[ 25.478021] ---[ end trace 5aa726e4811c503e ]---
[ 25.482482] XXX pata_legacy: unregistering platform dev c2aee600
[ 26.990075] scsi host5: Adaptec AHA-1542 (SCSI-ID 7) at IO 0x330,
IRQ 9, DMA 5
[ 27.014108] scsi host5: Adaptec 1542
[ 27.062096] bounce: isa pool size: 16 pages
[ 27.846164] random: crng init done
[ 30.086292] device-mapper: uevent: version 1.0.3
[ 30.094299] device-mapper: ioctl: 4.35.0-ioctl (2016-06-23)
initialised: dm-devel@redhat.com
[ 30.618797] EXT4-fs (sda4): mounting ext3 file system using the
ext4 subsystem
[ 30.762317] EXT4-fs (sda4): mounted filesystem with ordered data
mode. Opts: (null)
[ 40.082846] udev[255]: starting version 164
[ 42.478972] 3c509 3c509.0 isa0-3c509-0: renamed from eth3
[ 44.055092] 3c509 00:02.00 pnp0-3c509-0: renamed from eth0
[ 44.751104] 3c579 00:06 eisa0-3c509-0: renamed from eth4
[ 44.823115] 3c579 00:07 eisa0-3c509-1: renamed from eth5
[ 45.351161] 3c59x 00:08 eisa0-3c59x-0: renamed from eth2
[ 47.343318] input: PC Speaker as /devices/platform/pcspkr/input/input1
[ 56.759801] Error: Driver 'pcspkr' is already registered, aborting...
[ 78.345031] Adding 124924k swap on /dev/sda2. Priority:-1
extents:1 across:124924k
[ 78.841040] EXT4-fs (sda4): re-mounted. Opts: (null)
[ 81.189191] EXT4-fs (sda4): re-mounted. Opts: errors=remount-ro
[ 89.245655] loop: module loaded
[ 110.430862] eisa0-3c59x-0: first available media type: 100baseTX
[ 110.430862] eisa0-3c59x-0: setting half-duplex.
[ 115.299125] pnp0-3c509-0: Setting 3c5x9/3c5x9B half-duplex mode
if_port: 0, sw_info: 3f31
[ 116.283187] genirq: Flags mismatch irq 10. 00000000 (3c515) vs.
00000000 (platform[pata_legacy.3])
[ 116.287197] ------------[ cut here ]------------
[ 116.287197] WARNING: CPU: 0 PID: 1089 at lib/debugobjects.c:263
debug_print_object+0x85/0xa0
[ 116.287197] ODEBUG: init active (active state 0) object type:
timer_list hint: corkscrew_timer+0x0/0x3b0 [3c515]
[ 116.287197] Modules linked in: loop snd_pcm snd_timer snd
tpm_tis_core soundcore tpm evdev pcspkr dm_mod aha1542 sr_mod cdrom
isofs pata_legacy sd_mod ext4 jbd2 crc16 ext2 mbcache floppy vfat
msdos fat nls_cp437 ata_piix libata scsi_mod uhci_hcd usbcore
usb_common virtio_blk virtio_ring virtio 3c515 3c59x 3c509 mii
[ 116.287197] CPU: 0 PID: 1089 Comm: ifconfig Tainted: G W
4.9.0-rc6-tejun4+ #15
[ 116.287197] c2707c74 c101c9f8 c15c0f5a 00000000 c2707c7c c123e756
c2707cb0 c1048326
[ 116.287197] c15cd08c c2707ce0 00000441 c15cdd5b 00000107 c125b6c5
c125b6c5 00000107
[ 116.287197] c2a0e780 c1664040 c15bb707 c2707ccc c10483eb 00000009
00000000 c2707cc4
[ 116.287197] Call Trace:
[ 116.287197] [<c101c9f8>] show_stack+0x28/0x50
[ 116.287197] [<c123e756>] dump_stack+0x16/0x20
[ 116.287197] [<c1048326>] __warn+0xe6/0x100
[ 116.287197] [<c125b6c5>] ? debug_print_object+0x85/0xa0
[ 116.287197] [<c125b6c5>] ? debug_print_object+0x85/0xa0
[ 116.287197] [<c10483eb>] warn_slowpath_fmt+0x3b/0x40
[ 116.287197] [<c125b6c5>] debug_print_object+0x85/0xa0
[ 116.287197] [<c4963470>] ? init_module+0x320/0x320 [3c515]
[ 116.287197] [<c125be24>] __debug_object_init+0x1d4/0x330
[ 116.287197] [<c1377572>] ? cnic_netdev_event+0x312/0x390
[ 116.287197] [<c1042a85>] ? kmap_atomic_prot+0x35/0xc0
[ 116.287197] [<c125bfb7>] debug_object_init+0x17/0x20
[ 116.287197] [<c108ceac>] init_timer_key+0x1c/0x90
[ 116.287197] [<c49624ac>] corkscrew_open+0x4bc/0x6a0 [3c515]
[ 116.287197] [<c13d29c3>] ? call_netdevice_notifiers_info+0x33/0x70
[ 116.287197] [<c13d3df3>] __dev_open+0xc3/0x140
[ 116.287197] [<c104bb45>] ? __local_bh_enable_ip+0x75/0x80
[ 116.287197] [<c13d3bac>] __dev_change_flags+0x8c/0x150
[ 116.287197] [<c11c9713>] ? security_capable+0x43/0x50
[ 116.287197] [<c13d3c9e>] dev_change_flags+0x2e/0x70
[ 116.287197] [<c14491cb>] devinet_ioctl+0x60b/0x6d0
[ 116.287197] [<c13f1284>] ? dev_ioctl+0x504/0x640
[ 116.287197] [<c144ad25>] inet_ioctl+0x95/0xb0
[ 116.287197] [<c13bd92d>] sock_ioctl+0x6d/0x290
[ 116.287197] [<c13bd8c0>] ? sock_fasync+0x80/0x80
[ 116.287197] [<c1159585>] vfs_ioctl+0x15/0x30
[ 116.287197] [<c1159e48>] do_vfs_ioctl+0x158/0x680
[ 116.287197] [<c114953a>] ? __vfs_write+0x2a/0xc0
[ 116.287197] [<c1148c0a>] ? rw_verify_area+0x5a/0x130
[ 116.287197] [<c114907c>] ? fsnotify_modify+0x6c/0x80
[ 116.287197] [<c1149687>] ? vfs_write+0xb7/0x130
[ 116.287197] [<c115a3fa>] SyS_ioctl+0x8a/0x90
[ 116.287197] [<c1001813>] do_int80_syscall_32+0x63/0x130
[ 116.287197] [<c14cac5a>] entry_INT80_32+0x2a/0x2a
[ 116.287197] ---[ end trace 5aa726e4811c503f ]---
[ 116.291957] genirq: Flags mismatch irq 10. 00000000 (3c515) vs.
00000000 (platform[pata_legacy.3])
- Matthew
^ permalink raw reply related
* Re: [PATCH 1/1] libata: Fix ATA request sense
From: Damien Le Moal @ 2016-12-20 2:25 UTC (permalink / raw)
To: Sergei Shtylyov, Tejun Heo; +Cc: linux-ide, Hannes Reinecke
In-Reply-To: <ebce119d-032f-8580-ba62-a389a121858c@cogentembedded.com>
On 12/19/16 21:19, Sergei Shtylyov wrote:
> Hello!
>
> On 12/19/2016 4:17 AM, Damien Le Moal wrote:
>
>> For an ATA device supporting the sense data reporting feature set,
>> a failed command will trigger the execution of ata_eh_request_sense if
>> the result task file of the failed command has the ATA_SENSE bit set
>> (sense data available bit). ata_eh_request_sense executes the
>> REQUEST SENSE DATA EXT command to retrieve the sense data of the failed
>> command. On success of REQUEST SENSE DATA EXT, the ATA_SENSE bit will
>> NOT be set (the command succeeded) but ata_eh_request_sense
>> nevertheless tests the availability of sense data by testing that bit
>> presence in the result tf of the REQUEST SENSE DATA EXT command.
>> This leads to a falsy assume that request sense data failed and to the
>
> False assumption?
"This leads to falsely assume that..."
My apologies for the typo.
>
>> warning message:
>>
>> atax.xx: request sense failed stat 50 emask 0
>>
>> Upon success of REQUEST SENSE DATA EXT, set the ATA_SENSE bit in the
>> result task file command so that sense data can be returned by
>> ata_eh_request_sense.
>>
>> Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
> [...]
>
> MBR, Sergei
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-ide" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Damien Le Moal, Ph.D.
Sr. Manager, System Software Research Group,
Western Digital Corporation
Damien.LeMoal@wdc.com
(+81) 0466-98-3593 (ext. 513593)
1 kirihara-cho, Fujisawa,
Kanagawa, 252-0888 Japan
www.wdc.com, www.hgst.com
^ permalink raw reply
* Re: [PATCH 1/1] libata: Fix ATA request sense
From: Sergei Shtylyov @ 2016-12-20 10:22 UTC (permalink / raw)
To: Damien Le Moal, Tejun Heo; +Cc: linux-ide, Hannes Reinecke
In-Reply-To: <400289c7-67df-6286-25a7-5b4bc0a39494@wdc.com>
On 12/20/2016 5:25 AM, Damien Le Moal wrote:
>>> For an ATA device supporting the sense data reporting feature set,
>>> a failed command will trigger the execution of ata_eh_request_sense if
>>> the result task file of the failed command has the ATA_SENSE bit set
>>> (sense data available bit). ata_eh_request_sense executes the
>>> REQUEST SENSE DATA EXT command to retrieve the sense data of the failed
>>> command. On success of REQUEST SENSE DATA EXT, the ATA_SENSE bit will
>>> NOT be set (the command succeeded) but ata_eh_request_sense
>>> nevertheless tests the availability of sense data by testing that bit
>>> presence in the result tf of the REQUEST SENSE DATA EXT command.
>>> This leads to a falsy assume that request sense data failed and to the
>>
>> False assumption?
>
> "This leads to falsely assume that..."
"Leads us to falsely assume" then, maybe?
> My apologies for the typo.
MBR, Sergei
^ permalink raw reply
* [PATCH] set a base index for libsas based ata devices
From: Peter Chang @ 2016-12-20 18:15 UTC (permalink / raw)
To: linux-scsi@vger.kernel.org, linux-ide
[-- Attachment #1: Type: text/plain, Size: 460 bytes --]
we discovered this when futzing w/ the queue depth parameter for ata
disks behind the pm8006 controller. setting depth == 1 should disable
ncq, but the sysfs part silently fails and we continue sending the
fpdma command variants. no one else probably cares about the disabling
ncq path, but we do like to test.
anyway, adding both the ide and scsi lists because i'm not quite sure
there's a separate libsas list and a single commit seems better for
this.
\p
[-- Attachment #2: 0001-set-a-base-index-for-libsas-based-ata-devices.patch --]
[-- Type: text/x-patch, Size: 4458 bytes --]
From 6bdfcb35a074d9c58c180f8c512706faf7d6c7cb Mon Sep 17 00:00:00 2001
From: peter chang <dpf@google.com>
Date: Tue, 20 Dec 2016 09:48:45 -0800
Subject: [PATCH] set a base index for libsas based ata devices
libsas hosts allow multiple links, but when the controller
supports SATA devices control is handed to libata. this means
that an attached scsi device will be setup properly, but device
management requests and sysfs futzing don't get routed correctly
because the device lookup fails.
Tested:
- pre-patch:
jkgg70:~# ls -d /sys/block/sd*
/sys/block/sda
jkgg70:~# modprobe pm80xx
jkgg70:~# cat /sys/block/sdb/device/queue_depth
31
jkgg70:~# echo 1 > /sys/block/sdb/device/queue_depth
jkgg70:~# cat /sys/block/sdb/device/queue_depth
31
- post-patch:
jkgg70:~# modprobe pm80xx
jkgg70:~# cat /sys/block/sdb/device/queue_depth
31
jkgg70:~# echo 1 > /sys/block/sdb/device/queue_depth
jkgg70:~# cat /sys/block/sdb/device/queue_depth
1
Signed-off-by: peter chang <dpf@google.com>
---
drivers/ata/libata-scsi.c | 33 ++++++++++++++++++++++++++++++++-
drivers/scsi/libsas/sas_scsi_host.c | 4 ++++
include/linux/libata.h | 3 +++
3 files changed, 39 insertions(+), 1 deletion(-)
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index 1f863e7..340f144 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -1088,7 +1088,7 @@ static void ata_to_sense_error(unsigned id, u8 drv_stat, u8 drv_err, u8 *sk,
* passthrough command, so we use the following sense data:
* sk = RECOVERED ERROR
* asc,ascq = ATA PASS-THROUGH INFORMATION AVAILABLE
- *
+ *
*
* LOCKING:
* None.
@@ -3052,6 +3052,16 @@ static unsigned int atapi_xlat(struct ata_queued_cmd *qc)
static struct ata_device *ata_find_dev(struct ata_port *ap, int devno)
{
+ /* adjust if this port is behind a libsas host rather than a
+ * direct libata host. warn and fail if somehow we got out of
+ * sync and we've a negative device number.
+ */
+ devno -= ap->link.sas_host_base;
+ if (unlikely(devno < 0)) {
+ WARN_ON(devno < 0);
+ return NULL;
+ }
+
if (!sata_pmp_attached(ap)) {
if (likely(devno < ata_link_max_devices(&ap->link)))
return &ap->link.device[devno];
@@ -4332,6 +4342,27 @@ int ata_scsi_queuecmd(struct Scsi_Host *shost, struct scsi_cmnd *cmd)
}
/**
+ * ata_sas_set_link_base - set the libata link's 'base' because
+ * libsas hosts have more ports / links.
+ * @ap: ATA port to which the target is attached
+ * @starget: SCSI target being attached
+ */
+void ata_sas_set_link_base(struct ata_port *ap, struct scsi_target *starget)
+{
+ unsigned int host_base;
+
+ if (!sata_pmp_attached(ap)) {
+ WARN_ON(starget->channel);
+ host_base = starget->id;
+ } else {
+ WARN_ON(starget->id);
+ host_base = starget->channel;
+ }
+ ap->link.sas_host_base = host_base;
+}
+EXPORT_SYMBOL_GPL(ata_sas_set_link_base);
+
+/**
* ata_scsi_simulate - simulate SCSI command on ATA device
* @dev: the target device
* @cmd: SCSI command being sent to device.
diff --git a/drivers/scsi/libsas/sas_scsi_host.c b/drivers/scsi/libsas/sas_scsi_host.c
index 519dac4..d8300bc 100644
--- a/drivers/scsi/libsas/sas_scsi_host.c
+++ b/drivers/scsi/libsas/sas_scsi_host.c
@@ -859,6 +859,10 @@ int sas_target_alloc(struct scsi_target *starget)
kref_get(&found_dev->kref);
starget->hostdata = found_dev;
+
+ if (dev_is_sata(found_dev))
+ ata_sas_set_link_base(found_dev->sata_dev.ap, starget);
+
return 0;
}
diff --git a/include/linux/libata.h b/include/linux/libata.h
index c170be5..323811f 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -791,6 +791,7 @@ struct ata_acpi_gtm {
struct ata_link {
struct ata_port *ap;
int pmp; /* port multiplier port # */
+ int sas_host_base; /* host relative id */
struct device tdev;
unsigned int active_tag; /* active tag on this link */
@@ -1130,6 +1131,8 @@ extern int ata_sas_port_start(struct ata_port *ap);
extern void ata_sas_port_stop(struct ata_port *ap);
extern int ata_sas_slave_configure(struct scsi_device *, struct ata_port *);
extern int ata_sas_queuecmd(struct scsi_cmnd *cmd, struct ata_port *ap);
+extern void ata_sas_set_link_base(struct ata_port *ap,
+ struct scsi_target *starget);
extern int sata_scr_valid(struct ata_link *link);
extern int sata_scr_read(struct ata_link *link, int reg, u32 *val);
extern int sata_scr_write(struct ata_link *link, int reg, u32 val);
--
2.8.0.rc3.226.g39d4020
^ permalink raw reply related
* Re: [PATCH] set a base index for libsas based ata devices
From: James Bottomley @ 2016-12-20 18:30 UTC (permalink / raw)
To: Peter Chang, linux-scsi@vger.kernel.org, linux-ide
In-Reply-To: <CAF2xp_F3ea-n4R8jG8UpHEE3YmvKN7UWBAn36_QXMg-e34tY_w@mail.gmail.com>
On Tue, 2016-12-20 at 10:15 -0800, Peter Chang wrote:
> we discovered this when futzing w/ the queue depth parameter for ata
> disks behind the pm8006 controller. setting depth == 1 should disable
> ncq, but the sysfs part silently fails and we continue sending the
> fpdma command variants. no one else probably cares about the
> disabling ncq path, but we do like to test.
I'd actually disagree with this assertion; it's why tagging (what you
mean by ncq) and queue depth are separate. Queue depth represents the
number of outstanding commands we sent on the wire; however, it often
excludes things like sense probes and error handling commands, so
tagged depth==1 is a different operating environment from untagged.
Some transports actually have no untagged variant nowadays, so it's
physically impossible to disable tagging.
James
> anyway, adding both the ide and scsi lists because i'm not quite sure
> there's a separate libsas list and a single commit seems better for
> this.
^ permalink raw reply
* [PATCH] ata: sata_mv: fix module license specification
From: Uwe Kleine-König @ 2016-12-20 21:15 UTC (permalink / raw)
To: Tejun Heo; +Cc: linux-ide
The header allows GPL v2 only, so declare "GPL v2" for MODULE_LICENSE
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
---
drivers/ata/sata_mv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 823e938c9a78..bcbfe23a45f6 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -4526,7 +4526,7 @@ static void __exit mv_exit(void)
MODULE_AUTHOR("Brett Russ");
MODULE_DESCRIPTION("SCSI low-level driver for Marvell SATA controllers");
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
MODULE_DEVICE_TABLE(pci, mv_pci_tbl);
MODULE_VERSION(DRV_VERSION);
MODULE_ALIAS("platform:" DRV_NAME);
--
2.10.2
^ permalink raw reply related
* Re: [PATCH] set a base index for libsas based ata devices
From: Christoph Hellwig @ 2016-12-21 8:03 UTC (permalink / raw)
To: James Bottomley; +Cc: Peter Chang, linux-scsi@vger.kernel.org, linux-ide
In-Reply-To: <1482258634.2475.20.camel@HansenPartnership.com>
On Tue, Dec 20, 2016 at 10:30:34AM -0800, James Bottomley wrote:
> I'd actually disagree with this assertion; it's why tagging (what you
> mean by ncq) and queue depth are separate. Queue depth represents the
> number of outstanding commands we sent on the wire; however, it often
> excludes things like sense probes and error handling commands, so
> tagged depth==1 is a different operating environment from untagged.
> Some transports actually have no untagged variant nowadays, so it's
> physically impossible to disable tagging.
Yes. We have the queue_type sysfs file that also used to be writeable
and allow changing the queue type, but it's never been used for
anything.
For debugging you can clear the tagged_supported flag in the driver,
but there should be no reason for doing that during normal operation
for a SAS HBA driver.
^ permalink raw reply
* RE: [v2,1/3] ata: ahci_tegra: add support for tegra210
From: Preetham Chandru @ 2016-12-21 8:50 UTC (permalink / raw)
To: Mikko Perttunen,
preetham260-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Cc: tj-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org,
thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
Laxman Dewangan,
linux-ide-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Venu Byravarasu, Pavan Kunapuli,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <7a8d3270-b8b7-06f9-b8d1-39f9575645ce-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>-----Original Message-----
>From: Mikko Perttunen
>Sent: Monday, November 28, 2016 6:02 PM
>To: Preetham Chandru; preetham260@gmail.com
>Cc: tj@kernel.org; swarren@wwwdotorg.org; thierry.reding@gmail.com;
>Laxman Dewangan; linux-ide@vger.kernel.org; Venu Byravarasu; Pavan
>Kunapuli; linux-tegra@vger.kernel.org
>Subject: Re: [v2,1/3] ata: ahci_tegra: add support for tegra210
>
>+Cc linux-tegra
>
>Hi Preetham,
>
>I'll do a review pass. Please also Cc the next version to linux-
>tegra@vger.kernel.org so that more Tegra developers have visibility.
>
Ok.
>On 24.11.2016 09:43, PREETHAM RAMACHANDRA wrote:
>> From: Preetham Chandru R <pchandru@nvidia.com>
>>
>> Add AHCI support for tegra210
>> 1. Moved tegra124 specifics to tegra124_ahci_init.
>> 2. Separated out the regulators needed for tegra124 and tegra210.
>> 3. Set the LPM capabilities
>> 4. Create inline functions for read/write and modify to
>> SATA, SATA Config and SATA Aux registers.
>>
>> Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
>> ---
>> v2:
>> * Fixed indentation issues
>> * Moved the change to disable DIPM, HIPM, DevSlp, partial,
>> slumber and NCQ into a separate patch
>>
>> drivers/ata/ahci_tegra.c | 478
>> ++++++++++++++++++++++++++++++++++-------------
>> 1 file changed, 348 insertions(+), 130 deletions(-)
>>
>> diff --git a/drivers/ata/ahci_tegra.c b/drivers/ata/ahci_tegra.c index
>> 3a62eb2..d12e2a9 100644
>> --- a/drivers/ata/ahci_tegra.c
>> +++ b/drivers/ata/ahci_tegra.c
>> @@ -33,32 +33,74 @@
>>
>> #define DRV_NAME "tegra-ahci"
>>
>> +#define SATA_FPCI_BAR5_0 0x94
>> +#define FPCI_BAR5_START_MASK (0xFFFFFFF <<
>4)
>> +#define FPCI_BAR5_START (0x0040020
><< 4)
>> +#define FPCI_BAR5_ACCESS_TYPE (0x1)
>
>Please use the existing convention in this file, that is, fields are prefixed with
>the register name. Also, please use small letters for hex digits as used in the
>file elsewhere.
>
Ok.
>> +
>> #define SATA_CONFIGURATION_0 0x180
>> -#define SATA_CONFIGURATION_EN_FPCI BIT(0)
>> +#define SATA_CONFIGURATION_0_EN_FPCI BIT(0)
>> +#define SATA_CONFIGURATION_CLK_OVERRIDE BIT(31)
>> +
>> +#define SATA_INTR_MASK_0 0x188
>> +#define IP_INT_MASK BIT(16)
>>
>> #define SCFG_OFFSET 0x1000
>>
>> -#define T_SATA0_CFG_1 0x04
>> -#define T_SATA0_CFG_1_IO_SPACE BIT(0)
>> -#define T_SATA0_CFG_1_MEMORY_SPACE BIT(1)
>> -#define T_SATA0_CFG_1_BUS_MASTER BIT(2)
>> -#define T_SATA0_CFG_1_SERR BIT(8)
>> +#define T_SATA_CFG_1 0x4
>> +#define T_SATA_CFG_1_IO_SPACE BIT(0)
>> +#define T_SATA_CFG_1_MEMORY_SPACE BIT(1)
>> +#define T_SATA_CFG_1_BUS_MASTER BIT(2)
>> +#define T_SATA_CFG_1_SERR BIT(8)
>
>Try not to rename and move fields unnecessarily. It makes it very difficult to
>see where things have actually changed and makes the patch unnecessarily
>long.
>
Ok.
>> +
>> +#define T_SATA_CFG_9 0x24
>> +#define T_SATA_CFG_9_BASE_ADDRESS 0x40020000
>> +
>> +#define T_SATA0_CFG_35 0x94
>> +#define T_SATA0_CFG_35_IDP_INDEX_MASK (0x7FF
><< 2)
>> +#define T_SATA0_CFG_35_IDP_INDEX (0x2A << 2)
>>
>> -#define T_SATA0_CFG_9 0x24
>> -#define T_SATA0_CFG_9_BASE_ADDRESS_SHIFT 13
>> +#define T_SATA0_AHCI_IDP1 0x98
>> +#define T_SATA0_AHCI_IDP1_DATA
> (0x400040)
>>
>> -#define SATA_FPCI_BAR5 0x94
>> -#define SATA_FPCI_BAR5_START_SHIFT 4
>> +#define T_SATA0_CFG_PHY_1 0x12C
>> +#define T_SATA0_CFG_PHY_1_PADS_IDDQ_EN BIT(23)
>> +#define T_SATA0_CFG_PHY_1_PAD_PLL_IDDQ_EN BIT(22)
>>
>> -#define SATA_INTR_MASK 0x188
>> -#define SATA_INTR_MASK_IP_INT_MASK BIT(16)
>> +#define T_SATA0_NVOOB 0x114
>> +#define T_SATA0_NVOOB_COMMA_CNT_MASK (0xff << 16)
>> +#define T_SATA0_NVOOB_COMMA_CNT (0x07 << 16)
>> +#define T_SATA0_NVOOB_SQUELCH_FILTER_MODE_MASK (0x3 <<
>24)
>> +#define T_SATA0_NVOOB_SQUELCH_FILTER_MODE (0x1 << 24)
>> +#define T_SATA0_NVOOB_SQUELCH_FILTER_LENGTH_MASK (0x3 <<
>26)
>> +#define T_SATA0_NVOOB_SQUELCH_FILTER_LENGTH (0x3 << 26)
>> +
>> +#define T_SATA_CFG_PHY_0 0x120
>> +#define T_SATA_CFG_PHY_0_USE_7BIT_ALIGN_DET_FOR_SPD BIT(11)
>> +#define T_SATA_CFG_PHY_0_MASK_SQUELCH BIT(24)
>> +
>> +#define FUSE_SATA_CALIB 0x124
>> +#define FUSE_SATA_CALIB_MASK 0x3
>> +
>> +#define T_SATA0_CFG2NVOOB_2 0x134
>> +#define T_SATA0_CFG2NVOOB_2_COMWAKE_IDLE_CNT_LOW_MASK
> (0x1ff << 18)
>> +#define T_SATA0_CFG2NVOOB_2_COMWAKE_IDLE_CNT_LOW (0xc <<
>18)
>>
>> #define T_SATA0_AHCI_HBA_CAP_BKDR 0x300
>> +#define T_SATA0_AHCI_HBA_CAP_BKDR_PARTIAL_ST_CAP BIT(13)
>> +#define T_SATA0_AHCI_HBA_CAP_BKDR_SLUMBER_ST_CAP BIT(14)
>> +#define T_SATA0_AHCI_HBA_CAP_BKDR_SALP BIT(26)
>> +#define T_SATA0_AHCI_HBA_CAP_BKDR_SUPP_PM BIT(17)
>> +#define T_SATA0_AHCI_HBA_CAP_BKDR_SNCQ BIT(30)
>>
>> -#define T_SATA0_BKDOOR_CC 0x4a4
>> +#define T_SATA_BKDOOR_CC 0x4A4
>> +#define T_SATA_BKDOOR_CC_CLASS_CODE_MASK (0xFFFF << 16)
>> +#define T_SATA_BKDOOR_CC_CLASS_CODE
> (0x0106 << 16)
>> +#define T_SATA_BKDOOR_CC_PROG_IF_MASK (0xFF
><< 8)
>> +#define T_SATA_BKDOOR_CC_PROG_IF (0x01 << 8)
>>
>> -#define T_SATA0_CFG_SATA 0x54c
>> -#define T_SATA0_CFG_SATA_BACKDOOR_PROG_IF_EN BIT(12)
>> +#define T_SATA_CFG_SATA 0x54C
>> +#define T_SATA_CFG_SATA_BACKDOOR_PROG_IF_EN BIT(12)
>>
>> #define T_SATA0_CFG_MISC 0x550
>>
>> @@ -82,8 +124,27 @@
>> #define T_SATA0_CHX_PHY_CTRL11 0x6d0
>> #define T_SATA0_CHX_PHY_CTRL11_GEN2_RX_EQ (0x2800 <<
>16)
>>
>> -#define FUSE_SATA_CALIB 0x124
>> -#define FUSE_SATA_CALIB_MASK 0x3
>> +/* Electrical settings for better link stability */
>> +#define T_SATA0_CHX_PHY_CTRL17_0 0x6e8
>> +#define T_SATA0_CHX_PHY_CTRL17_0_RX_EQ_CTRL_L_GEN1
> 0x55010000
>> +#define T_SATA0_CHX_PHY_CTRL18_0 0x6ec
>> +#define T_SATA0_CHX_PHY_CTRL18_0_RX_EQ_CTRL_L_GEN2
> 0x55010000
>> +#define T_SATA0_CHX_PHY_CTRL20_0 0x6f4
>> +#define T_SATA0_CHX_PHY_CTRL20_0_RX_EQ_CTRL_H_GEN1 0x1
>> +#define T_SATA0_CHX_PHY_CTRL21_0 0x6f8
>> +#define T_SATA0_CHX_PHY_CTRL21_0_RX_EQ_CTRL_H_GEN2 0x1
>> +
>> +/* AUX Registers */
>> +#define SATA_AUX_MISC_CNTL_1_0 0x8
>> +#define DEVSLP_OVERRIDE BIT(17)
>> +#define SDS_SUPPORT BIT(13)
>> +#define DESO_SUPPORT BIT(15)
>> +
>> +#define SATA_AUX_RX_STAT_INT_0 0xc
>> +#define SATA_DEVSLP BIT(7)
>> +
>> +#define SATA_AUX_SPARE_CFG0_0 0x18
>> +#define MDAT_TIMER_AFTER_PG_VALID BIT(14)
>>
>> struct sata_pad_calibration {
>> u8 gen1_tx_amp;
>> @@ -99,15 +160,135 @@ static const struct sata_pad_calibration
>tegra124_pad_calibration[] = {
>> {0x14, 0x0e, 0x1a, 0x0e},
>> };
>>
>> +struct tegra_ahci_ops {
>> + int (*init)(struct ahci_host_priv *); };
>> +
>> +struct tegra_ahci_soc {
>> + const char *const *supply_names;
>> + unsigned int num_supplies;
>> + struct tegra_ahci_ops ops;
>> +};
>> +
>> struct tegra_ahci_priv {
>> - struct platform_device *pdev;
>> - void __iomem *sata_regs;
>> - struct reset_control *sata_rst;
>> - struct reset_control *sata_oob_rst;
>> - struct reset_control *sata_cold_rst;
>> + struct platform_device *pdev;
>> + void __iomem *sata_regs;
>> + void __iomem *sata_aux_regs;
>> + struct reset_control *sata_rst;
>> + struct reset_control *sata_oob_rst;
>> + struct reset_control *sata_cold_rst;
>> /* Needs special handling, cannot use ahci_platform */
>> - struct clk *sata_clk;
>> - struct regulator_bulk_data supplies[5];
>> + struct clk *sata_clk;
>> + struct regulator_bulk_data *supplies;
>> + struct tegra_ahci_soc *soc_data;
>> +};
>
>I don't particularly care whether the field names are aligned or not, but I
>remember the ata maintainers wanting them to be. Anyway, changing the
>style makes the patch larger and the actual functionality changes harder to
>review.
>
Ok will keep them aligned.
>> +
>> +static const char *const tegra124_supply_names[] = {
>> + "avdd", "hvdd", "vddio", "target-5v", "target-12v"
>> +};
>> +
>> +static inline void tegra_ahci_sata_update(struct tegra_ahci_priv *tegra,
>> + u32 val, u32 mask, u32 offset) {
>> + u32 uval;
>> +
>> + uval = readl(tegra->sata_regs + offset);
>> + uval = (uval & ~mask) | (val & mask);
>> + writel(uval, tegra->sata_regs + offset); }
>
>I'm not very fond of these _update functions. I think it is clearer to just write
>it out at the callsite, especially since this is used only four times.
>
Ok will remove them.
>> +
>> +static inline void tegra_ahci_scfg_writel(struct tegra_ahci_priv *tegra,
>> + u32 val, u32 offset)
>> +{
>> + writel(val, tegra->sata_regs + SCFG_OFFSET + offset); }
>> +
>> +static inline void tegra_ahci_scfg_update(struct tegra_ahci_priv *tegra,
>> + u32 val, u32 mask, u32 offset) {
>> + u32 uval;
>> +
>> + uval = readl(tegra->sata_regs + SCFG_OFFSET + offset);
>> + uval = (uval & ~mask) | (val & mask);
>> + writel(uval, tegra->sata_regs + SCFG_OFFSET + offset); }
>> +
>> +static inline u32 tegra_ahci_aux_readl(struct tegra_ahci_priv *tegra,
>> + u32 offset)
>> +{
>> + return readl(tegra->sata_aux_regs + offset); }
>
>This is never called.
>
Will remove it.
>> +
>> +static inline void tegra_ahci_aux_update(struct tegra_ahci_priv *tegra,
>u32 val,
>> + u32 mask, u32 offset)
>> +{
>> + u32 uval;
>> +
>> + uval = readl(tegra->sata_aux_regs + offset);
>> + uval = (uval & ~mask) | (val & mask);
>> + writel(uval, tegra->sata_aux_regs + offset); }
>
>This is only called once.
>
Will remove it.
>> +
>> +static int tegra124_ahci_init(struct ahci_host_priv *hpriv) {
>> + struct tegra_ahci_priv *tegra = hpriv->plat_data;
>> + struct sata_pad_calibration calib;
>> + int ret;
>> + u32 val;
>> + u32 mask;
>> +
>> + /* Pad calibration */
>> + ret = tegra_fuse_readl(FUSE_SATA_CALIB, &val);
>> + if (ret)
>> + return ret;
>> +
>> + calib = tegra124_pad_calibration[val & FUSE_SATA_CALIB_MASK];
>> +
>> + tegra_ahci_scfg_writel(tegra, BIT(0), T_SATA0_INDEX);
>> +
>> + mask = T_SATA0_CHX_PHY_CTRL1_GEN1_TX_AMP_MASK |
>> + T_SATA0_CHX_PHY_CTRL1_GEN1_TX_PEAK_MASK;
>> + val = (calib.gen1_tx_amp <<
>T_SATA0_CHX_PHY_CTRL1_GEN1_TX_AMP_SHIFT) |
>> + (calib.gen1_tx_peak <<
>T_SATA0_CHX_PHY_CTRL1_GEN1_TX_PEAK_SHIFT);
>> + tegra_ahci_scfg_update(tegra, val, mask,
>> +T_SATA0_CHX_PHY_CTRL1_GEN1);
>> +
>> + mask = T_SATA0_CHX_PHY_CTRL1_GEN2_TX_AMP_MASK |
>> + T_SATA0_CHX_PHY_CTRL1_GEN2_TX_PEAK_MASK;
>> + val = (calib.gen2_tx_amp <<
>T_SATA0_CHX_PHY_CTRL1_GEN1_TX_AMP_SHIFT) |
>> + (calib.gen2_tx_peak <<
>T_SATA0_CHX_PHY_CTRL1_GEN1_TX_PEAK_SHIFT);
>> + tegra_ahci_scfg_update(tegra, val, mask,
>> +T_SATA0_CHX_PHY_CTRL1_GEN2);
>> +
>> + tegra_ahci_scfg_writel(tegra,
>> + T_SATA0_CHX_PHY_CTRL11_GEN2_RX_EQ,
>> + T_SATA0_CHX_PHY_CTRL11);
>> + tegra_ahci_scfg_writel(tegra,
>> + T_SATA0_CHX_PHY_CTRL2_CDR_CNTL_GEN1,
>> + T_SATA0_CHX_PHY_CTRL2);
>> +
>> + tegra_ahci_scfg_writel(tegra, 0, T_SATA0_INDEX);
>> +
>> + return 0;
>> +}
>> +
>> +static const struct tegra_ahci_soc tegra124_ahci_soc_data = {
>> + .supply_names = tegra124_supply_names,
>> + .num_supplies = ARRAY_SIZE(tegra124_supply_names),
>> + .ops = {
>> + .init = tegra124_ahci_init,
>> + },
>> +};
>> +
>> +static const char *const tegra210_supply_names[] = {
>> + "dvdd-sata-pll",
>> + "hvdd-sata",
>> + "l0-hvddio-sata",
>> + "l0-dvddio-sata",
>> + "hvdd-pex-pll-e"
>> +};
>
>Perhaps the "-sata-" should be removed from these - I believe the supply
>name here should refer to the usage of the supplied power within the IP
>block. The IP block here is SATA so it is clear that it is used for something
>SATA related. If someone is better informed, please comment.
>
>It also looks like this doesn't include the 5V and 12V supplies which had to
>be enabled on the Jetson TK1 to enable power output through the Molex
>connector - do you know if the Jetson TX1 no longer needs similar to enable
>the SATA power connector?
>
We need to keep regulator name matching with pin name. The regulatory framework and policy suggests that regulator name should match the pin name. So I have named it accordingly.
The 5V and 12V does not seem to be required for tx1. I will take a closer look at it and if required I will push another patch for it.
>> +
>> +static const struct tegra_ahci_soc tegra210_ahci_soc_data = {
>> + .supply_names = tegra210_supply_names,
>> + .num_supplies = ARRAY_SIZE(tegra210_supply_names),
>> };
>>
>> static int tegra_ahci_power_on(struct ahci_host_priv *hpriv) @@
>> -115,7 +296,7 @@ static int tegra_ahci_power_on(struct ahci_host_priv
>*hpriv)
>> struct tegra_ahci_priv *tegra = hpriv->plat_data;
>> int ret;
>>
>> - ret = regulator_bulk_enable(ARRAY_SIZE(tegra->supplies),
>> + ret = regulator_bulk_enable(tegra->soc_data->num_supplies,
>> tegra->supplies);
>> if (ret)
>> return ret;
>> @@ -144,8 +325,7 @@ static int tegra_ahci_power_on(struct
>ahci_host_priv *hpriv)
>> tegra_powergate_power_off(TEGRA_POWERGATE_SATA);
>>
>> disable_regulators:
>> - regulator_bulk_disable(ARRAY_SIZE(tegra->supplies), tegra-
>>supplies);
>> -
>> + regulator_bulk_disable(tegra->soc_data->num_supplies,
>> +tegra->supplies);
>> return ret;
>> }
>>
>> @@ -162,101 +342,124 @@ static void tegra_ahci_power_off(struct
>ahci_host_priv *hpriv)
>> clk_disable_unprepare(tegra->sata_clk);
>> tegra_powergate_power_off(TEGRA_POWERGATE_SATA);
>>
>> - regulator_bulk_disable(ARRAY_SIZE(tegra->supplies), tegra-
>>supplies);
>> + regulator_bulk_disable(tegra->soc_data->num_supplies,
>> +tegra->supplies);
>> }
>>
>> static int tegra_ahci_controller_init(struct ahci_host_priv *hpriv)
>> {
>> struct tegra_ahci_priv *tegra = hpriv->plat_data;
>> int ret;
>> - unsigned int val;
>> - struct sata_pad_calibration calib;
>> + u32 val;
>> + u32 mask;
>>
>> ret = tegra_ahci_power_on(hpriv);
>> - if (ret) {
>> - dev_err(&tegra->pdev->dev,
>> - "failed to power on AHCI controller: %d\n", ret);
>> - return ret;
>> - }
>> -
>> - val = readl(tegra->sata_regs + SATA_CONFIGURATION_0);
>> - val |= SATA_CONFIGURATION_EN_FPCI;
>> - writel(val, tegra->sata_regs + SATA_CONFIGURATION_0);
>> -
>> - /* Pad calibration */
>> -
>> - ret = tegra_fuse_readl(FUSE_SATA_CALIB, &val);
>> - if (ret) {
>> - dev_err(&tegra->pdev->dev,
>> - "failed to read calibration fuse: %d\n", ret);
>> + if (ret)
>> return ret;
>> - }
>> -
>> - calib = tegra124_pad_calibration[val & FUSE_SATA_CALIB_MASK];
>> -
>> - writel(BIT(0), tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX);
>> -
>> - val = readl(tegra->sata_regs +
>> - SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL1_GEN1);
>> - val &= ~T_SATA0_CHX_PHY_CTRL1_GEN1_TX_AMP_MASK;
>> - val &= ~T_SATA0_CHX_PHY_CTRL1_GEN1_TX_PEAK_MASK;
>> - val |= calib.gen1_tx_amp <<
>> - T_SATA0_CHX_PHY_CTRL1_GEN1_TX_AMP_SHIFT;
>> - val |= calib.gen1_tx_peak <<
>> - T_SATA0_CHX_PHY_CTRL1_GEN1_TX_PEAK_SHIFT;
>> - writel(val, tegra->sata_regs + SCFG_OFFSET +
>> - T_SATA0_CHX_PHY_CTRL1_GEN1);
>> -
>> - val = readl(tegra->sata_regs +
>> - SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL1_GEN2);
>> - val &= ~T_SATA0_CHX_PHY_CTRL1_GEN2_TX_AMP_MASK;
>> - val &= ~T_SATA0_CHX_PHY_CTRL1_GEN2_TX_PEAK_MASK;
>> - val |= calib.gen2_tx_amp <<
>> - T_SATA0_CHX_PHY_CTRL1_GEN1_TX_AMP_SHIFT;
>> - val |= calib.gen2_tx_peak <<
>> - T_SATA0_CHX_PHY_CTRL1_GEN1_TX_PEAK_SHIFT;
>> - writel(val, tegra->sata_regs + SCFG_OFFSET +
>> - T_SATA0_CHX_PHY_CTRL1_GEN2);
>> -
>> - writel(T_SATA0_CHX_PHY_CTRL11_GEN2_RX_EQ,
>> - tegra->sata_regs + SCFG_OFFSET +
>T_SATA0_CHX_PHY_CTRL11);
>> - writel(T_SATA0_CHX_PHY_CTRL2_CDR_CNTL_GEN1,
>> - tegra->sata_regs + SCFG_OFFSET +
>T_SATA0_CHX_PHY_CTRL2);
>> -
>> - writel(0, tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX);
>> -
>> - /* Program controller device ID */
>>
>> - val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
>> - val |= T_SATA0_CFG_SATA_BACKDOOR_PROG_IF_EN;
>> - writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
>> -
>> - writel(0x01060100, tegra->sata_regs + SCFG_OFFSET +
>T_SATA0_BKDOOR_CC);
>> -
>> - val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
>> - val &= ~T_SATA0_CFG_SATA_BACKDOOR_PROG_IF_EN;
>> - writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
>> -
>> - /* Enable IO & memory access, bus master mode */
>> -
>> - val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1);
>> - val |= T_SATA0_CFG_1_IO_SPACE |
>T_SATA0_CFG_1_MEMORY_SPACE |
>> - T_SATA0_CFG_1_BUS_MASTER | T_SATA0_CFG_1_SERR;
>> - writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1);
>> -
>> - /* Program SATA MMIO */
>> -
>> - writel(0x10000 << SATA_FPCI_BAR5_START_SHIFT,
>> - tegra->sata_regs + SATA_FPCI_BAR5);
>> -
>> - writel(0x08000 << T_SATA0_CFG_9_BASE_ADDRESS_SHIFT,
>> - tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_9);
>> -
>> - /* Unmask SATA interrupts */
>> -
>> - val = readl(tegra->sata_regs + SATA_INTR_MASK);
>> - val |= SATA_INTR_MASK_IP_INT_MASK;
>> - writel(val, tegra->sata_regs + SATA_INTR_MASK);
>> + /*
>> + * Program the following SATA IPFS registers
>> + * to allow SW accesses to SATA's MMIO Register
>> + */
>> + mask = FPCI_BAR5_START_MASK | FPCI_BAR5_ACCESS_TYPE;
>> + val = FPCI_BAR5_START | FPCI_BAR5_ACCESS_TYPE;
>> + tegra_ahci_sata_update(tegra, val, mask, SATA_FPCI_BAR5_0);
>> +
>> + /* Program the following SATA IPFS register to enable the SATA */
>> + val = SATA_CONFIGURATION_0_EN_FPCI;
>> + tegra_ahci_sata_update(tegra, val, val, SATA_CONFIGURATION_0);
>> +
>> + /* Electrical settings for better link stability */
>> + tegra_ahci_scfg_writel(tegra,
>> +
>T_SATA0_CHX_PHY_CTRL17_0_RX_EQ_CTRL_L_GEN1,
>> + T_SATA0_CHX_PHY_CTRL17_0);
>> + tegra_ahci_scfg_writel(tegra,
>> +
>T_SATA0_CHX_PHY_CTRL18_0_RX_EQ_CTRL_L_GEN2,
>> + T_SATA0_CHX_PHY_CTRL18_0);
>> + tegra_ahci_scfg_writel(tegra,
>> +
>T_SATA0_CHX_PHY_CTRL20_0_RX_EQ_CTRL_H_GEN1,
>> + T_SATA0_CHX_PHY_CTRL20_0);
>> + tegra_ahci_scfg_writel(tegra,
>> +
>T_SATA0_CHX_PHY_CTRL21_0_RX_EQ_CTRL_H_GEN2,
>> + T_SATA0_CHX_PHY_CTRL21_0);
>> +
>> + /* For SQUELCH Filter & Gen3 drive getting detected as Gen1 drive
>*/
>> +
>> + mask = T_SATA_CFG_PHY_0_MASK_SQUELCH |
>> + T_SATA_CFG_PHY_0_USE_7BIT_ALIGN_DET_FOR_SPD;
>> + val = T_SATA_CFG_PHY_0_MASK_SQUELCH;
>> + val &= ~T_SATA_CFG_PHY_0_USE_7BIT_ALIGN_DET_FOR_SPD;
>> + tegra_ahci_scfg_update(tegra, val, mask, T_SATA_CFG_PHY_0);
>> +
>> + mask = (T_SATA0_NVOOB_COMMA_CNT_MASK |
>> + T_SATA0_NVOOB_SQUELCH_FILTER_LENGTH_MASK |
>> + T_SATA0_NVOOB_SQUELCH_FILTER_MODE_MASK);
>> + val = (T_SATA0_NVOOB_COMMA_CNT |
>> + T_SATA0_NVOOB_SQUELCH_FILTER_LENGTH |
>> + T_SATA0_NVOOB_SQUELCH_FILTER_MODE);
>> + tegra_ahci_scfg_update(tegra, val, mask, T_SATA0_NVOOB);
>> +
>> + /*
>> + * Change CFG2NVOOB_2_COMWAKE_IDLE_CNT_LOW from 83.3 ns
>to 58.8ns
>> + */
>> + mask =
>T_SATA0_CFG2NVOOB_2_COMWAKE_IDLE_CNT_LOW_MASK;
>> + val = T_SATA0_CFG2NVOOB_2_COMWAKE_IDLE_CNT_LOW;
>> + tegra_ahci_scfg_update(tegra, val, mask, T_SATA0_CFG2NVOOB_2);
>> +
>> + if (tegra->soc_data->ops.init)
>> + tegra->soc_data->ops.init(hpriv);
>> +
>> + /*
>> + * Program the following SATA configuration registers
>> + * to initialize SATA
>> + */
>> + val = (T_SATA_CFG_1_IO_SPACE | T_SATA_CFG_1_MEMORY_SPACE
>|
>> + T_SATA_CFG_1_BUS_MASTER | T_SATA_CFG_1_SERR);
>> + tegra_ahci_scfg_update(tegra, val, val, T_SATA_CFG_1);
>> + tegra_ahci_scfg_writel(tegra, T_SATA_CFG_9_BASE_ADDRESS,
>> +T_SATA_CFG_9);
>> +
>> + /* Program Class Code and Programming interface for SATA */
>> + val = T_SATA_CFG_SATA_BACKDOOR_PROG_IF_EN;
>> + tegra_ahci_scfg_update(tegra, val, val, T_SATA_CFG_SATA);
>> +
>> + mask = T_SATA_BKDOOR_CC_CLASS_CODE_MASK |
>T_SATA_BKDOOR_CC_PROG_IF_MASK;
>> + val = T_SATA_BKDOOR_CC_CLASS_CODE |
>T_SATA_BKDOOR_CC_PROG_IF;
>> + tegra_ahci_scfg_update(tegra, val, mask, T_SATA_BKDOOR_CC);
>> +
>> + tegra_ahci_scfg_update(tegra, 0,
>T_SATA_CFG_SATA_BACKDOOR_PROG_IF_EN,
>> + T_SATA_CFG_SATA);
>> +
>> + /* Enabling LPM capabilities through Backdoor Programming */
>> + val = (T_SATA0_AHCI_HBA_CAP_BKDR_PARTIAL_ST_CAP |
>> + T_SATA0_AHCI_HBA_CAP_BKDR_SLUMBER_ST_CAP |
>> + T_SATA0_AHCI_HBA_CAP_BKDR_SALP |
>> + T_SATA0_AHCI_HBA_CAP_BKDR_SUPP_PM);
>> + tegra_ahci_scfg_update(tegra, val, val,
>T_SATA0_AHCI_HBA_CAP_BKDR);
>> +
>> + /* SATA Second Level Clock Gating configuration
>> + * Enabling Gating of Tx/Rx clocks and driving Pad IDDQ and Lane
>> + * IDDQ Signals
>> + */
>> + mask = T_SATA0_CFG_35_IDP_INDEX_MASK;
>> + val = T_SATA0_CFG_35_IDP_INDEX;
>> + tegra_ahci_scfg_update(tegra, val, mask, T_SATA0_CFG_35);
>> + tegra_ahci_scfg_writel(tegra, T_SATA0_AHCI_IDP1_DATA,
>> + T_SATA0_AHCI_IDP1);
>> + val = (T_SATA0_CFG_PHY_1_PADS_IDDQ_EN |
>> + T_SATA0_CFG_PHY_1_PAD_PLL_IDDQ_EN);
>> + tegra_ahci_scfg_update(tegra, val, val, T_SATA0_CFG_PHY_1);
>> +
>> + /*
>> + * Indicate Sata only has the capability to enter DevSleep
>> + * from slumber link.
>> + */
>> + tegra_ahci_aux_update(tegra, DESO_SUPPORT, DESO_SUPPORT,
>> + SATA_AUX_MISC_CNTL_1_0);
>> + /* Enabling IPFS Clock Gating */
>> + tegra_ahci_sata_update(tegra, 0,
>SATA_CONFIGURATION_CLK_OVERRIDE,
>> + SATA_CONFIGURATION_0);
>> +
>> + tegra_ahci_sata_update(tegra, IP_INT_MASK, IP_INT_MASK,
>> + SATA_INTR_MASK_0);
>>
>> return 0;
>> }
>> @@ -274,19 +477,24 @@ static void tegra_ahci_host_stop(struct
>ata_host
>> *host) }
>>
>> static struct ata_port_operations ahci_tegra_port_ops = {
>> - .inherits = &ahci_ops,
>> - .host_stop = tegra_ahci_host_stop,
>> + .inherits = &ahci_ops,
>> + .host_stop = tegra_ahci_host_stop,
>> };
>>
>> static const struct ata_port_info ahci_tegra_port_info = {
>> - .flags = AHCI_FLAG_COMMON,
>> - .pio_mask = ATA_PIO4,
>> - .udma_mask = ATA_UDMA6,
>> - .port_ops = &ahci_tegra_port_ops,
>> + .flags = AHCI_FLAG_COMMON,
>> + .pio_mask = ATA_PIO4,
>> + .udma_mask = ATA_UDMA6,
>> + .port_ops = &ahci_tegra_port_ops,
>> };
>
>Please keep the original style as to keep the patch as small as possible.
>
Ok.
>>
>> static const struct of_device_id tegra_ahci_of_match[] = {
>> - { .compatible = "nvidia,tegra124-ahci" },
>> + {
>> + .compatible = "nvidia,tegra124-ahci",
>> + .data = &tegra124_ahci_soc_data},
>> + {
>> + .compatible = "nvidia,tegra210-ahci",
>> + .data = &tegra210_ahci_soc_data},
>
>Please write these like
>
>{
> .compatible = "nvidia,tegra124-ahci",
> .data = &tegra124_ahci_soc_data,
>},
>
Ok.
>> {}
>> };
>> MODULE_DEVICE_TABLE(of, tegra_ahci_of_match); @@ -301,6 +509,7
>@@
>> static int tegra_ahci_probe(struct platform_device *pdev)
>> struct tegra_ahci_priv *tegra;
>> struct resource *res;
>> int ret;
>> + unsigned int i;
>>
>> hpriv = ahci_platform_get_resources(pdev);
>> if (IS_ERR(hpriv))
>> @@ -311,13 +520,18 @@ static int tegra_ahci_probe(struct
>platform_device *pdev)
>> return -ENOMEM;
>>
>> hpriv->plat_data = tegra;
>> -
>> tegra->pdev = pdev;
>> + tegra->soc_data =
>> + (struct tegra_ahci_soc *)of_device_get_match_data(&pdev->dev);
>>
>> res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
>> tegra->sata_regs = devm_ioremap_resource(&pdev->dev, res);
>> if (IS_ERR(tegra->sata_regs))
>> return PTR_ERR(tegra->sata_regs);
>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
>> + tegra->sata_aux_regs = devm_ioremap_resource(&pdev->dev, res);
>> + if (IS_ERR(tegra->sata_aux_regs))
>> + return PTR_ERR(tegra->sata_aux_regs);
>
>Please add this register range also to the device tree binding documentation.
>Also, please provide a patch to enable the SATA controller on a Tegra210
>board - preferably the Jetson TX1 (or internal
>variant) so that it is easy to test.
>
Ok.
>>
>> tegra->sata_rst = devm_reset_control_get(&pdev->dev, "sata");
>> if (IS_ERR(tegra->sata_rst)) {
>> @@ -343,13 +557,17 @@ static int tegra_ahci_probe(struct
>platform_device *pdev)
>> return PTR_ERR(tegra->sata_clk);
>> }
>>
>> - tegra->supplies[0].supply = "avdd";
>> - tegra->supplies[1].supply = "hvdd";
>> - tegra->supplies[2].supply = "vddio";
>> - tegra->supplies[3].supply = "target-5v";
>> - tegra->supplies[4].supply = "target-12v";
>> + tegra->supplies = devm_kcalloc(&pdev->dev,
>> + tegra->soc_data->num_supplies,
>> + sizeof(*tegra->supplies), GFP_KERNEL);
>> + if (!tegra->supplies)
>> + return -ENOMEM;
>> +
>> + for (i = 0; i < tegra->soc_data->num_supplies; i++)
>> + tegra->supplies[i].supply = tegra->soc_data-
>>supply_names[i];
>>
>> - ret = devm_regulator_bulk_get(&pdev->dev, ARRAY_SIZE(tegra-
>>supplies),
>> + ret = devm_regulator_bulk_get(&pdev->dev,
>> + tegra->soc_data->num_supplies,
>> tegra->supplies);
>> if (ret) {
>> dev_err(&pdev->dev, "Failed to get regulators\n"); @@ -
>377,13
>> +595,13 @@ static struct platform_driver tegra_ahci_driver = {
>> .probe = tegra_ahci_probe,
>> .remove = ata_platform_remove_one,
>> .driver = {
>> - .name = DRV_NAME,
>> - .of_match_table = tegra_ahci_of_match,
>> - },
>> + .name = DRV_NAME,
>> + .of_match_table = tegra_ahci_of_match,
>> + },
>
>Please keep the style unchanged here as well.
>
Ok.
>> /* LP0 suspend support not implemented */ };
>> module_platform_driver(tegra_ahci_driver);
>>
>> MODULE_AUTHOR("Mikko Perttunen <mperttunen@nvidia.com>");
>> -MODULE_DESCRIPTION("Tegra124 AHCI SATA driver");
>> +MODULE_DESCRIPTION("Tegra AHCI SATA driver");
>
>Awesome!
>
>> MODULE_LICENSE("GPL v2");
>>
>>
>
>Thanks,
>Mikko
^ permalink raw reply
* Re: [v2,1/3] ata: ahci_tegra: add support for tegra210
From: Mikko Perttunen @ 2016-12-21 9:02 UTC (permalink / raw)
To: Preetham Chandru, Mikko Perttunen,
preetham260-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Cc: tj-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org,
thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
Laxman Dewangan,
linux-ide-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Venu Byravarasu, Pavan Kunapuli,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <7c1c25bc28a040df9f1f47884ad25746-7W72rfoJkVnYuxH7O460wFaTQe2KTcn/@public.gmane.org>
On 21.12.2016 10:50, Preetham Chandru wrote:
>...
>>
>> Perhaps the "-sata-" should be removed from these - I believe the supply
>> name here should refer to the usage of the supplied power within the IP
>> block. The IP block here is SATA so it is clear that it is used for something
>> SATA related. If someone is better informed, please comment.
>>
>> It also looks like this doesn't include the 5V and 12V supplies which had to
>> be enabled on the Jetson TK1 to enable power output through the Molex
>> connector - do you know if the Jetson TX1 no longer needs similar to enable
>> the SATA power connector?
>>
>
> We need to keep regulator name matching with pin name. The regulatory framework and policy suggests that regulator name should match the pin name. So I have named it accordingly.
> The 5V and 12V does not seem to be required for tx1. I will take a closer look at it and if required I will push another patch for it.
Ok, that makes sense; sounds good to me.
Thanks,
Mikko.
^ permalink raw reply
* RE: [v2,2/3] ata: ahci_tegra: Add support to disable features
From: Preetham Chandru @ 2016-12-21 9:12 UTC (permalink / raw)
To: Mikko Perttunen, tj-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org,
thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
preetham260-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Cc: Laxman Dewangan,
linux-ide-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Venu Byravarasu, Pavan Kunapuli,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <bb810105-4196-0594-d378-3c6a7a94b475-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>-----Original Message-----
>From: Mikko Perttunen
>Sent: Monday, November 28, 2016 6:09 PM
>To: Preetham Chandru; tj@kernel.org; swarren@wwwdotorg.org;
>thierry.reding@gmail.com; preetham260@gmail.com
>Cc: Laxman Dewangan; linux-ide@vger.kernel.org; Venu Byravarasu; Pavan
>Kunapuli; linux-tegra@vger.kernel.org
>Subject: Re: [v2,2/3] ata: ahci_tegra: Add support to disable features
>
>On 24.11.2016 09:43, PREETHAM RAMACHANDRA wrote:
>> From: Preetham Chandru R <pchandru@nvidia.com>
>>
>> Add support to disable DIPM, HIPM, DevSlp, partial, slumber and NCQ
>> features from DT. By default these features are enabled.
>>
>
>Why are these features disabled? Are they broken on all Tegra210 chips,
>broken on specific boards or do they require some support from the driver
>that is not there?
>
>Most likely we should hardcode the disabled features into the driver instead
>of reading them from the device tree.
>
Yes, currently DevSlp and DIPM features are broken for t210 and t124 but devslp is fixed for tegra186.
Also I thought it would be nice to provide similar options for other features as well.
Since we do not support hotplug this would help us in debugging if we face issues with certain drives during kernel boot.
We can disable features we think are causing issues and retry.
>> Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
>> ---
>> v2:
>> * This change was created by seperating
>> "ata: ahci_tegra: add support for tegra210" from v1
>>
>> drivers/ata/ahci_tegra.c | 107
>> ++++++++++++++++++++++++++++++++++++-----------
>> 1 file changed, 82 insertions(+), 25 deletions(-)
>>
>> diff --git a/drivers/ata/ahci_tegra.c b/drivers/ata/ahci_tegra.c index
>> d12e2a9..443c3e8 100644
>> --- a/drivers/ata/ahci_tegra.c
>> +++ b/drivers/ata/ahci_tegra.c
>> @@ -329,7 +329,7 @@ static int tegra_ahci_power_on(struct
>ahci_host_priv *hpriv)
>> return ret;
>> }
>>
>> -static void tegra_ahci_power_off(struct ahci_host_priv *hpriv)
>> +static void tegra_ahci_controller_deinit(struct ahci_host_priv
>> +*hpriv)
>> {
>> struct tegra_ahci_priv *tegra = hpriv->plat_data;
>>
>> @@ -345,6 +345,85 @@ static void tegra_ahci_power_off(struct
>ahci_host_priv *hpriv)
>> regulator_bulk_disable(tegra->soc_data->num_supplies,
>> tegra->supplies); }
>>
>> +static void tegra_ahci_host_stop(struct ata_host *host) {
>> + struct ahci_host_priv *hpriv = host->private_data;
>> +
>> + tegra_ahci_controller_deinit(hpriv);
>> +}
>> +
>> +static struct ata_port_operations ahci_tegra_port_ops = {
>> + .inherits = &ahci_ops,
>> + .host_stop = tegra_ahci_host_stop,
>> +};
>> +
>> +static struct ata_port_info ahci_tegra_port_info = {
>> + .flags = AHCI_FLAG_COMMON,
>> + .pio_mask = ATA_PIO4,
>> + .udma_mask = ATA_UDMA6,
>> + .port_ops = &ahci_tegra_port_ops,
>> +};
>> +
>> +static void tegra_ahci_disable_devslp(struct tegra_ahci_priv *tegra)
>> +{
>> + tegra_ahci_aux_update(tegra, 0, SDS_SUPPORT,
>> +SATA_AUX_MISC_CNTL_1_0); }
>> +
>> +static void tegra_ahci_disable_hipm(struct tegra_ahci_priv *tegra) {
>> + tegra_ahci_scfg_update(tegra, 0,
>T_SATA0_AHCI_HBA_CAP_BKDR_SALP,
>> + T_SATA0_AHCI_HBA_CAP_BKDR); }
>> +
>> +static void tegra_ahci_disable_partial(struct tegra_ahci_priv *tegra)
>> +{
>> + tegra_ahci_scfg_update(tegra, 0,
>> +
>T_SATA0_AHCI_HBA_CAP_BKDR_PARTIAL_ST_CAP,
>> + T_SATA0_AHCI_HBA_CAP_BKDR); }
>> +
>> +static void tegra_ahci_disable_slumber(struct tegra_ahci_priv *tegra)
>> +{
>> + tegra_ahci_scfg_update(tegra, 0,
>> +
>T_SATA0_AHCI_HBA_CAP_BKDR_SLUMBER_ST_CAP,
>> + T_SATA0_AHCI_HBA_CAP_BKDR); }
>> +
>> +static void tegra_ahci_disable_ncq(struct tegra_ahci_priv *tegra) {
>> + tegra_ahci_scfg_update(tegra, 0,
>T_SATA0_AHCI_HBA_CAP_BKDR_SNCQ,
>> + T_SATA0_AHCI_HBA_CAP_BKDR); }
>
>These probably don't need their own functions.
>
Ok
>> +
>> +static void tegra_ahci_disable_features(struct ahci_host_priv *hpriv)
>> +{
>> + struct tegra_ahci_priv *tegra = hpriv->plat_data;
>> + struct platform_device *pdev = tegra->pdev;
>> + struct device *dev = &pdev->dev;
>> + struct device_node *np = dev->of_node;
>> + struct property *prop;
>> + const char *feature;
>> +
>> + if (of_property_count_strings(np, "nvidia,disable-features") <= 0)
>> + return;
>> +
>> + of_property_for_each_string(np, "nvidia,disable-features", prop,
>> + feature) {
>> + if (!strcmp(feature, "devslp"))
>> + tegra_ahci_disable_devslp(tegra);
>> + else if (!strcmp(feature, "hipm"))
>> + tegra_ahci_disable_hipm(tegra);
>> + else if (!strcmp(feature, "ncq"))
>> + tegra_ahci_disable_ncq(tegra);
>> + else if (!strcmp(feature, "dipm"))
>> + ahci_tegra_port_info.flags |= ATA_FLAG_NO_DIPM;
>> + else if (!strcmp(feature, "partial"))
>> + tegra_ahci_disable_partial(tegra);
>> + else if (!strcmp(feature, "slumber"))
>> + tegra_ahci_disable_slumber(tegra);
>> + }
>> +}
>> +
>> static int tegra_ahci_controller_init(struct ahci_host_priv *hpriv)
>> {
>> struct tegra_ahci_priv *tegra = hpriv->plat_data; @@ -458,36
>+537,14
>> @@ static int tegra_ahci_controller_init(struct ahci_host_priv *hpriv)
>> tegra_ahci_sata_update(tegra, 0,
>SATA_CONFIGURATION_CLK_OVERRIDE,
>> SATA_CONFIGURATION_0);
>>
>> + tegra_ahci_disable_features(hpriv);
>> +
>> tegra_ahci_sata_update(tegra, IP_INT_MASK, IP_INT_MASK,
>> SATA_INTR_MASK_0);
>>
>> return 0;
>> }
>>
>> -static void tegra_ahci_controller_deinit(struct ahci_host_priv
>> *hpriv) -{
>> - tegra_ahci_power_off(hpriv);
>> -}
>> -
>> -static void tegra_ahci_host_stop(struct ata_host *host) -{
>> - struct ahci_host_priv *hpriv = host->private_data;
>> -
>> - tegra_ahci_controller_deinit(hpriv);
>> -}
>> -
>> -static struct ata_port_operations ahci_tegra_port_ops = {
>> - .inherits = &ahci_ops,
>> - .host_stop = tegra_ahci_host_stop,
>> -};
>> -
>> -static const struct ata_port_info ahci_tegra_port_info = {
>> - .flags = AHCI_FLAG_COMMON,
>> - .pio_mask = ATA_PIO4,
>> - .udma_mask = ATA_UDMA6,
>> - .port_ops = &ahci_tegra_port_ops,
>> -};
>> -
>> static const struct of_device_id tegra_ahci_of_match[] = {
>> {
>> .compatible = "nvidia,tegra124-ahci",
>>
>>
>
>Thanks,
>Mikko.
Thanks,
Preetham.
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