* [PATCH v2 00/14] ARM: da850-lcdk: add SATA support
From: Bartosz Golaszewski @ 2017-01-17 12:26 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
This series contains all the changes necessary to make SATA work on
the da850-lcdk board.
The first patch adds DT bindings for the ahci-da850 driver.
The second enables relevant modules in davinci_all_defconfig.
Patches 03/14-06/14 modify the way the clocks are handled regarding
SATA on the da850 platform. We modify the ahci driver to retrieve
the clock via con_id and model the external SATA oscillator as
a real clock.
Patches 07/14-11/14 extend the ahci-da850 driver. Add DT support,
implement workarounds necessary to make SATA work on the da850-lcdk
board and un-hardcode the external clock multiplier.
Last three patches add device tree changes required to probe the
driver.
v1 -> v2:
- dropped patch 04/10 - replaced with local changes in the
ahci-da850 driver
- added comments explaining the workaround in ahci softreset
- s/0x218000/218000 in the sata DT node label
- added patches chaning the way clocks are handled in the da850 SATA
code both in arch/ and in the ahci driver
- dropped the clock multiplier property in the DT bindings in favor
of using struct clk to pass the refclk rate to the driver
- minor tweaks in commit messages
Bartosz Golaszewski (14):
devicetree: bindings: add bindings for ahci-da850
ARM: davinci_all_defconfig: enable SATA modules
ARM: davinci: add a clock lookup entry for the SATA clock
sata: ahci-da850: get the sata clock using a connector id
ARM: davinci: da850: add con_id for the SATA clock
ARM: davinci: da850: model the SATA refclk
sata: ahci-da850: add device tree match table
sata: ahci-da850: implement a workaround for the softreset quirk
sata: ahci: export ahci_do_hardreset() locally
sata: ahci-da850: add a workaround for controller instability
sata: ahci-da850: un-hardcode the MPY bits
ARM: dts: da850: add pinmux settings for the SATA controller
ARM: dts: da850: add the SATA node
ARM: dts: da850-lcdk: enable the SATA node
.../devicetree/bindings/ata/ahci-da850.txt | 18 +++
arch/arm/boot/dts/da850-lcdk.dts | 4 +
arch/arm/boot/dts/da850.dtsi | 30 ++++
arch/arm/configs/davinci_all_defconfig | 2 +
arch/arm/mach-davinci/da850.c | 2 +-
arch/arm/mach-davinci/da8xx-dt.c | 9 ++
arch/arm/mach-davinci/devices-da8xx.c | 23 +++
arch/arm/mach-davinci/include/mach/da8xx.h | 1 +
drivers/ata/ahci.h | 3 +
drivers/ata/ahci_da850.c | 172 +++++++++++++++++++--
drivers/ata/libahci.c | 18 ++-
11 files changed, 262 insertions(+), 20 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ata/ahci-da850.txt
--
2.9.3
^ permalink raw reply
* [PATCH v2 02/14] ARM: davinci_all_defconfig: enable SATA modules
From: Bartosz Golaszewski @ 2017-01-17 12:26 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484655976-25382-1-git-send-email-bgolaszewski@baylibre.com>
Add the da850-ahci driver to davinci defconfig.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/configs/davinci_all_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index 8806754..a1b9c58 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -78,6 +78,8 @@ CONFIG_IDE=m
CONFIG_BLK_DEV_PALMCHIP_BK3710=m
CONFIG_SCSI=m
CONFIG_BLK_DEV_SD=m
+CONFIG_ATA=m
+CONFIG_AHCI_DA850=m
CONFIG_NETDEVICES=y
CONFIG_NETCONSOLE=y
CONFIG_TUN=m
--
2.9.3
^ permalink raw reply related
* [PATCH v2 10/14] sata: ahci-da850: add a workaround for controller instability
From: Bartosz Golaszewski @ 2017-01-17 12:26 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484655976-25382-1-git-send-email-bgolaszewski@baylibre.com>
We have a use case with the da850 SATA controller where at PLL0
frequency of 456MHz (needed to properly service the LCD controller)
the chip becomes unstable and the hardreset operation is ignored the
first time 50% of times.
The sata core driver already retries to resume the link because some
controllers ignore writes to the SControl register, but just retrying
the resume operation doesn't work - we need to issue he phy/wake reset
again to make it work.
Reimplement ahci_hardreset() in the driver and poke the controller a
couple times before really giving up.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
drivers/ata/ahci_da850.c | 28 +++++++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
index e0dc089..a7a7161 100644
--- a/drivers/ata/ahci_da850.c
+++ b/drivers/ata/ahci_da850.c
@@ -16,7 +16,8 @@
#include <linux/ahci_platform.h>
#include "ahci.h"
-#define DRV_NAME "ahci_da850"
+#define DRV_NAME "ahci_da850"
+#define HARDRESET_RETRIES 5
/* SATA PHY Control Register offset from AHCI base */
#define SATA_P0PHYCR_REG 0x178
@@ -76,6 +77,29 @@ static int ahci_da850_softreset(struct ata_link *link,
return ret;
}
+static int ahci_da850_hardreset(struct ata_link *link,
+ unsigned int *class, unsigned long deadline)
+{
+ int ret, retry = HARDRESET_RETRIES;
+ bool online;
+
+ /*
+ * In order to correctly service the LCD controller of the da850 SoC,
+ * we increased the PLL0 frequency to 456MHz from the default 300MHz.
+ *
+ * This made the SATA controller unstable and the hardreset operation
+ * does not always succeed the first time. Before really giving up to
+ * bring up the link, retry the reset a couple times.
+ */
+ do {
+ ret = ahci_do_hardreset(link, class, deadline, &online);
+ if (online)
+ return ret;
+ } while (retry--);
+
+ return ret;
+}
+
static struct ata_port_operations ahci_da850_port_ops = {
.inherits = &ahci_platform_ops,
.softreset = ahci_da850_softreset,
@@ -83,6 +107,8 @@ static struct ata_port_operations ahci_da850_port_ops = {
* No need to override .pmp_softreset - it's only used for actual
* PMP-enabled ports.
*/
+ .hardreset = ahci_da850_hardreset,
+ .pmp_hardreset = ahci_da850_hardreset,
};
static const struct ata_port_info ahci_da850_port_info = {
--
2.9.3
^ permalink raw reply related
* [PATCH v2 13/14] ARM: dts: da850: add the SATA node
From: Bartosz Golaszewski @ 2017-01-17 12:26 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484655976-25382-1-git-send-email-bgolaszewski@baylibre.com>
Add the SATA node to the da850 device tree.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/boot/dts/da850.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 1f6a47d..7c32bf7 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -427,6 +427,12 @@
phy-names = "usb-phy";
status = "disabled";
};
+ sata: ahci@218000 {
+ compatible = "ti,da850-ahci";
+ reg = <0x218000 0x2000>, <0x22c018 0x4>;
+ interrupts = <67>;
+ status = "disabled";
+ };
mdio: mdio@224000 {
compatible = "ti,davinci_mdio";
#address-cells = <1>;
--
2.9.3
^ permalink raw reply related
* Re: [PATCH 00/10] ARM: da850-lcdk: add SATA support
From: Bartosz Golaszewski @ 2017-01-17 12:34 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide-u79uwXL29TY76Z2rM5mHXA, linux-devicetree, LKML, arm-soc,
Bartosz Golaszewski
In-Reply-To: <1484311084-31547-1-git-send-email-bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2017-01-13 13:37 GMT+01:00 Bartosz Golaszewski <bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>:
> This series contains all the changes necessary to make SATA work on
> the da850-lcdk board.
>
> The first patch adds a clock lookup entry required for the ahci core
> to retrieve a functional clock.
>
> The second enables relevant config options for all davinci boards.
>
> The third adds device tree bindings for the ahci_da850 driver.
>
> The fourth adds a workaround for a SATA controller instability we
> detected after increasing the PLL0 frequency for proper LCD
> controller support.
>
> Patches 5 through 7 extend the ahci_da850 driver - add DT support,
> un-hardcode the clock multiplier value and add a workaround for
> a quirk present on the da850 SATA controller.
>
> Patches 8-10 add the device tree changes required to probe the driver.
>
> I'm posting the series as a whole to give all reviewers the full
> picture and visibility of the changes required, if needed I can resend
> the patches separately.
>
Superseded by v2.
--
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^ permalink raw reply
* Re: [PATCH v2] ata: xgene: Enable NCQ support for APM X-Gene SATA controller hardware v1.1
From: Rameshwar Sahu @ 2017-01-17 14:55 UTC (permalink / raw)
To: Olof Johansson, Tejun Heo, Arnd Bergmann
Cc: linux-scsi, linux-ide, Devicetree List, linux-arm, mlangsdo,
Jon Masters, patches, Rameshwar Prasad Sahu
In-Reply-To: <1479462345-13942-1-git-send-email-rsahu@apm.com>
Hi Tejun,
On Fri, Nov 18, 2016 at 3:15 PM, Rameshwar Prasad Sahu <rsahu@apm.com> wrote:
> This patch enables NCQ support for APM X-Gene SATA controller hardware v1.1
> that was broken with hardware v1.0. Second thing, here we should not assume
> XGENE_AHCI_V2 always in case of having valid _CID in ACPI table. I need to
> remove this assumption because V1_1 also has a valid _CID for backward
> compatibly with v1.
>
> v2 changes:
> 1. Changed patch description
>
> Signed-off-by: Rameshwar Prasad Sahu <rsahu@apm.com>
> ---
> drivers/ata/ahci_xgene.c | 14 ++++++++------
> 1 files changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/ata/ahci_xgene.c b/drivers/ata/ahci_xgene.c
> index 73b19b2..8b88be9 100644
> --- a/drivers/ata/ahci_xgene.c
> +++ b/drivers/ata/ahci_xgene.c
> @@ -87,6 +87,7 @@
>
> enum xgene_ahci_version {
> XGENE_AHCI_V1 = 1,
> + XGENE_AHCI_V1_1,
> XGENE_AHCI_V2,
> };
>
> @@ -734,6 +735,7 @@ static struct scsi_host_template ahci_platform_sht = {
> #ifdef CONFIG_ACPI
> static const struct acpi_device_id xgene_ahci_acpi_match[] = {
> { "APMC0D0D", XGENE_AHCI_V1},
> + { "APMC0D67", XGENE_AHCI_V1_1},
> { "APMC0D32", XGENE_AHCI_V2},
> {},
> };
> @@ -742,6 +744,7 @@ MODULE_DEVICE_TABLE(acpi, xgene_ahci_acpi_match);
>
> static const struct of_device_id xgene_ahci_of_match[] = {
> {.compatible = "apm,xgene-ahci", .data = (void *) XGENE_AHCI_V1},
> + {.compatible = "apm,xgene-ahci-v1-1", .data = (void *) XGENE_AHCI_V1_1},
> {.compatible = "apm,xgene-ahci-v2", .data = (void *) XGENE_AHCI_V2},
> {},
> };
> @@ -755,8 +758,7 @@ static int xgene_ahci_probe(struct platform_device *pdev)
> struct resource *res;
> const struct of_device_id *of_devid;
> enum xgene_ahci_version version = XGENE_AHCI_V1;
> - const struct ata_port_info *ppi[] = { &xgene_ahci_v1_port_info,
> - &xgene_ahci_v2_port_info };
> + const struct ata_port_info *ppi;
> int rc;
>
> hpriv = ahci_platform_get_resources(pdev);
> @@ -821,8 +823,6 @@ static int xgene_ahci_probe(struct platform_device *pdev)
> dev_warn(&pdev->dev, "%s: Error reading device info. Assume version1\n",
> __func__);
> version = XGENE_AHCI_V1;
> - } else if (info->valid & ACPI_VALID_CID) {
> - version = XGENE_AHCI_V2;
> }
> }
> }
> @@ -858,18 +858,20 @@ skip_clk_phy:
>
> switch (version) {
> case XGENE_AHCI_V1:
> + ppi = &xgene_ahci_v1_port_info;
> hpriv->flags = AHCI_HFLAG_NO_NCQ;
> break;
> case XGENE_AHCI_V2:
> + ppi = &xgene_ahci_v2_port_info;
> hpriv->flags |= AHCI_HFLAG_YES_FBS;
> hpriv->irq_handler = xgene_ahci_irq_intr;
> break;
> default:
> + ppi = &xgene_ahci_v1_port_info;
> break;
> }
>
> - rc = ahci_platform_init_host(pdev, hpriv, ppi[version - 1],
> - &ahci_platform_sht);
> + rc = ahci_platform_init_host(pdev, hpriv, ppi, &ahci_platform_sht);
> if (rc)
> goto disable_resources;
>
> --
> 1.7.1
>
Any comments on this patch ??
^ permalink raw reply
* Re: [PATCH v2 04/14] sata: ahci-da850: get the sata clock using a connector id
From: Sergei Shtylyov @ 2017-01-17 16:02 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Sekhar Nori, Patrick Titiano,
Michael Turquette, Tejun Heo, Rob Herring, Mark Rutland,
Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel
In-Reply-To: <1484655976-25382-5-git-send-email-bgolaszewski@baylibre.com>
Hello!
On 01/17/2017 03:26 PM, Bartosz Golaszewski wrote:
> In preparation for using two clocks in the driver (the sysclk2-based
> clock and the external REFCLK), check if we got a functional clock
> after calling ahci_platform_get_resources(). If not, retry calling
> get_clk() with con_id specified.
clk_get().
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> drivers/ata/ahci_da850.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
> index 267a3d3..18f57c2 100644
> --- a/drivers/ata/ahci_da850.c
> +++ b/drivers/ata/ahci_da850.c
> @@ -71,12 +71,28 @@ static int ahci_da850_probe(struct platform_device *pdev)
> struct ahci_host_priv *hpriv;
> struct resource *res;
> void __iomem *pwrdn_reg;
> + struct clk *clk;
> int rc;
>
> hpriv = ahci_platform_get_resources(pdev);
> if (IS_ERR(hpriv))
> return PTR_ERR(hpriv);
>
> + /*
> + * Internally ahci_platform_get_resources() calls clk_get(dev, NULL)
> + * when trying to obtain the first clock. This SATA controller uses
> + * two clocks for which we specify two connector ids. If we don't
It's called connection ID, IIRC.
[...]
MBR, Sergei
^ permalink raw reply
* davinci common clock framework (was Re: [PATCH 03/10] devicetree: bindings: add bindings for ahci-da850)
From: David Lechner @ 2017-01-17 18:31 UTC (permalink / raw)
To: Sekhar Nori, Bartosz Golaszewski
Cc: Kevin Hilman, Patrick Titiano, Michael Turquette, Tejun Heo,
Rob Herring, Mark Rutland, Russell King, linux-ide,
linux-devicetree, LKML, arm-soc
In-Reply-To: <37c826cc-9804-291e-a7b2-a512b59524fd@ti.com>
On 01/17/2017 06:00 AM, Sekhar Nori wrote:
> On Tuesday 17 January 2017 12:17 AM, David Lechner wrote:
>> On 01/16/2017 08:30 AM, Bartosz Golaszewski wrote:
>>> 2017-01-16 13:45 GMT+01:00 Sekhar Nori <nsekhar@ti.com>:
>>>> On Monday 16 January 2017 03:43 PM, Bartosz Golaszewski wrote:
>>>
>>> It's true that once davinci gets ported (is this planned?) to using
>>> the common clock framework, we could just create a fixed-clock node in
>>> da850-lcdk for the SATA oscillator, so the new property is redundant.
>>>
>>
>> I have some commits[1] where I started on converting da850 to use the
>> common clock framework. But, I don't know anything about other davinci
>> family devices, so I don't think I could really take that to completion
>> without lots of help.
>
> I can help with testing, reviewing and filling in any missing
> information. But I wont have time to write the code itself.
>
>>
>> [1]: https://github.com/dlech/ev3dev-kernel/commits/wip-20160509
>
> I see that you have made a copy of the keystone PSC driver. I think you
> will need pretty strong reasons to not use the same driver with some
> customization for DaVinci.
>
It has been a while since I looked at this, but as I recall, the device
tree bindings for keystone are horrible and make no sense. So, I made
new bindings that make more sense. But since we can't break backwards
compatibility in device tree, I made a new driver rather than having the
mess of supporting two very different bindings in one driver. I don't
know if that is a strong enough reason, but that is why I did it. :-)
^ permalink raw reply
* Re: [PATCH v2 01/14] devicetree: bindings: add bindings for ahci-da850
From: David Lechner @ 2017-01-17 18:35 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Sekhar Nori, Patrick Titiano,
Michael Turquette, Tejun Heo, Rob Herring, Mark Rutland,
Russell King
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel
In-Reply-To: <1484655976-25382-2-git-send-email-bgolaszewski@baylibre.com>
On 01/17/2017 06:26 AM, Bartosz Golaszewski wrote:
> Add DT bindings for the TI DA850 AHCI SATA controller.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> Documentation/devicetree/bindings/ata/ahci-da850.txt | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/ata/ahci-da850.txt
>
> diff --git a/Documentation/devicetree/bindings/ata/ahci-da850.txt b/Documentation/devicetree/bindings/ata/ahci-da850.txt
> new file mode 100644
> index 0000000..e7111b4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/ahci-da850.txt
> @@ -0,0 +1,18 @@
> +Device tree binding for the TI DA850 AHCI SATA Controller
> +---------------------------------------------------------
> +
> +Required properties:
> + - compatible: must be "ti,da850-ahci"
> + - reg: physical base addresses and sizes of the controller's register areas
> + - interrupts: interrupt specifier (refer to the interrupt binding)
> +
> +Optional properties:
> + - clocks: clock specifier (refer to the common clock binding)
Won't you also need a clock-names property since there are two clocks?
> +
> +Example:
> +
> + sata: ahci@218000 {
> + compatible = "ti,da850-ahci";
> + reg = <0x218000 0x2000>, <0x22c018 0x4>;
> + interrupts = <67>;
> + };
>
It would be nice to have clocks and clock-names in the example as well.
^ permalink raw reply
* Re: [PATCH v2 06/14] ARM: davinci: da850: model the SATA refclk
From: David Lechner @ 2017-01-17 18:40 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Sekhar Nori, Patrick Titiano,
Michael Turquette, Tejun Heo, Rob Herring, Mark Rutland,
Russell King
Cc: linux-ide, linux-kernel, linux-arm-kernel, devicetree
In-Reply-To: <1484655976-25382-7-git-send-email-bgolaszewski@baylibre.com>
On 01/17/2017 06:26 AM, Bartosz Golaszewski wrote:
> Register a dummy clock modelling the external SATA oscillator for
> da850 DT mode. For non-DT boot we don't register the clock - instead
> we rely on the default MPY value defined in the da850 ahci driver (as
> is done currently).
Why not register a clock for non-DT boot as well?
^ permalink raw reply
* Re: [PATCH v2 11/14] sata: ahci-da850: un-hardcode the MPY bits
From: David Lechner @ 2017-01-17 18:51 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Sekhar Nori, Patrick Titiano,
Michael Turquette, Tejun Heo, Rob Herring, Mark Rutland,
Russell King
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel
In-Reply-To: <1484655976-25382-12-git-send-email-bgolaszewski@baylibre.com>
On 01/17/2017 06:26 AM, Bartosz Golaszewski wrote:
> In order to make the MPY bits configurable, try to obtain the refclk
> and calculate the required multiplier from its rate.
>
> If we fail to get the clock, fall back to the default value which
> keeps backwards compatibility.
It seems like it would be wiser to make is so that if we fail to get the
clock, it is an error. This way, if someone makes a new board and
forgets to configure a clock, they will get an error instead of
wondering why things are not working because it is using the wrong
multiplier.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> drivers/ata/ahci_da850.c | 88 +++++++++++++++++++++++++++++++++++++++++-------
> 1 file changed, 76 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
> index a7a7161..f48b7d0 100644
> --- a/drivers/ata/ahci_da850.c
> +++ b/drivers/ata/ahci_da850.c
> @@ -14,6 +14,7 @@
> #include <linux/platform_device.h>
> #include <linux/libata.h>
> #include <linux/ahci_platform.h>
> +#include <asm/div64.h>
> #include "ahci.h"
>
> #define DRV_NAME "ahci_da850"
> @@ -30,16 +31,14 @@
> #define SATA_PHY_ENPLL(x) ((x) << 31)
>
> /*
> - * The multiplier needed for 1.5GHz PLL output.
> - *
> - * NOTE: This is currently hardcoded to be suitable for 100MHz crystal
> - * frequency (which is used by DA850 EVM board) and may need to be changed
> - * if you would like to use this driver on some other board.
> + * This is the default multiplier value used if the refclk could not be
> + * obtained. It corresponds with a crystal rate of 100MHz for 1.5GHz PLL
> + * output.
> */
> -#define DA850_SATA_CLK_MULTIPLIER 7
> +#define DA850_SATA_MPY_DEFAULT 0x8
>
> static void da850_sata_init(struct device *dev, void __iomem *pwrdn_reg,
> - void __iomem *ahci_base)
> + void __iomem *ahci_base, u32 mpy)
> {
> unsigned int val;
>
> @@ -48,13 +47,56 @@ static void da850_sata_init(struct device *dev, void __iomem *pwrdn_reg,
> val &= ~BIT(0);
> writel(val, pwrdn_reg);
>
> - val = SATA_PHY_MPY(DA850_SATA_CLK_MULTIPLIER + 1) | SATA_PHY_LOS(1) |
> - SATA_PHY_RXCDR(4) | SATA_PHY_RXEQ(1) | SATA_PHY_TXSWING(3) |
> - SATA_PHY_ENPLL(1);
> + val = SATA_PHY_MPY(mpy) | SATA_PHY_LOS(1) | SATA_PHY_RXCDR(4) |
> + SATA_PHY_RXEQ(1) | SATA_PHY_TXSWING(3) | SATA_PHY_ENPLL(1);
>
> writel(val, ahci_base + SATA_P0PHYCR_REG);
> }
>
> +static u32 ahci_da850_calculate_mpy(unsigned long refclk_rate)
> +{
> + u64 pll_output = 1500000000;
> + u32 needed;
> +
> + /*
> + * We need to determine the value of the multiplier (MPY) bits.
> + *
> + * In order to include the 12.5 multiplier we need to first multiply
> + * the desired rate of 1.5GHz by 10 before division.
> + */
> + pll_output *= 10;
> + needed = __div64_32(&pll_output, refclk_rate);
What if this does not divide evenly and there is a remainder. Shouldn't
there be an error in that case?
...
^ permalink raw reply
* Re: [PATCH v2 14/14] ARM: dts: da850-lcdk: enable the SATA node
From: David Lechner @ 2017-01-17 18:53 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Sekhar Nori, Patrick Titiano,
Michael Turquette, Tejun Heo, Rob Herring, Mark Rutland,
Russell King
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel
In-Reply-To: <1484655976-25382-15-git-send-email-bgolaszewski@baylibre.com>
On 01/17/2017 06:26 AM, Bartosz Golaszewski wrote:
> Enable the SATA node for da850-lcdk. We omit the pinctrl property on
> purpose - the muxed SATA pins are not hooked up to anything
> SATA-related on the lcdk.
>
> The REFCLKN/P rate on the board is 100MHz, so we need a multiplier of
> 15 for 1.5GHz PLL rate.
The multiplier is no longer in device tree, so this comment is not
necessary.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/boot/dts/da850-lcdk.dts | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
> index afcb482..fbeee3c 100644
> --- a/arch/arm/boot/dts/da850-lcdk.dts
> +++ b/arch/arm/boot/dts/da850-lcdk.dts
> @@ -105,6 +105,10 @@
> status = "okay";
> };
>
> +&sata {
> + status = "okay";
> +};
> +
> &mdio {
> pinctrl-names = "default";
> pinctrl-0 = <&mdio_pins>;
>
^ permalink raw reply
* Re: [PATCH v2 14/14] ARM: dts: da850-lcdk: enable the SATA node
From: Kevin Hilman @ 2017-01-18 0:39 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: Sekhar Nori, Patrick Titiano, Michael Turquette, Tejun Heo,
Rob Herring, Mark Rutland, Russell King, David Lechner, linux-ide,
devicetree, linux-kernel, linux-arm-kernel
In-Reply-To: <1484655976-25382-15-git-send-email-bgolaszewski@baylibre.com>
Bartosz Golaszewski <bgolaszewski@baylibre.com> writes:
> Enable the SATA node for da850-lcdk. We omit the pinctrl property on
> purpose - the muxed SATA pins are not hooked up to anything
> SATA-related on the lcdk.
>
> The REFCLKN/P rate on the board is 100MHz, so we need a multiplier of
> 15 for 1.5GHz PLL rate.
leftover comment from previous version?
Kevin
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/boot/dts/da850-lcdk.dts | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
> index afcb482..fbeee3c 100644
> --- a/arch/arm/boot/dts/da850-lcdk.dts
> +++ b/arch/arm/boot/dts/da850-lcdk.dts
> @@ -105,6 +105,10 @@
> status = "okay";
> };
>
> +&sata {
> + status = "okay";
> +};
> +
> &mdio {
> pinctrl-names = "default";
> pinctrl-0 = <&mdio_pins>;
^ permalink raw reply
* Re: [PATCH v2 06/14] ARM: davinci: da850: model the SATA refclk
From: Sekhar Nori @ 2017-01-18 9:02 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Patrick Titiano,
Michael Turquette, Tejun Heo, Rob Herring, Mark Rutland,
Russell King, David Lechner
Cc: linux-ide, linux-kernel, linux-arm-kernel, devicetree
In-Reply-To: <1484655976-25382-7-git-send-email-bgolaszewski@baylibre.com>
On Tuesday 17 January 2017 05:56 PM, Bartosz Golaszewski wrote:
> Register a dummy clock modelling the external SATA oscillator for
I would not call it a dummy clock. Its representing something physically
present. Just call it "fixed rate clock" ?
> da850 DT mode. For non-DT boot we don't register the clock - instead
> we rely on the default MPY value defined in the da850 ahci driver (as
> is done currently).
Here too, like David suggested, it will be nice to register it both for
DT and non-DT case. With that I think your driver will be simple too
since you dont have to worry about the case when refclkpn is not supplied.
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/da8xx-dt.c | 8 ++++++++
> arch/arm/mach-davinci/devices-da8xx.c | 23 +++++++++++++++++++++++
> arch/arm/mach-davinci/include/mach/da8xx.h | 1 +
> 3 files changed, 32 insertions(+)
>
> diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
> index b83e5d1..13137cb 100644
> --- a/arch/arm/mach-davinci/da8xx-dt.c
> +++ b/arch/arm/mach-davinci/da8xx-dt.c
> @@ -61,6 +61,14 @@ static void __init da850_init_machine(void)
> pr_warn("%s: registering USB 1.1 PHY clock failed: %d",
> __func__, ret);
>
> + if (of_machine_is_compatible("ti,da850-evm") ||
> + of_machine_is_compatible("ti,da850-lcdk")) {
> + ret = da850_register_sata_refclk(100000000);
> + if (ret)
> + pr_warn("%s: registering SATA_REFCLK clock failed: %d",
> + __func__, ret);
> + }
Since all supported boards use 100 Mhz refclk anyway, I would drop the
machine check and just do:
/* All existing boards use 100MHz SATA refclkpn */
unsigned long sata_refclkpn = 100 * 1000 * 1000;
ret = da850_register_sata_refclk(sata_refclkpn);
It should then be easy for the odd board (when it comes) to set
sata_refclkpn to a different value.
Thanks,
Sekhar
^ permalink raw reply
* Re: [PATCH v2 01/14] devicetree: bindings: add bindings for ahci-da850
From: Sekhar Nori @ 2017-01-18 9:05 UTC (permalink / raw)
To: David Lechner, Bartosz Golaszewski, Kevin Hilman, Patrick Titiano,
Michael Turquette, Tejun Heo, Rob Herring, Mark Rutland,
Russell King
Cc: linux-ide, linux-kernel, linux-arm-kernel, devicetree
In-Reply-To: <7e3c8946-2a19-3e11-c071-b3737554005c@lechnology.com>
On Wednesday 18 January 2017 12:05 AM, David Lechner wrote:
> On 01/17/2017 06:26 AM, Bartosz Golaszewski wrote:
>> Add DT bindings for the TI DA850 AHCI SATA controller.
>>
>> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>> ---
>> Documentation/devicetree/bindings/ata/ahci-da850.txt | 18
>> ++++++++++++++++++
>> 1 file changed, 18 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/ata/ahci-da850.txt
>>
>> diff --git a/Documentation/devicetree/bindings/ata/ahci-da850.txt
>> b/Documentation/devicetree/bindings/ata/ahci-da850.txt
>> new file mode 100644
>> index 0000000..e7111b4
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/ata/ahci-da850.txt
>> @@ -0,0 +1,18 @@
>> +Device tree binding for the TI DA850 AHCI SATA Controller
>> +---------------------------------------------------------
>> +
>> +Required properties:
>> + - compatible: must be "ti,da850-ahci"
>> + - reg: physical base addresses and sizes of the controller's
>> register areas
>> + - interrupts: interrupt specifier (refer to the interrupt binding)
>> +
>> +Optional properties:
>> + - clocks: clock specifier (refer to the common clock binding)
>
> Won't you also need a clock-names property since there are two clocks?
>
>> +
>> +Example:
>> +
>> + sata: ahci@218000 {
>> + compatible = "ti,da850-ahci";
>> + reg = <0x218000 0x2000>, <0x22c018 0x4>;
>> + interrupts = <67>;
>> + };
>>
>
> It would be nice to have clocks and clock-names in the example as well.
Well, we don't use the common clock binding today. Is it really
necessary to add them now. Thats basically going to remain completely
untested.
I would drop the mention of clocks specification as an optional property
too.
Thanks,
Sekhar
^ permalink raw reply
* Re: [PATCH v2 12/14] ARM: dts: da850: add pinmux settings for the SATA controller
From: Sekhar Nori @ 2017-01-18 9:39 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Patrick Titiano,
Michael Turquette, Tejun Heo, Rob Herring, Mark Rutland,
Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel
In-Reply-To: <1484655976-25382-13-git-send-email-bgolaszewski@baylibre.com>
Hi Bartosz,
On Tuesday 17 January 2017 05:56 PM, Bartosz Golaszewski wrote:
> Add pinmux sub-nodes for all muxed SATA pins.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Since these are all unused at this time, we should drop adding them
until a time someone really needs these.
Thanks,
Sekhar
^ permalink raw reply
* Geschäftsvorschlag
From: tester @ 2017-01-14 23:22 UTC (permalink / raw)
To: Recipients
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Mit freundlichen Grüßen.
^ permalink raw reply
* [PATCH v3 00/13] ARM: da850-lcdk: add SATA support
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Bartosz Golaszewski
This series contains all the changes necessary to make SATA work on
the da850-lcdk board.
The first patch adds DT bindings for the ahci-da850 driver.
The second enables relevant modules in davinci_all_defconfig.
Patches 03/14-06/14 modify the way the clocks are handled regarding
SATA on the da850 platform. We modify the ahci driver to retrieve
the clock via con_id and model the external SATA oscillator as
a real clock.
Patches 07/14-11/14 extend the ahci-da850 driver. Add DT support,
implement workarounds necessary to make SATA work on the da850-lcdk
board and un-hardcode the external clock multiplier.
Last two patches add device tree changes required to probe the
driver.
v1 -> v2:
- dropped patch 04/10 - replaced with local changes in the
ahci-da850 driver
- added comments explaining the workaround in ahci softreset
- s/0x218000/218000 in the sata DT node label
- added patches chaning the way clocks are handled in the da850 SATA
code both in arch/ and in the ahci driver
- dropped the clock multiplier property in the DT bindings in favor
of using struct clk to pass the refclk rate to the driver
- minor tweaks in commit messages
v2 -> v3:
- dropped the clocks property from the ahci-da850 DT binding
- dropped patch 12/14 (SATA pinmux settings)
- dropped an outdated fragment from the commit message in patch 14/14
- s/get_clk()/clk_get()/
- s/connector id/connection id/
- stopped using __div64_32() after noticing that it sometimes produces
invalid results
- removed the default MPY value from ahci-da850
- registered SATA refclk for board file boot mode as well
Bartosz Golaszewski (13):
devicetree: bindings: add bindings for ahci-da850
ARM: davinci_all_defconfig: enable SATA modules
ARM: davinci: add a clock lookup entry for the SATA clock
sata: ahci-da850: get the sata clock using a connection id
ARM: davinci: da850: add con_id for the SATA clock
ARM: davinci: da850: model the SATA refclk
sata: ahci-da850: add device tree match table
sata: ahci-da850: implement a workaround for the softreset quirk
sata: ahci: export ahci_do_hardreset() locally
sata: ahci-da850: add a workaround for controller instability
sata: ahci-da850: un-hardcode the MPY bits
ARM: dts: da850: add the SATA node
ARM: dts: da850-lcdk: enable the SATA node
.../devicetree/bindings/ata/ahci-da850.txt | 15 ++
arch/arm/boot/dts/da850-lcdk.dts | 4 +
arch/arm/boot/dts/da850.dtsi | 6 +
arch/arm/configs/davinci_all_defconfig | 2 +
arch/arm/mach-davinci/da850.c | 2 +-
arch/arm/mach-davinci/da8xx-dt.c | 9 ++
arch/arm/mach-davinci/devices-da8xx.c | 29 ++++
arch/arm/mach-davinci/include/mach/da8xx.h | 1 +
drivers/ata/ahci.h | 3 +
drivers/ata/ahci_da850.c | 175 +++++++++++++++++++--
drivers/ata/libahci.c | 18 ++-
11 files changed, 241 insertions(+), 23 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ata/ahci-da850.txt
--
2.9.3
--
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^ permalink raw reply
* [PATCH v3 01/13] devicetree: bindings: add bindings for ahci-da850
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
Add DT bindings for the TI DA850 AHCI SATA controller.
Signed-off-by: Bartosz Golaszewski <bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
---
Documentation/devicetree/bindings/ata/ahci-da850.txt | 15 +++++++++++++++
1 file changed, 15 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ata/ahci-da850.txt
diff --git a/Documentation/devicetree/bindings/ata/ahci-da850.txt b/Documentation/devicetree/bindings/ata/ahci-da850.txt
new file mode 100644
index 0000000..fd90662
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/ahci-da850.txt
@@ -0,0 +1,15 @@
+Device tree binding for the TI DA850 AHCI SATA Controller
+---------------------------------------------------------
+
+Required properties:
+ - compatible: must be "ti,da850-ahci"
+ - reg: physical base addresses and sizes of the controller's register areas
+ - interrupts: interrupt specifier (refer to the interrupt binding)
+
+Example:
+
+ sata: ahci@218000 {
+ compatible = "ti,da850-ahci";
+ reg = <0x218000 0x2000>, <0x22c018 0x4>;
+ interrupts = <67>;
+ };
--
2.9.3
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH v3 02/13] ARM: davinci_all_defconfig: enable SATA modules
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
Add the da850-ahci driver to davinci defconfig.
Signed-off-by: Bartosz Golaszewski <bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
---
arch/arm/configs/davinci_all_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index 8806754..a1b9c58 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -78,6 +78,8 @@ CONFIG_IDE=m
CONFIG_BLK_DEV_PALMCHIP_BK3710=m
CONFIG_SCSI=m
CONFIG_BLK_DEV_SD=m
+CONFIG_ATA=m
+CONFIG_AHCI_DA850=m
CONFIG_NETDEVICES=y
CONFIG_NETCONSOLE=y
CONFIG_TUN=m
--
2.9.3
--
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^ permalink raw reply related
* [PATCH v3 04/13] sata: ahci-da850: get the sata clock using a connection id
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>
In preparation for using two clocks in the driver (the sysclk2-based
clock and the external REFCLK), check if we got a functional clock
after calling ahci_platform_get_resources(). If not, retry calling
clk_get() with con_id specified.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
drivers/ata/ahci_da850.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
index 267a3d3..8cfdc86 100644
--- a/drivers/ata/ahci_da850.c
+++ b/drivers/ata/ahci_da850.c
@@ -71,12 +71,28 @@ static int ahci_da850_probe(struct platform_device *pdev)
struct ahci_host_priv *hpriv;
struct resource *res;
void __iomem *pwrdn_reg;
+ struct clk *clk;
int rc;
hpriv = ahci_platform_get_resources(pdev);
if (IS_ERR(hpriv))
return PTR_ERR(hpriv);
+ /*
+ * Internally ahci_platform_get_resources() calls clk_get(dev, NULL)
+ * when trying to obtain the first clock. This SATA controller uses
+ * two clocks for which we specify two connection ids. If we don't
+ * have a clock at this point - call clk_get() again with
+ * con_id = "sata".
+ */
+ if (!hpriv->clks[0]) {
+ clk = clk_get(dev, "sata");
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ hpriv->clks[0] = clk;
+ }
+
rc = ahci_platform_enable_resources(hpriv);
if (rc)
return rc;
--
2.9.3
^ permalink raw reply related
* [PATCH v3 05/13] ARM: davinci: da850: add con_id for the SATA clock
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>
The ahci-da850 SATA driver is now capable of retrieving clocks by
con_id. Add the connection id for the sysclk2-derived SATA clock.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/da850.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 1d873d1..dbf1daa 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -571,7 +571,7 @@ static struct clk_lookup da850_clks[] = {
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
CLK("vpif", NULL, &vpif_clk),
- CLK("ahci_da850", NULL, &sata_clk),
+ CLK("ahci_da850", "sata", &sata_clk),
CLK("davinci-rproc.0", NULL, &dsp_clk),
CLK(NULL, NULL, &ehrpwm_clk),
CLK("ehrpwm.0", "fck", &ehrpwm0_clk),
--
2.9.3
^ permalink raw reply related
* [PATCH v3 06/13] ARM: davinci: da850: model the SATA refclk
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>
Register a dummy clock modelling the external SATA oscillator for
da850 (both DT and board file mode).
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/da8xx-dt.c | 8 ++++++++
arch/arm/mach-davinci/devices-da8xx.c | 29 +++++++++++++++++++++++++++++
arch/arm/mach-davinci/include/mach/da8xx.h | 1 +
3 files changed, 38 insertions(+)
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index b83e5d1..0f981b5 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -50,6 +50,9 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
static void __init da850_init_machine(void)
{
+ /* All existing boards use 100MHz SATA refclkpn */
+ static const unsigned long sata_refclkpn = 100 * 1000 * 1000;
+
int ret;
ret = da8xx_register_usb20_phy_clk(false);
@@ -61,6 +64,11 @@ static void __init da850_init_machine(void)
pr_warn("%s: registering USB 1.1 PHY clock failed: %d",
__func__, ret);
+ ret = da850_register_sata_refclk(sata_refclkpn);
+ if (ret)
+ pr_warn("%s: registering SATA REFCLK failed: %d",
+ __func__, ret);
+
of_platform_default_populate(NULL, da850_auxdata_lookup, NULL);
davinci_pm_init();
}
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index c2457b3..cfceb32 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -24,6 +24,7 @@
#include <mach/common.h>
#include <mach/time.h>
#include <mach/da8xx.h>
+#include <mach/clock.h>
#include "cpuidle.h"
#include "sram.h"
@@ -1023,6 +1024,28 @@ int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
}
#ifdef CONFIG_ARCH_DAVINCI_DA850
+static struct clk sata_refclk = {
+ .name = "sata_refclk",
+ .set_rate = davinci_simple_set_rate,
+};
+
+static struct clk_lookup sata_refclk_lookup =
+ CLK("ahci_da850", "refclk", &sata_refclk);
+
+int __init da850_register_sata_refclk(int rate)
+{
+ int ret;
+
+ sata_refclk.rate = rate;
+ ret = clk_register(&sata_refclk);
+ if (ret)
+ return ret;
+
+ clkdev_add(&sata_refclk_lookup);
+
+ return 0;
+}
+
static struct resource da850_sata_resources[] = {
{
.start = DA850_SATA_BASE,
@@ -1055,9 +1078,15 @@ static struct platform_device da850_sata_device = {
int __init da850_register_sata(unsigned long refclkpn)
{
+ int ret;
+
/* please see comment in drivers/ata/ahci_da850.c */
BUG_ON(refclkpn != 100 * 1000 * 1000);
+ ret = da850_register_sata_refclk(refclkpn);
+ if (ret)
+ return ret;
+
return platform_device_register(&da850_sata_device);
}
#endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 85ff218..7e46422 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -95,6 +95,7 @@ int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
int da8xx_register_usb_refclkin(int rate);
int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
+int da850_register_sata_refclk(int rate);
int da8xx_register_emac(void);
int da8xx_register_uio_pruss(void);
int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
--
2.9.3
^ permalink raw reply related
* [PATCH v3 08/13] sata: ahci-da850: implement a workaround for the softreset quirk
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>
There's an issue with the da850 SATA controller: if port multiplier
support is compiled in, but we're connecting the drive directly to
the SATA port on the board, the drive can't be detected.
To make SATA work on the da850-lcdk board: first try to softreset
with pmp - if the operation fails with -EBUSY, retry without pmp.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
drivers/ata/ahci_da850.c | 33 ++++++++++++++++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
index 7f5328f..11dd87e 100644
--- a/drivers/ata/ahci_da850.c
+++ b/drivers/ata/ahci_da850.c
@@ -54,11 +54,42 @@ static void da850_sata_init(struct device *dev, void __iomem *pwrdn_reg,
writel(val, ahci_base + SATA_P0PHYCR_REG);
}
+static int ahci_da850_softreset(struct ata_link *link,
+ unsigned int *class, unsigned long deadline)
+{
+ int pmp, ret;
+
+ pmp = sata_srst_pmp(link);
+
+ /*
+ * There's an issue with the SATA controller on da850 SoCs: if we
+ * enable Port Multiplier support, but the drive is connected directly
+ * to the board, it can't be detected. As a workaround: if PMP is
+ * enabled, we first call ahci_do_softreset() and pass it the result of
+ * sata_srst_pmp(). If this call fails, we retry with pmp = 0.
+ */
+ ret = ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready);
+ if (pmp && ret == -EBUSY)
+ return ahci_do_softreset(link, class, 0,
+ deadline, ahci_check_ready);
+
+ return ret;
+}
+
+static struct ata_port_operations ahci_da850_port_ops = {
+ .inherits = &ahci_platform_ops,
+ .softreset = ahci_da850_softreset,
+ /*
+ * No need to override .pmp_softreset - it's only used for actual
+ * PMP-enabled ports.
+ */
+};
+
static const struct ata_port_info ahci_da850_port_info = {
.flags = AHCI_FLAG_COMMON,
.pio_mask = ATA_PIO4,
.udma_mask = ATA_UDMA6,
- .port_ops = &ahci_platform_ops,
+ .port_ops = &ahci_da850_port_ops,
};
static struct scsi_host_template ahci_platform_sht = {
--
2.9.3
^ permalink raw reply related
* [PATCH v3 09/13] sata: ahci: export ahci_do_hardreset() locally
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>
We need a way to retrieve the information about the online state of
the link in the ahci-da850 driver.
Create a new function: ahci_do_hardreset() which is called from
ahci_hardreset() for backwards compatibility, but has an additional
argument: 'online' - which can be used to check if the link is online
after this function returns.
The new routine will be used in the ahci-da850 driver to avoid code
duplication when implementing a workaround for tha da850 SATA
controller quirk/instability.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
drivers/ata/ahci.h | 3 +++
drivers/ata/libahci.c | 18 +++++++++++++-----
2 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 0cc08f8..5db6ab2 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -398,6 +398,9 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class,
int pmp, unsigned long deadline,
int (*check_ready)(struct ata_link *link));
+int ahci_do_hardreset(struct ata_link *link, unsigned int *class,
+ unsigned long deadline, bool *online);
+
unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
int ahci_stop_engine(struct ata_port *ap);
void ahci_start_fis_rx(struct ata_port *ap);
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
index ee7db31..3159f9e 100644
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -1519,8 +1519,8 @@ static int ahci_pmp_retry_softreset(struct ata_link *link, unsigned int *class,
return rc;
}
-static int ahci_hardreset(struct ata_link *link, unsigned int *class,
- unsigned long deadline)
+int ahci_do_hardreset(struct ata_link *link, unsigned int *class,
+ unsigned long deadline, bool *online)
{
const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
struct ata_port *ap = link->ap;
@@ -1528,7 +1528,6 @@ static int ahci_hardreset(struct ata_link *link, unsigned int *class,
struct ahci_host_priv *hpriv = ap->host->private_data;
u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
struct ata_taskfile tf;
- bool online;
int rc;
DPRINTK("ENTER\n");
@@ -1540,17 +1539,26 @@ static int ahci_hardreset(struct ata_link *link, unsigned int *class,
tf.command = ATA_BUSY;
ata_tf_to_fis(&tf, 0, 0, d2h_fis);
- rc = sata_link_hardreset(link, timing, deadline, &online,
+ rc = sata_link_hardreset(link, timing, deadline, online,
ahci_check_ready);
hpriv->start_engine(ap);
- if (online)
+ if (*online)
*class = ahci_dev_classify(ap);
DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
return rc;
}
+EXPORT_SYMBOL_GPL(ahci_do_hardreset);
+
+static int ahci_hardreset(struct ata_link *link, unsigned int *class,
+ unsigned long deadline)
+{
+ bool online;
+
+ return ahci_do_hardreset(link, class, deadline, &online);
+}
static void ahci_postreset(struct ata_link *link, unsigned int *class)
{
--
2.9.3
^ permalink raw reply related
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