* [PATCH v4 05/14] ARM: davinci: da850: add con_id for the SATA clock
From: Bartosz Golaszewski @ 2017-01-19 13:29 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484832588-18413-1-git-send-email-bgolaszewski@baylibre.com>
The ahci-da850 SATA driver is now capable of retrieving clocks by
con_id. Add the connection id for the sysclk2-derived SATA clock.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/da850.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 1d873d1..dbf1daa 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -571,7 +571,7 @@ static struct clk_lookup da850_clks[] = {
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
CLK("vpif", NULL, &vpif_clk),
- CLK("ahci_da850", NULL, &sata_clk),
+ CLK("ahci_da850", "sata", &sata_clk),
CLK("davinci-rproc.0", NULL, &dsp_clk),
CLK(NULL, NULL, &ehrpwm_clk),
CLK("ehrpwm.0", "fck", &ehrpwm0_clk),
--
2.9.3
^ permalink raw reply related
* [PATCH v4 04/14] sata: ahci-da850: get the sata clock using a connection id
From: Bartosz Golaszewski @ 2017-01-19 13:29 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, Bartosz Golaszewski, linux-kernel, linux-arm-kernel,
devicetree
In-Reply-To: <1484832588-18413-1-git-send-email-bgolaszewski@baylibre.com>
In preparation for using two clocks in the driver (the sysclk2-based
clock and the external REFCLK), check if we got a functional clock
after calling ahci_platform_get_resources(). If not, retry calling
clk_get() with con_id specified.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
drivers/ata/ahci_da850.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
index 267a3d3..8cfdc86 100644
--- a/drivers/ata/ahci_da850.c
+++ b/drivers/ata/ahci_da850.c
@@ -71,12 +71,28 @@ static int ahci_da850_probe(struct platform_device *pdev)
struct ahci_host_priv *hpriv;
struct resource *res;
void __iomem *pwrdn_reg;
+ struct clk *clk;
int rc;
hpriv = ahci_platform_get_resources(pdev);
if (IS_ERR(hpriv))
return PTR_ERR(hpriv);
+ /*
+ * Internally ahci_platform_get_resources() calls clk_get(dev, NULL)
+ * when trying to obtain the first clock. This SATA controller uses
+ * two clocks for which we specify two connection ids. If we don't
+ * have a clock at this point - call clk_get() again with
+ * con_id = "sata".
+ */
+ if (!hpriv->clks[0]) {
+ clk = clk_get(dev, "sata");
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ hpriv->clks[0] = clk;
+ }
+
rc = ahci_platform_enable_resources(hpriv);
if (rc)
return rc;
--
2.9.3
^ permalink raw reply related
* [PATCH v4 03/14] ARM: davinci: add a clock lookup entry for the SATA clock
From: Bartosz Golaszewski @ 2017-01-19 13:29 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484832588-18413-1-git-send-email-bgolaszewski@baylibre.com>
This entry is needed for the ahci driver to get a functional clock.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/da8xx-dt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 9ee44da..b83e5d1 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -42,6 +42,7 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("ti,da830-ohci", 0x01e25000, "ohci-da8xx", NULL),
OF_DEV_AUXDATA("ti,da830-musb", 0x01e00000, "musb-da8xx", NULL),
OF_DEV_AUXDATA("ti,da830-usb-phy", 0x01c1417c, "da8xx-usb-phy", NULL),
+ OF_DEV_AUXDATA("ti,da850-ahci", 0x01e18000, "ahci_da850", NULL),
{}
};
--
2.9.3
^ permalink raw reply related
* [PATCH v4 02/14] ARM: davinci_all_defconfig: enable SATA modules
From: Bartosz Golaszewski @ 2017-01-19 13:29 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, Bartosz Golaszewski, linux-kernel, linux-arm-kernel,
devicetree
In-Reply-To: <1484832588-18413-1-git-send-email-bgolaszewski@baylibre.com>
Add the da850-ahci driver to davinci defconfig.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/configs/davinci_all_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index 8806754..a1b9c58 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -78,6 +78,8 @@ CONFIG_IDE=m
CONFIG_BLK_DEV_PALMCHIP_BK3710=m
CONFIG_SCSI=m
CONFIG_BLK_DEV_SD=m
+CONFIG_ATA=m
+CONFIG_AHCI_DA850=m
CONFIG_NETDEVICES=y
CONFIG_NETCONSOLE=y
CONFIG_TUN=m
--
2.9.3
^ permalink raw reply related
* [PATCH v4 01/14] devicetree: bindings: add bindings for ahci-da850
From: Bartosz Golaszewski @ 2017-01-19 13:29 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, Bartosz Golaszewski, linux-kernel, linux-arm-kernel,
devicetree
In-Reply-To: <1484832588-18413-1-git-send-email-bgolaszewski@baylibre.com>
Add DT bindings for the TI DA850 AHCI SATA controller.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
Documentation/devicetree/bindings/ata/ahci-da850.txt | 15 +++++++++++++++
1 file changed, 15 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ata/ahci-da850.txt
diff --git a/Documentation/devicetree/bindings/ata/ahci-da850.txt b/Documentation/devicetree/bindings/ata/ahci-da850.txt
new file mode 100644
index 0000000..fd90662
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/ahci-da850.txt
@@ -0,0 +1,15 @@
+Device tree binding for the TI DA850 AHCI SATA Controller
+---------------------------------------------------------
+
+Required properties:
+ - compatible: must be "ti,da850-ahci"
+ - reg: physical base addresses and sizes of the controller's register areas
+ - interrupts: interrupt specifier (refer to the interrupt binding)
+
+Example:
+
+ sata: ahci@218000 {
+ compatible = "ti,da850-ahci";
+ reg = <0x218000 0x2000>, <0x22c018 0x4>;
+ interrupts = <67>;
+ };
--
2.9.3
^ permalink raw reply related
* [PATCH v4 00/14] ARM: da850-lcdk: add SATA support
From: Bartosz Golaszewski @ 2017-01-19 13:29 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, Bartosz Golaszewski, linux-kernel, linux-arm-kernel,
devicetree
This series contains all the changes necessary to make SATA work on
the da850-lcdk board.
The first patch adds DT bindings for the ahci-da850 driver.
The second enables relevant modules in davinci_all_defconfig.
Patches 03/14-06/14 modify the way the clocks are handled regarding
SATA on the da850 platform. We modify the ahci driver to retrieve
the clock via con_id and model the external SATA oscillator as
a real clock.
Patches 07/14-11/14 extend the ahci-da850 driver. Add DT support,
implement workarounds necessary to make SATA work on the da850-lcdk
board and un-hardcode the external clock multiplier.
Last two patches add device tree changes required to probe the
driver.
v1 -> v2:
- dropped patch 04/10 - replaced with local changes in the
ahci-da850 driver
- added comments explaining the workaround in ahci softreset
- s/0x218000/218000 in the sata DT node label
- added patches chaning the way clocks are handled in the da850 SATA
code both in arch/ and in the ahci driver
- dropped the clock multiplier property in the DT bindings in favor
of using struct clk to pass the refclk rate to the driver
- minor tweaks in commit messages
v2 -> v3:
- dropped the clocks property from the ahci-da850 DT binding
- dropped patch 12/14 (SATA pinmux settings)
- dropped an outdated fragment from the commit message in patch 14/14
- s/get_clk()/clk_get()/
- s/connector id/connection id/
- stopped using __div64_32() after noticing that it sometimes produces
invalid results
- removed the default MPY value from ahci-da850
- registered SATA refclk for board file boot mode as well
v3 -> v4:
- added a patch removing the no longer needed BUG_ON() from
da850_register_sata()
- fixed indents
Bartosz Golaszewski (14):
devicetree: bindings: add bindings for ahci-da850
ARM: davinci_all_defconfig: enable SATA modules
ARM: davinci: add a clock lookup entry for the SATA clock
sata: ahci-da850: get the sata clock using a connection id
ARM: davinci: da850: add con_id for the SATA clock
ARM: davinci: da850: model the SATA refclk
sata: ahci-da850: add device tree match table
sata: ahci-da850: implement a workaround for the softreset quirk
sata: ahci: export ahci_do_hardreset() locally
sata: ahci-da850: add a workaround for controller instability
sata: ahci-da850: un-hardcode the MPY bits
ARM: dts: da850: add the SATA node
ARM: dts: da850-lcdk: enable the SATA node
ARM: davinci: remove BUG_ON() from da850_register_sata()
.../devicetree/bindings/ata/ahci-da850.txt | 15 ++
arch/arm/boot/dts/da850-lcdk.dts | 4 +
arch/arm/boot/dts/da850.dtsi | 6 +
arch/arm/configs/davinci_all_defconfig | 2 +
arch/arm/mach-davinci/da850.c | 2 +-
arch/arm/mach-davinci/da8xx-dt.c | 9 ++
arch/arm/mach-davinci/devices-da8xx.c | 30 +++-
arch/arm/mach-davinci/include/mach/da8xx.h | 1 +
drivers/ata/ahci.h | 3 +
drivers/ata/ahci_da850.c | 175 +++++++++++++++++++--
drivers/ata/libahci.c | 18 ++-
11 files changed, 240 insertions(+), 25 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ata/ahci-da850.txt
--
2.9.3
^ permalink raw reply
* Re: [PATCH v3 09/13] sata: ahci: export ahci_do_hardreset() locally
From: Tejun Heo @ 2017-01-19 12:52 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Rob Herring, Mark Rutland, Russell King, David Lechner,
linux-ide-u79uwXL29TY76Z2rM5mHXA, linux-devicetree, LKML, arm-soc
In-Reply-To: <CAMpxmJULuF3cB7+Vy_qeWkTjooHvx8yk70w59Q=XNd0aAREcuw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On Thu, Jan 19, 2017 at 11:55:24AM +0100, Bartosz Golaszewski wrote:
> 2017-01-18 19:28 GMT+01:00 Tejun Heo <tj-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>:
> > Hello, Bartosz.
> >
> > On Wed, Jan 18, 2017 at 02:19:57PM +0100, Bartosz Golaszewski wrote:
> >> We need a way to retrieve the information about the online state of
> >> the link in the ahci-da850 driver.
> >>
> >> Create a new function: ahci_do_hardreset() which is called from
> >> ahci_hardreset() for backwards compatibility, but has an additional
> >> argument: 'online' - which can be used to check if the link is online
> >> after this function returns.
> >
> > Please just add @online to ahci_hardreset() and update the callers.
> > Other than that, the sata changes look good to me.
> >
>
> Are you sure? There are 23 places in drivers/ata/ where the .hardreset
> callback is assigned. I'd prefer not to change the drivers I can't
> test. Besides all other **reset callbacks take three arguments -
> should we really only change one of them for a single driver's needs?
Ah, didn't realize this was the callback, sorry. What you did is
perfect. Please disregard my comment.
Thanks.
--
tejun
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^ permalink raw reply
* Re: [PATCH v3 06/13] ARM: davinci: da850: model the SATA refclk
From: Bartosz Golaszewski @ 2017-01-19 11:18 UTC (permalink / raw)
To: David Lechner
Cc: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, linux-ide,
linux-devicetree, LKML, arm-soc
In-Reply-To: <ff4deee6-9700-fff3-be96-0ad2f008914b@lechnology.com>
2017-01-18 18:26 GMT+01:00 David Lechner <david@lechnology.com>:
> On 01/18/2017 07:19 AM, Bartosz Golaszewski wrote:
>>
>> int __init da850_register_sata(unsigned long refclkpn)
>> {
>> + int ret;
>> +
>> /* please see comment in drivers/ata/ahci_da850.c */
>> BUG_ON(refclkpn != 100 * 1000 * 1000);
>
>
> This BUG_ON() should be removed since the sata driver can now handle other
> clock frequencies.
>
Right, will fix in v4.
Thanks,
Bartosz Golaszewski
^ permalink raw reply
* Re: [PATCH v3 09/13] sata: ahci: export ahci_do_hardreset() locally
From: Bartosz Golaszewski @ 2017-01-19 10:55 UTC (permalink / raw)
To: Tejun Heo
Cc: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Rob Herring, Mark Rutland, Russell King, David Lechner,
linux-ide-u79uwXL29TY76Z2rM5mHXA, linux-devicetree, LKML, arm-soc
In-Reply-To: <20170118182826.GA1451-qYNAdHglDFBN0TnZuCh8vA@public.gmane.org>
2017-01-18 19:28 GMT+01:00 Tejun Heo <tj-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>:
> Hello, Bartosz.
>
> On Wed, Jan 18, 2017 at 02:19:57PM +0100, Bartosz Golaszewski wrote:
>> We need a way to retrieve the information about the online state of
>> the link in the ahci-da850 driver.
>>
>> Create a new function: ahci_do_hardreset() which is called from
>> ahci_hardreset() for backwards compatibility, but has an additional
>> argument: 'online' - which can be used to check if the link is online
>> after this function returns.
>
> Please just add @online to ahci_hardreset() and update the callers.
> Other than that, the sata changes look good to me.
>
Are you sure? There are 23 places in drivers/ata/ where the .hardreset
callback is assigned. I'd prefer not to change the drivers I can't
test. Besides all other **reset callbacks take three arguments -
should we really only change one of them for a single driver's needs?
Thanks,
Bartosz
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^ permalink raw reply
* linux-next 20170117 - lockdep whines and BUGs in ata_scsi_rbuf_fill()
From: valdis.kletnieks @ 2017-01-19 7:28 UTC (permalink / raw)
To: Tejun Heo, Christoph Hellwig; +Cc: linux-ide, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 8948 bytes --]
linux-next 20170110 didn't exhibit this.
Am seeing at boot a lockdep whine, followed by 3 BUGs. ata_scsi_rbuf_fill() is
in the traceback for all of them. 'git log' hints that it's one of 6 commits
against drivers/ata/libata-scsi.c by Christoph, but none of them spring out
as being the guilty party. This ring any bells, or should I start
cherrypicking reverts and bisecting?
(-dirty due to a local patch to net/ipv6/addrconf.c for a VPN issue)
Lockdep:
[ 3.359133] =================================
[ 3.359162] [ INFO: inconsistent lock state ]
[ 3.359192] 4.10.0-rc4-next-20170117-dirty #375 Not tainted
[ 3.359229] ---------------------------------
[ 3.359258] inconsistent {IN-HARDIRQ-W} -> {HARDIRQ-ON-W} usage.
[ 3.359299] kworker/u8:0/5 [HC0[0]:SC0[0]:HE1:SE1] takes:
[ 3.359334] (&(&host->lock)->rlock){?.....}, at: [<ffffffffa99f4e4f>] ata_scsi_queuecmd+0x4f/0x420
[ 3.359398] {IN-HARDIRQ-W} state was registered at:
[ 3.359431]
[ 3.359434] [<ffffffffa915cc66>] __lock_acquire+0x636/0x18b0
[ 3.359484]
[ 3.359486] [<ffffffffa915e4d9>] lock_acquire+0x119/0x2d0
[ 3.359533]
[ 3.359535] [<ffffffffaa1baf01>] _raw_spin_lock+0x41/0x80
[ 3.359582]
[ 3.359584] [<ffffffffa9a0be14>] ahci_single_level_irq_intr+0x44/0x90
[ 3.359638]
[ 3.359640] [<ffffffffa91710f7>] __handle_irq_event_percpu+0x127/0x690
[ 3.359694]
[ 3.359696] [<ffffffffa9171694>] handle_irq_event_percpu+0x34/0xb0
[ 3.359747]
[ 3.359749] [<ffffffffa917175b>] handle_irq_event+0x4b/0xc0
[ 3.359797]
[ 3.359799] [<ffffffffa9177725>] handle_edge_irq+0xb5/0x3d0
[ 3.359847]
[ 3.359849] [<ffffffffa90396d6>] handle_irq+0xa6/0x2c0
[ 3.359895]
[ 3.359897] [<ffffffffaa1be4f3>] do_IRQ+0x83/0x1b0
[ 3.359940]
[ 3.359942] [<ffffffffaa1bc8d0>] ret_from_intr+0x0/0x19
[ 3.359989]
[ 3.359992] [<ffffffffa9bb87c4>] cpuidle_enter_state+0xe4/0x660
[ 3.360043]
[ 3.360045] [<ffffffffa9bb8d97>] cpuidle_enter+0x17/0x20
[ 3.360092]
[ 3.360095] [<ffffffffa9147757>] do_idle+0x2f7/0x3d0
[ 3.360139]
[ 3.360142] [<ffffffffa9147f5c>] cpu_startup_entry+0x7c/0x90
[ 3.360190]
[ 3.360193] [<ffffffffaa1a959c>] rest_init+0x15c/0x170
[ 3.360239]
[ 3.360242] [<ffffffffab63a734>] start_kernel+0x747/0x788
[ 3.360288]
[ 3.360291] [<ffffffffab6383b8>] x86_64_start_reservations+0x4f/0x70
[ 3.360344]
[ 3.360346] [<ffffffffab63871d>] x86_64_start_kernel+0x344/0x38b
[ 3.360397]
[ 3.360400] [<ffffffffa90001c4>] verify_cpu+0x0/0xf1
[ 3.360445] irq event stamp: 160102
[ 3.360470] hardirqs last enabled at (160101): [<ffffffffaa1bb47e>] _raw_spin_unlock_irq+0x2e/0x80
[ 3.360529] hardirqs last disabled at (160102): [<ffffffffaa1bb15e>] _raw_spin_lock_irqsave+0x1e/0x90
[ 3.360589] softirqs last enabled at (159762): [<ffffffffaa1c1ded>] __do_softirq+0x55d/0xa39
[ 3.360644] softirqs last disabled at (159741): [<ffffffffa90c2a81>] irq_exit+0x111/0x170
[ 3.360695]
other info that might help us debug this:
[ 3.360737] Possible unsafe locking scenario:
[ 3.360775] CPU0
[ 3.360793] ----
[ 3.360810] lock(&(&host->lock)->rlock);
[ 3.360839] <Interrupt>
[ 3.360857] lock(&(&host->lock)->rlock);
[ 3.360887]
*** DEADLOCK ***
[ 3.360926] 4 locks held by kworker/u8:0/5:
[ 3.360954] #0: ("events_unbound"){.+.+.+}, at: [<ffffffffa90ef887>] process_one_work+0x347/0xe10
[ 3.361015] #1: ((&entry->work)){+.+.+.}, at: [<ffffffffa90ef887>] process_one_work+0x347/0xe10
[ 3.361075] #2: (&shost->scan_mutex){+.+.+.}, at: [<ffffffffa99c258c>] __scsi_add_device+0xac/0x150
[ 3.361137] #3: (&(&host->lock)->rlock){?.....}, at: [<ffffffffa99f4e4f>] ata_scsi_queuecmd+0x4f/0x420
[ 3.362428] usbcore: registered new interface driver uvcvideo
[ 3.362429] USB Video Class driver (1.1.1)
[ 3.367023]
stack backtrace:
[ 3.370918] CPU: 1 PID: 5 Comm: kworker/u8:0 Not tainted 4.10.0-rc4-next-20170117-dirty #375
[ 3.372913] Hardware name: Dell Inc. Latitude E6530/07Y85M, BIOS A17 08/19/2015
[ 3.374918] Workqueue: events_unbound async_run_entry_fn
[ 3.376925] Call Trace:
[ 3.378912] dump_stack+0x7b/0xd1
[ 3.380888] print_usage_bug+0x27b/0x330
[ 3.382850] mark_lock+0x6ea/0x8a0
[ 3.384787] ? print_shortest_lock_dependencies+0x380/0x380
[ 3.386726] mark_held_locks+0x93/0x160
[ 3.388651] ? add_lock_to_list.isra.17.constprop.33+0xa7/0x160
[ 3.390591] ? cache_alloc_refill+0x9dd/0x1360
[ 3.392533] trace_hardirqs_on_caller+0x103/0x2c0
[ 3.394464] trace_hardirqs_on+0xd/0x10
[ 3.396390] cache_alloc_refill+0x9dd/0x1360
[ 3.398301] ? ___might_sleep+0x1e2/0x300
[ 3.400203] ? __might_sleep+0x66/0x1f0
[ 3.402091] kmem_cache_alloc_trace+0xf3/0x4f0
[ 3.403976] ? ata_scsiop_inq_00+0x160/0x160
[ 3.405854] ata_scsi_rbuf_fill+0x39/0x110
[ 3.407696] ata_scsi_simulate+0x2e8/0x4b0
[ 3.409533] ata_scsi_queuecmd+0x303/0x420
[ 3.411350] scsi_dispatch_cmd+0x188/0x690
[ 3.413154] scsi_request_fn+0x709/0xd00
[ 3.414958] __blk_run_queue+0x7e/0xb0
[ 3.416733] blk_execute_rq_nowait+0x1c5/0x210
[ 3.418515] ? blk_execute_rq_nowait+0x210/0x210
[ 3.420304] blk_execute_rq+0x14b/0x210
[ 3.422088] ? blk_rq_append_bio+0x9d/0x100
[ 3.423864] ? blk_rq_map_kern+0x11b/0x200
[ 3.425584] ? blk_get_request+0x149/0x290
[ 3.427285] __scsi_execute+0x148/0x210
[ 3.429035] scsi_execute_req_flags+0x98/0x110
[ 3.430786] scsi_probe_and_add_lun+0x29e/0x1210
[ 3.432519] ? _raw_spin_unlock_irqrestore+0x87/0x90
[ 3.434250] ? __pm_runtime_resume+0x52/0x90
[ 3.435972] __scsi_add_device+0x121/0x150
[ 3.437701] ata_scsi_scan_host+0x127/0x240
[ 3.439424] async_port_probe+0x4a/0x90
[ 3.441127] async_run_entry_fn+0x66/0x2b0
[ 3.442828] process_one_work+0x3dc/0xe10
[ 3.444522] ? process_one_work+0x347/0xe10
[ 3.446203] worker_thread+0x352/0xb40
[ 3.447882] kthread+0x176/0x250
[ 3.449543] ? process_one_work+0xe10/0xe10
[ 3.451215] ? kthread_create_on_node+0x60/0x60
[ 3.452866] ret_from_fork+0x2e/0x40
[ 3.454614] scsi 0:0:0:0: Direct-Access ATA ST500LX003-1AC15 DEM4 PQ: 0 ANSI: 5
The 3 BUGs have essentially the same traceback:
[ 4.260406] BUG: sleeping function called from invalid context at mm/slab.h:408
[ 4.264460] in_atomic(): 1, irqs_disabled(): 1, pid: 362, name: ata_id
[ 4.268485] INFO: lockdep is turned off.
[ 4.272516] irq event stamp: 0
[ 4.276490] hardirqs last enabled at (0): [< (null)>] (null)
[ 4.280535] hardirqs last disabled at (0): [<ffffffffa90b23db>] copy_process.part.33+0xb0b/0x3b50
[ 4.284604] softirqs last enabled at (0): [<ffffffffa90b23db>] copy_process.part.33+0xb0b/0x3b50
[ 4.288538] softirqs last disabled at (0): [< (null)>] (null)
[ 4.292428] CPU: 2 PID: 362 Comm: ata_id Not tainted 4.10.0-rc4-next-20170117-dirty #375
[ 4.296395] Hardware name: Dell Inc. Latitude E6530/07Y85M, BIOS A17 08/19/2015
[ 4.300432] Call Trace:
[ 4.304460] dump_stack+0x7b/0xd1
[ 4.308451] ___might_sleep+0x194/0x300
[ 4.312457] __might_sleep+0x66/0x1f0
[ 4.316420] kmem_cache_alloc_trace+0x2fc/0x4f0
[ 4.320436] ? ata_scsiop_inq_00+0x160/0x160
[ 4.323049] ata_scsi_rbuf_fill+0x39/0x110
[ 4.325212] ata_scsi_simulate+0x2e8/0x4b0
[ 4.327388] ata_scsi_queuecmd+0x303/0x420
[ 4.329549] scsi_dispatch_cmd+0x188/0x690
[ 4.331733] scsi_request_fn+0x709/0xd00
[ 4.333853] __blk_run_queue+0x7e/0xb0
[ 4.335945] __elv_add_request+0x1f2/0x680
[ 4.338105] blk_execute_rq_nowait+0x1bd/0x210
[ 4.340235] ? blk_execute_rq_nowait+0x210/0x210
[ 4.342334] blk_execute_rq+0x14b/0x210
[ 4.344459] ? blk_rq_map_user+0x92/0xe0
[ 4.346597] sg_io+0x357/0x510
[ 4.348734] ? __check_object_size+0x19d/0x4f8
[ 4.350852] scsi_cmd_ioctl+0x38d/0x540
[ 4.352944] scsi_cmd_blk_ioctl+0x50/0x80
[ 4.355027] sd_ioctl+0x8f/0xf0
[ 4.357103] blkdev_ioctl+0x5ed/0x1090
[ 4.359183] ? trace_hardirqs_on_caller+0x16/0x2c0
[ 4.361277] block_ioctl+0x57/0xa0
[ 4.363295] do_vfs_ioctl+0xc0/0xb00
[ 4.365325] SyS_ioctl+0x79/0x90
[ 4.367319] do_syscall_64+0x8c/0x290
[ 4.369243] entry_SYSCALL64_slow_path+0x25/0x25
[ 4.371159] RIP: 0033:0x7ff3910156c7
[ 4.373051] RSP: 002b:00007ffcc3a22448 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
[ 4.374956] RAX: ffffffffffffffda RBX: 0000000000000001 RCX: 00007ff3910156c7
[ 4.376846] RDX: 00007ffcc3a224a0 RSI: 0000000000002285 RDI: 0000000000000003
[ 4.378714] RBP: 00007ffcc3a22b90 R08: 0000000000000000 R09: 0000000000000000
[ 4.380543] R10: 00007ff391b3e080 R11: 0000000000000246 R12: 00000000ffffffff
[ 4.382391] R13: 00007ffcc3a22f1a R14: 00007ffcc3a22700 R15: 0000000000000003
[ 4.386253] ata_id (362) used greatest stack depth: 12136 bytes left
[-- Attachment #2: Type: application/pgp-signature, Size: 484 bytes --]
^ permalink raw reply
* [tj-libata:for-4.11 24/24] drivers/ata/ahci_qoriq.c:194:3: note: in expansion of macro 'if'
From: kbuild test robot @ 2017-01-18 19:49 UTC (permalink / raw)
To: Tang Yuantian; +Cc: kbuild-all, linux-ide, Tejun Heo
[-- Attachment #1: Type: text/plain, Size: 9159 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git for-4.11
head: ef774e3dca9df8b34367aa9d9fca2c1c08fcde7d
commit: ef774e3dca9df8b34367aa9d9fca2c1c08fcde7d [24/24] ahci: qoriq: added ls2088a platforms support
config: i386-randconfig-x005-201703 (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
git checkout ef774e3dca9df8b34367aa9d9fca2c1c08fcde7d
# save the attached .config to linux build tree
make ARCH=i386
All warnings (new ones prefixed by >>):
In file included from include/linux/linkage.h:4:0,
from include/linux/kernel.h:6,
from drivers/ata/ahci_qoriq.c:13:
drivers/ata/ahci_qoriq.c: In function 'ahci_qoriq_phy_init':
drivers/ata/ahci_qoriq.c:194:12: error: 'struct ahci_qoriq_priv' has no member named 'is_dmacoherent'
if (qpriv->is_dmacoherent)
^
include/linux/compiler.h:149:30: note: in definition of macro '__trace_if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^~~~
>> drivers/ata/ahci_qoriq.c:194:3: note: in expansion of macro 'if'
if (qpriv->is_dmacoherent)
^~
drivers/ata/ahci_qoriq.c:194:12: error: 'struct ahci_qoriq_priv' has no member named 'is_dmacoherent'
if (qpriv->is_dmacoherent)
^
include/linux/compiler.h:149:42: note: in definition of macro '__trace_if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^~~~
>> drivers/ata/ahci_qoriq.c:194:3: note: in expansion of macro 'if'
if (qpriv->is_dmacoherent)
^~
drivers/ata/ahci_qoriq.c:194:12: error: 'struct ahci_qoriq_priv' has no member named 'is_dmacoherent'
if (qpriv->is_dmacoherent)
^
include/linux/compiler.h:160:16: note: in definition of macro '__trace_if'
______r = !!(cond); \
^~~~
>> drivers/ata/ahci_qoriq.c:194:3: note: in expansion of macro 'if'
if (qpriv->is_dmacoherent)
^~
vim +/if +194 drivers/ata/ahci_qoriq.c
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 */
12
> 13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/pm.h>
16 #include <linux/ahci_platform.h>
17 #include <linux/device.h>
18 #include <linux/of_address.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/platform_device.h>
22 #include <linux/libata.h>
23 #include "ahci.h"
24
25 #define DRV_NAME "ahci-qoriq"
26
27 /* port register definition */
28 #define PORT_PHY1 0xA8
29 #define PORT_PHY2 0xAC
30 #define PORT_PHY3 0xB0
31 #define PORT_PHY4 0xB4
32 #define PORT_PHY5 0xB8
33 #define PORT_AXICC 0xBC
34 #define PORT_TRANS 0xC8
35
36 /* port register default value */
37 #define AHCI_PORT_PHY_1_CFG 0xa003fffe
38 #define AHCI_PORT_TRANS_CFG 0x08000029
39 #define AHCI_PORT_AXICC_CFG 0x3fffffff
40
41 /* for ls1021a */
42 #define LS1021A_PORT_PHY2 0x28183414
43 #define LS1021A_PORT_PHY3 0x0e080e06
44 #define LS1021A_PORT_PHY4 0x064a080b
45 #define LS1021A_PORT_PHY5 0x2aa86470
46 #define LS1021A_AXICC_ADDR 0xC0
47
48 #define SATA_ECC_DISABLE 0x00020000
49 #define LS1046A_SATA_ECC_DIS 0x80000000
50
51 enum ahci_qoriq_type {
52 AHCI_LS1021A,
53 AHCI_LS1043A,
54 AHCI_LS2080A,
55 AHCI_LS1046A,
56 AHCI_LS2088A,
57 };
58
59 struct ahci_qoriq_priv {
60 struct ccsr_ahci *reg_base;
61 enum ahci_qoriq_type type;
62 void __iomem *ecc_addr;
63 };
64
65 static const struct of_device_id ahci_qoriq_of_match[] = {
66 { .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A},
67 { .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A},
68 { .compatible = "fsl,ls2080a-ahci", .data = (void *)AHCI_LS2080A},
69 { .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A},
70 { .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A},
71 {},
72 };
73 MODULE_DEVICE_TABLE(of, ahci_qoriq_of_match);
74
75 static int ahci_qoriq_hardreset(struct ata_link *link, unsigned int *class,
76 unsigned long deadline)
77 {
78 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
79 void __iomem *port_mmio = ahci_port_base(link->ap);
80 u32 px_cmd, px_is, px_val;
81 struct ata_port *ap = link->ap;
82 struct ahci_port_priv *pp = ap->private_data;
83 struct ahci_host_priv *hpriv = ap->host->private_data;
84 struct ahci_qoriq_priv *qoriq_priv = hpriv->plat_data;
85 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
86 struct ata_taskfile tf;
87 bool online;
88 int rc;
89 bool ls1021a_workaround = (qoriq_priv->type == AHCI_LS1021A);
90
91 DPRINTK("ENTER\n");
92
93 ahci_stop_engine(ap);
94
95 /*
96 * There is a errata on ls1021a Rev1.0 and Rev2.0 which is:
97 * A-009042: The device detection initialization sequence
98 * mistakenly resets some registers.
99 *
100 * Workaround for this is:
101 * The software should read and store PxCMD and PxIS values
102 * before issuing the device detection initialization sequence.
103 * After the sequence is complete, software should restore the
104 * PxCMD and PxIS with the stored values.
105 */
106 if (ls1021a_workaround) {
107 px_cmd = readl(port_mmio + PORT_CMD);
108 px_is = readl(port_mmio + PORT_IRQ_STAT);
109 }
110
111 /* clear D2H reception area to properly wait for D2H FIS */
112 ata_tf_init(link->device, &tf);
113 tf.command = ATA_BUSY;
114 ata_tf_to_fis(&tf, 0, 0, d2h_fis);
115
116 rc = sata_link_hardreset(link, timing, deadline, &online,
117 ahci_check_ready);
118
119 /* restore the PxCMD and PxIS on ls1021 */
120 if (ls1021a_workaround) {
121 px_val = readl(port_mmio + PORT_CMD);
122 if (px_val != px_cmd)
123 writel(px_cmd, port_mmio + PORT_CMD);
124
125 px_val = readl(port_mmio + PORT_IRQ_STAT);
126 if (px_val != px_is)
127 writel(px_is, port_mmio + PORT_IRQ_STAT);
128 }
129
130 hpriv->start_engine(ap);
131
132 if (online)
133 *class = ahci_dev_classify(ap);
134
135 DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
136 return rc;
137 }
138
139 static struct ata_port_operations ahci_qoriq_ops = {
140 .inherits = &ahci_ops,
141 .hardreset = ahci_qoriq_hardreset,
142 };
143
144 static const struct ata_port_info ahci_qoriq_port_info = {
145 .flags = AHCI_FLAG_COMMON | ATA_FLAG_NCQ,
146 .pio_mask = ATA_PIO4,
147 .udma_mask = ATA_UDMA6,
148 .port_ops = &ahci_qoriq_ops,
149 };
150
151 static struct scsi_host_template ahci_qoriq_sht = {
152 AHCI_SHT(DRV_NAME),
153 };
154
155 static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
156 {
157 struct ahci_qoriq_priv *qpriv = hpriv->plat_data;
158 void __iomem *reg_base = hpriv->mmio;
159
160 switch (qpriv->type) {
161 case AHCI_LS1021A:
162 writel(SATA_ECC_DISABLE, qpriv->ecc_addr);
163 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
164 writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2);
165 writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3);
166 writel(LS1021A_PORT_PHY4, reg_base + PORT_PHY4);
167 writel(LS1021A_PORT_PHY5, reg_base + PORT_PHY5);
168 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
169 writel(AHCI_PORT_AXICC_CFG, reg_base + LS1021A_AXICC_ADDR);
170 break;
171
172 case AHCI_LS1043A:
173 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
174 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
175 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
176 break;
177
178 case AHCI_LS2080A:
179 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
180 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
181 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
182 break;
183
184 case AHCI_LS1046A:
185 writel(LS1046A_SATA_ECC_DIS, qpriv->ecc_addr);
186 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
187 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
188 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
189 break;
190
191 case AHCI_LS2088A:
192 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
193 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
> 194 if (qpriv->is_dmacoherent)
195 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
196 break;
197 }
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 29773 bytes --]
^ permalink raw reply
* Re: [PATCH] ahci: qoriq: added ls2088a platforms support
From: Tejun Heo @ 2017-01-18 19:53 UTC (permalink / raw)
To: yuantian.tang
Cc: robh+dt, mark.rutland, linux-ide, devicetree, linux-kernel,
linux-arm-kernel
In-Reply-To: <1484633521-10938-1-git-send-email-yuantian.tang@nxp.com>
On Tue, Jan 17, 2017 at 02:12:01PM +0800, yuantian.tang@nxp.com wrote:
> From: Tang Yuantian <Yuantian.Tang@nxp.com>
>
> Ls2088a is new introduced arm-based soc with sata support with
> following features:
> 1. Complies with the serial ATA 3.0 specification and the AHCI 1.3.1
> specification
> 2. Contains a high-speed descriptor-based DMA controller
> 3. Supports the following:
> a. Speeds of 1.5 Gb/s (first-generation SATA), 3 Gb/s
> (second-generation SATA), and 6 Gb/s (third-generation SATA)
> b. FIS-based switching
> c. Native command queuing (NCQ) commands
> d. Port multiplier operation
> e. Asynchronous notification
> f. SATA BIST mode
>
> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Reverted due to build failure. Did you even try to compile it before
submission? We all make mistakes and that's fine but this one seems a
bit too careless. Please don't do this.
Thanks.
--
tejun
^ permalink raw reply
* [tj-libata:for-4.11 24/24] drivers/ata/ahci_qoriq.c:194:12: error: 'struct ahci_qoriq_priv' has no member named 'is_dmacoherent'
From: kbuild test robot @ 2017-01-18 19:48 UTC (permalink / raw)
To: Tang Yuantian; +Cc: kbuild-all, linux-ide, Tejun Heo
[-- Attachment #1: Type: text/plain, Size: 1307 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git for-4.11
head: ef774e3dca9df8b34367aa9d9fca2c1c08fcde7d
commit: ef774e3dca9df8b34367aa9d9fca2c1c08fcde7d [24/24] ahci: qoriq: added ls2088a platforms support
config: x86_64-randconfig-x001-201703 (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
git checkout ef774e3dca9df8b34367aa9d9fca2c1c08fcde7d
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/ata/ahci_qoriq.c: In function 'ahci_qoriq_phy_init':
>> drivers/ata/ahci_qoriq.c:194:12: error: 'struct ahci_qoriq_priv' has no member named 'is_dmacoherent'
if (qpriv->is_dmacoherent)
^~
vim +194 drivers/ata/ahci_qoriq.c
188 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
189 break;
190
191 case AHCI_LS2088A:
192 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
193 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
> 194 if (qpriv->is_dmacoherent)
195 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
196 break;
197 }
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 24665 bytes --]
^ permalink raw reply
* Re: command emulation fix
From: Tejun Heo @ 2017-01-18 19:17 UTC (permalink / raw)
To: Christoph Hellwig; +Cc: linux-ide
In-Reply-To: <20170116152120.GA16072@lst.de>
Hello,
On Mon, Jan 16, 2017 at 04:21:20PM +0100, Christoph Hellwig wrote:
> On Sun, Jan 15, 2017 at 06:07:23PM -0500, Tejun Heo wrote:
> > Ugh... I don't know. What we had previously is always guaranteed to
> > work. I'm not really liking the fact that we're adding a possibility
> > of failure here. Even if we do mempool, we would still have to
> > protect it with a spinlock as mempool only guarantees one allocation
> > at a time. Until we have a better solution, can we please revert back
> > to where we were at least for the buffers needed from atomic context?
>
> In that case you'll need to drop all but the first patch from the series
> as ->queuecommand can always be called from atomic context.
I reverted just the last patch. The rest should be fine, right?
Thanks.
--
tejun
^ permalink raw reply
* Re: [PATCH v2] ata: xgene: Enable NCQ support for APM X-Gene SATA controller hardware v1.1
From: Tejun Heo @ 2017-01-18 19:23 UTC (permalink / raw)
To: Rameshwar Sahu
Cc: Devicetree List, mlangsdo, Arnd Bergmann, linux-scsi, Jon Masters,
patches, linux-ide, Olof Johansson, linux-arm
In-Reply-To: <CAFd313wajZzZWGQy20obf4k_7RO43Q10NiBa-8TVYxo3J93inA@mail.gmail.com>
Hello,
On Tue, Jan 17, 2017 at 08:25:21PM +0530, Rameshwar Sahu wrote:
> Hi Tejun,
>
> On Fri, Nov 18, 2016 at 3:15 PM, Rameshwar Prasad Sahu <rsahu@apm.com> wrote:
> > This patch enables NCQ support for APM X-Gene SATA controller hardware v1.1
> > that was broken with hardware v1.0. Second thing, here we should not assume
> > XGENE_AHCI_V2 always in case of having valid _CID in ACPI table. I need to
> > remove this assumption because V1_1 also has a valid _CID for backward
> > compatibly with v1.
> >
> > v2 changes:
> > 1. Changed patch description
> >
> > Signed-off-by: Rameshwar Prasad Sahu <rsahu@apm.com>
Hmm... I don't have the patch in my queue. Can you please resend it?
Thanks.
--
tejun
^ permalink raw reply
* Re: [PATCH] ahci: qoriq: added ls2088a platforms support
From: Tejun Heo @ 2017-01-18 19:21 UTC (permalink / raw)
To: yuantian.tang
Cc: mark.rutland, devicetree, linux-kernel, linux-ide, robh+dt,
linux-arm-kernel
In-Reply-To: <1484633521-10938-1-git-send-email-yuantian.tang@nxp.com>
On Tue, Jan 17, 2017 at 02:12:01PM +0800, yuantian.tang@nxp.com wrote:
> From: Tang Yuantian <Yuantian.Tang@nxp.com>
>
> Ls2088a is new introduced arm-based soc with sata support with
> following features:
> 1. Complies with the serial ATA 3.0 specification and the AHCI 1.3.1
> specification
> 2. Contains a high-speed descriptor-based DMA controller
> 3. Supports the following:
> a. Speeds of 1.5 Gb/s (first-generation SATA), 3 Gb/s
> (second-generation SATA), and 6 Gb/s (third-generation SATA)
> b. FIS-based switching
> c. Native command queuing (NCQ) commands
> d. Port multiplier operation
> e. Asynchronous notification
> f. SATA BIST mode
>
> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Applied to libata/for-4.11.
Thanks.
--
tejun
^ permalink raw reply
* Re: [PATCH v3 09/13] sata: ahci: export ahci_do_hardreset() locally
From: Tejun Heo @ 2017-01-18 18:28 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: Mark Rutland, devicetree, David Lechner, Kevin Hilman,
Michael Turquette, Sekhar Nori, Russell King, linux-kernel,
linux-ide, Rob Herring, Patrick Titiano, linux-arm-kernel
In-Reply-To: <1484745601-4769-10-git-send-email-bgolaszewski@baylibre.com>
Hello, Bartosz.
On Wed, Jan 18, 2017 at 02:19:57PM +0100, Bartosz Golaszewski wrote:
> We need a way to retrieve the information about the online state of
> the link in the ahci-da850 driver.
>
> Create a new function: ahci_do_hardreset() which is called from
> ahci_hardreset() for backwards compatibility, but has an additional
> argument: 'online' - which can be used to check if the link is online
> after this function returns.
Please just add @online to ahci_hardreset() and update the callers.
Other than that, the sata changes look good to me.
Thanks.
--
tejun
^ permalink raw reply
* Re: [PATCH v3 06/13] ARM: davinci: da850: model the SATA refclk
From: David Lechner @ 2017-01-18 17:26 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Sekhar Nori, Patrick Titiano,
Michael Turquette, Tejun Heo, Rob Herring, Mark Rutland,
Russell King
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel
In-Reply-To: <1484745601-4769-7-git-send-email-bgolaszewski@baylibre.com>
On 01/18/2017 07:19 AM, Bartosz Golaszewski wrote:
> Register a dummy clock modelling the external SATA oscillator for
modeling
> da850 (both DT and board file mode).
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/da8xx-dt.c | 8 ++++++++
> arch/arm/mach-davinci/devices-da8xx.c | 29 +++++++++++++++++++++++++++++
> arch/arm/mach-davinci/include/mach/da8xx.h | 1 +
> 3 files changed, 38 insertions(+)
>
> diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
> index b83e5d1..0f981b5 100644
> --- a/arch/arm/mach-davinci/da8xx-dt.c
> +++ b/arch/arm/mach-davinci/da8xx-dt.c
> @@ -50,6 +50,9 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
>
> static void __init da850_init_machine(void)
> {
> + /* All existing boards use 100MHz SATA refclkpn */
> + static const unsigned long sata_refclkpn = 100 * 1000 * 1000;
> +
> int ret;
>
> ret = da8xx_register_usb20_phy_clk(false);
> @@ -61,6 +64,11 @@ static void __init da850_init_machine(void)
> pr_warn("%s: registering USB 1.1 PHY clock failed: %d",
> __func__, ret);
>
> + ret = da850_register_sata_refclk(sata_refclkpn);
> + if (ret)
> + pr_warn("%s: registering SATA REFCLK failed: %d",
> + __func__, ret);
> +
> of_platform_default_populate(NULL, da850_auxdata_lookup, NULL);
> davinci_pm_init();
> }
> diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
> index c2457b3..cfceb32 100644
> --- a/arch/arm/mach-davinci/devices-da8xx.c
> +++ b/arch/arm/mach-davinci/devices-da8xx.c
> @@ -24,6 +24,7 @@
> #include <mach/common.h>
> #include <mach/time.h>
> #include <mach/da8xx.h>
> +#include <mach/clock.h>
> #include "cpuidle.h"
> #include "sram.h"
>
> @@ -1023,6 +1024,28 @@ int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
> }
>
> #ifdef CONFIG_ARCH_DAVINCI_DA850
> +static struct clk sata_refclk = {
> + .name = "sata_refclk",
> + .set_rate = davinci_simple_set_rate,
> +};
> +
> +static struct clk_lookup sata_refclk_lookup =
> + CLK("ahci_da850", "refclk", &sata_refclk);
> +
> +int __init da850_register_sata_refclk(int rate)
> +{
> + int ret;
> +
> + sata_refclk.rate = rate;
> + ret = clk_register(&sata_refclk);
> + if (ret)
> + return ret;
> +
> + clkdev_add(&sata_refclk_lookup);
> +
> + return 0;
> +}
> +
> static struct resource da850_sata_resources[] = {
> {
> .start = DA850_SATA_BASE,
> @@ -1055,9 +1078,15 @@ static struct platform_device da850_sata_device = {
>
> int __init da850_register_sata(unsigned long refclkpn)
> {
> + int ret;
> +
> /* please see comment in drivers/ata/ahci_da850.c */
> BUG_ON(refclkpn != 100 * 1000 * 1000);
This BUG_ON() should be removed since the sata driver can now handle
other clock frequencies.
>
> + ret = da850_register_sata_refclk(refclkpn);
> + if (ret)
> + return ret;
> +
> return platform_device_register(&da850_sata_device);
> }
> #endif
> diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
> index 85ff218..7e46422 100644
> --- a/arch/arm/mach-davinci/include/mach/da8xx.h
> +++ b/arch/arm/mach-davinci/include/mach/da8xx.h
> @@ -95,6 +95,7 @@ int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
> int da8xx_register_usb_refclkin(int rate);
> int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
> int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
> +int da850_register_sata_refclk(int rate);
> int da8xx_register_emac(void);
> int da8xx_register_uio_pruss(void);
> int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
>
^ permalink raw reply
* [PATCH v3 11/13] sata: ahci-da850: un-hardcode the MPY bits
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>
All platforms using this driver now register the SATA refclk. Remove
the hardcoded default value from the driver and instead read the rate
of the external clock and calculate the required MPY value from it.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
drivers/ata/ahci_da850.c | 91 ++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 76 insertions(+), 15 deletions(-)
diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
index 0b2b1a4..9ed404d 100644
--- a/drivers/ata/ahci_da850.c
+++ b/drivers/ata/ahci_da850.c
@@ -29,17 +29,8 @@
#define SATA_PHY_TXSWING(x) ((x) << 19)
#define SATA_PHY_ENPLL(x) ((x) << 31)
-/*
- * The multiplier needed for 1.5GHz PLL output.
- *
- * NOTE: This is currently hardcoded to be suitable for 100MHz crystal
- * frequency (which is used by DA850 EVM board) and may need to be changed
- * if you would like to use this driver on some other board.
- */
-#define DA850_SATA_CLK_MULTIPLIER 7
-
static void da850_sata_init(struct device *dev, void __iomem *pwrdn_reg,
- void __iomem *ahci_base)
+ void __iomem *ahci_base, u32 mpy)
{
unsigned int val;
@@ -48,13 +39,61 @@ static void da850_sata_init(struct device *dev, void __iomem *pwrdn_reg,
val &= ~BIT(0);
writel(val, pwrdn_reg);
- val = SATA_PHY_MPY(DA850_SATA_CLK_MULTIPLIER + 1) | SATA_PHY_LOS(1) |
- SATA_PHY_RXCDR(4) | SATA_PHY_RXEQ(1) | SATA_PHY_TXSWING(3) |
- SATA_PHY_ENPLL(1);
+ val = SATA_PHY_MPY(mpy) | SATA_PHY_LOS(1) | SATA_PHY_RXCDR(4) |
+ SATA_PHY_RXEQ(1) | SATA_PHY_TXSWING(3) | SATA_PHY_ENPLL(1);
writel(val, ahci_base + SATA_P0PHYCR_REG);
}
+static u32 ahci_da850_calculate_mpy(unsigned long refclk_rate)
+{
+ u32 pll_output = 1500000000, needed;
+
+ /*
+ * We need to determine the value of the multiplier (MPY) bits.
+ * In order to include the 12.5 multiplier we need to first divide
+ * the refclk rate by ten.
+ *
+ * __div64_32() turned out to be unreliable, sometimes returning
+ * false results.
+ */
+ WARN((refclk_rate % 10) != 0, "refclk must be divisible by 10");
+ needed = pll_output / (refclk_rate / 10);
+
+ /*
+ * What we have now is (multiplier * 10).
+ *
+ * Let's determine the actual register value we need to write.
+ */
+
+ switch (needed) {
+ case 50:
+ return 0x1;
+ case 60:
+ return 0x2;
+ case 80:
+ return 0x4;
+ case 100:
+ return 0x5;
+ case 120:
+ return 0x6;
+ case 125:
+ return 0x7;
+ case 150:
+ return 0x8;
+ case 200:
+ return 0x9;
+ case 250:
+ return 0xa;
+ default:
+ /*
+ * We should have divided evenly - if not, return an invalid
+ * value.
+ */
+ return 0;
+ }
+}
+
static int ahci_da850_softreset(struct ata_link *link,
unsigned int *class, unsigned long deadline)
{
@@ -126,9 +165,10 @@ static int ahci_da850_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct ahci_host_priv *hpriv;
- struct resource *res;
void __iomem *pwrdn_reg;
+ struct resource *res;
struct clk *clk;
+ u32 mpy;
int rc;
hpriv = ahci_platform_get_resources(pdev);
@@ -150,6 +190,27 @@ static int ahci_da850_probe(struct platform_device *pdev)
hpriv->clks[0] = clk;
}
+ /*
+ * The second clock used by ahci-da850 is the external REFCLK. If we
+ * didn't get it from ahci_platform_get_resources(), let's try to
+ * specify the con_id in clk_get().
+ */
+ if (!hpriv->clks[1]) {
+ clk = clk_get(dev, "refclk");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "unable to obtain the reference clock");
+ return -ENODEV;
+ } else {
+ hpriv->clks[1] = clk;
+ }
+ }
+
+ mpy = ahci_da850_calculate_mpy(clk_get_rate(hpriv->clks[1]));
+ if (mpy == 0) {
+ dev_err(dev, "invalid REFCLK multiplier value: 0x%x", mpy);
+ return -EINVAL;
+ }
+
rc = ahci_platform_enable_resources(hpriv);
if (rc)
return rc;
@@ -162,7 +223,7 @@ static int ahci_da850_probe(struct platform_device *pdev)
if (!pwrdn_reg)
goto disable_resources;
- da850_sata_init(dev, pwrdn_reg, hpriv->mmio);
+ da850_sata_init(dev, pwrdn_reg, hpriv->mmio, mpy);
rc = ahci_platform_init_host(pdev, hpriv, &ahci_da850_port_info,
&ahci_platform_sht);
--
2.9.3
^ permalink raw reply related
* [PATCH v3 10/13] sata: ahci-da850: add a workaround for controller instability
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>
We have a use case with the da850 SATA controller where at PLL0
frequency of 456MHz (needed to properly service the LCD controller)
the chip becomes unstable and the hardreset operation is ignored the
first time 50% of times.
The sata core driver already retries to resume the link because some
controllers ignore writes to the SControl register, but just retrying
the resume operation doesn't work - we need to issue he phy/wake reset
again to make it work.
Reimplement ahci_hardreset() in the driver and poke the controller a
couple times before really giving up.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
drivers/ata/ahci_da850.c | 28 +++++++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
index 11dd87e..0b2b1a4 100644
--- a/drivers/ata/ahci_da850.c
+++ b/drivers/ata/ahci_da850.c
@@ -16,7 +16,8 @@
#include <linux/ahci_platform.h>
#include "ahci.h"
-#define DRV_NAME "ahci_da850"
+#define DRV_NAME "ahci_da850"
+#define HARDRESET_RETRIES 5
/* SATA PHY Control Register offset from AHCI base */
#define SATA_P0PHYCR_REG 0x178
@@ -76,6 +77,29 @@ static int ahci_da850_softreset(struct ata_link *link,
return ret;
}
+static int ahci_da850_hardreset(struct ata_link *link,
+ unsigned int *class, unsigned long deadline)
+{
+ int ret, retry = HARDRESET_RETRIES;
+ bool online;
+
+ /*
+ * In order to correctly service the LCD controller of the da850 SoC,
+ * we increased the PLL0 frequency to 456MHz from the default 300MHz.
+ *
+ * This made the SATA controller unstable and the hardreset operation
+ * does not always succeed the first time. Before really giving up to
+ * bring up the link, retry the reset a couple times.
+ */
+ do {
+ ret = ahci_do_hardreset(link, class, deadline, &online);
+ if (online)
+ return ret;
+ } while (retry--);
+
+ return ret;
+}
+
static struct ata_port_operations ahci_da850_port_ops = {
.inherits = &ahci_platform_ops,
.softreset = ahci_da850_softreset,
@@ -83,6 +107,8 @@ static struct ata_port_operations ahci_da850_port_ops = {
* No need to override .pmp_softreset - it's only used for actual
* PMP-enabled ports.
*/
+ .hardreset = ahci_da850_hardreset,
+ .pmp_hardreset = ahci_da850_hardreset,
};
static const struct ata_port_info ahci_da850_port_info = {
--
2.9.3
^ permalink raw reply related
* [PATCH v3 07/13] sata: ahci-da850: add device tree match table
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>
We're using device tree for da850-lcdk. Add the match table to allow
to probe the driver.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
drivers/ata/ahci_da850.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
index 8cfdc86..7f5328f 100644
--- a/drivers/ata/ahci_da850.c
+++ b/drivers/ata/ahci_da850.c
@@ -121,11 +121,18 @@ static int ahci_da850_probe(struct platform_device *pdev)
static SIMPLE_DEV_PM_OPS(ahci_da850_pm_ops, ahci_platform_suspend,
ahci_platform_resume);
+static const struct of_device_id ahci_da850_of_match[] = {
+ { .compatible = "ti,da850-ahci", },
+ { },
+};
+MODULE_DEVICE_TABLE(of, ahci_da850_of_match);
+
static struct platform_driver ahci_da850_driver = {
.probe = ahci_da850_probe,
.remove = ata_platform_remove_one,
.driver = {
.name = DRV_NAME,
+ .of_match_table = ahci_da850_of_match,
.pm = &ahci_da850_pm_ops,
},
};
--
2.9.3
^ permalink raw reply related
* [PATCH v3 03/13] ARM: davinci: add a clock lookup entry for the SATA clock
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>
This entry is needed for the ahci driver to get a functional clock.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/da8xx-dt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 9ee44da..b83e5d1 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -42,6 +42,7 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("ti,da830-ohci", 0x01e25000, "ohci-da8xx", NULL),
OF_DEV_AUXDATA("ti,da830-musb", 0x01e00000, "musb-da8xx", NULL),
OF_DEV_AUXDATA("ti,da830-usb-phy", 0x01c1417c, "da8xx-usb-phy", NULL),
+ OF_DEV_AUXDATA("ti,da850-ahci", 0x01e18000, "ahci_da850", NULL),
{}
};
--
2.9.3
^ permalink raw reply related
* [PATCH v3 13/13] ARM: dts: da850-lcdk: enable the SATA node
From: Bartosz Golaszewski @ 2017-01-18 13:20 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>
Enable the SATA node for da850-lcdk. We omit the pinctrl property on
purpose - the muxed SATA pins are not hooked up to anything
SATA-related on the lcdk.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/boot/dts/da850-lcdk.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
index afcb482..fbeee3c 100644
--- a/arch/arm/boot/dts/da850-lcdk.dts
+++ b/arch/arm/boot/dts/da850-lcdk.dts
@@ -105,6 +105,10 @@
status = "okay";
};
+&sata {
+ status = "okay";
+};
+
&mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
--
2.9.3
^ permalink raw reply related
* [PATCH v3 12/13] ARM: dts: da850: add the SATA node
From: Bartosz Golaszewski @ 2017-01-18 13:20 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
Add the SATA node to the da850 device tree.
Signed-off-by: Bartosz Golaszewski <bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
---
arch/arm/boot/dts/da850.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 104155d..e9bf30e 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -403,6 +403,12 @@
phy-names = "usb-phy";
status = "disabled";
};
+ sata: ahci@218000 {
+ compatible = "ti,da850-ahci";
+ reg = <0x218000 0x2000>, <0x22c018 0x4>;
+ interrupts = <67>;
+ status = "disabled";
+ };
mdio: mdio@224000 {
compatible = "ti,davinci_mdio";
#address-cells = <1>;
--
2.9.3
--
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^ permalink raw reply related
* [PATCH v3 09/13] sata: ahci: export ahci_do_hardreset() locally
From: Bartosz Golaszewski @ 2017-01-18 13:19 UTC (permalink / raw)
To: Kevin Hilman, Sekhar Nori, Patrick Titiano, Michael Turquette,
Tejun Heo, Rob Herring, Mark Rutland, Russell King, David Lechner
Cc: linux-ide, devicetree, linux-kernel, linux-arm-kernel,
Bartosz Golaszewski
In-Reply-To: <1484745601-4769-1-git-send-email-bgolaszewski@baylibre.com>
We need a way to retrieve the information about the online state of
the link in the ahci-da850 driver.
Create a new function: ahci_do_hardreset() which is called from
ahci_hardreset() for backwards compatibility, but has an additional
argument: 'online' - which can be used to check if the link is online
after this function returns.
The new routine will be used in the ahci-da850 driver to avoid code
duplication when implementing a workaround for tha da850 SATA
controller quirk/instability.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
drivers/ata/ahci.h | 3 +++
drivers/ata/libahci.c | 18 +++++++++++++-----
2 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 0cc08f8..5db6ab2 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -398,6 +398,9 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class,
int pmp, unsigned long deadline,
int (*check_ready)(struct ata_link *link));
+int ahci_do_hardreset(struct ata_link *link, unsigned int *class,
+ unsigned long deadline, bool *online);
+
unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
int ahci_stop_engine(struct ata_port *ap);
void ahci_start_fis_rx(struct ata_port *ap);
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
index ee7db31..3159f9e 100644
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -1519,8 +1519,8 @@ static int ahci_pmp_retry_softreset(struct ata_link *link, unsigned int *class,
return rc;
}
-static int ahci_hardreset(struct ata_link *link, unsigned int *class,
- unsigned long deadline)
+int ahci_do_hardreset(struct ata_link *link, unsigned int *class,
+ unsigned long deadline, bool *online)
{
const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
struct ata_port *ap = link->ap;
@@ -1528,7 +1528,6 @@ static int ahci_hardreset(struct ata_link *link, unsigned int *class,
struct ahci_host_priv *hpriv = ap->host->private_data;
u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
struct ata_taskfile tf;
- bool online;
int rc;
DPRINTK("ENTER\n");
@@ -1540,17 +1539,26 @@ static int ahci_hardreset(struct ata_link *link, unsigned int *class,
tf.command = ATA_BUSY;
ata_tf_to_fis(&tf, 0, 0, d2h_fis);
- rc = sata_link_hardreset(link, timing, deadline, &online,
+ rc = sata_link_hardreset(link, timing, deadline, online,
ahci_check_ready);
hpriv->start_engine(ap);
- if (online)
+ if (*online)
*class = ahci_dev_classify(ap);
DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
return rc;
}
+EXPORT_SYMBOL_GPL(ahci_do_hardreset);
+
+static int ahci_hardreset(struct ata_link *link, unsigned int *class,
+ unsigned long deadline)
+{
+ bool online;
+
+ return ahci_do_hardreset(link, class, deadline, &online);
+}
static void ahci_postreset(struct ata_link *link, unsigned int *class)
{
--
2.9.3
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