* Re: [PATCH] ide: pmac: Convert to using %pOF instead of full_name
From: David Miller @ 2017-07-18 21:58 UTC (permalink / raw)
To: robh; +Cc: benh, paulus, mpe, linux-kernel, devicetree, linux-ide,
linuxppc-dev
In-Reply-To: <20170718214339.7774-27-robh@kernel.org>
From: Rob Herring <robh@kernel.org>
Date: Tue, 18 Jul 2017 16:43:07 -0500
> Now that we have a custom printf format specifier, convert users of
> full_name to use %pOF instead. This is preparation to remove storing
> of the full path string for each node.
>
> Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: David S. Miller <davem@davemloft.net>
^ permalink raw reply
* Re: [PATCH] ata: Convert to using %pOF instead of full_name
From: Tejun Heo @ 2017-07-18 22:03 UTC (permalink / raw)
To: Rob Herring
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-ide-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170718214339.7774-8-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
On Tue, Jul 18, 2017 at 04:42:48PM -0500, Rob Herring wrote:
> Now that we have a custom printf format specifier, convert users of
> full_name to use %pOF instead. This is preparation to remove storing
> of the full path string for each node.
>
> Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Cc: Tejun Heo <tj-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Cc: linux-ide-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Applied to libata/for-4.14.
Thanks.
--
tejun
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^ permalink raw reply
* [PATCH] libata: array underflow in ata_find_dev()
From: Dan Carpenter @ 2017-07-19 10:06 UTC (permalink / raw)
To: Tejun Heo; +Cc: linux-ide, kernel-janitors
My static checker complains that "devno" can be negative, meaning that
we read before the start of the loop. I've looked at the code, and I
think the warning is right. This come from /proc so it's root only or
it would be quite a quite a serious bug. The call tree looks like this:
proc_scsi_write() <- gets id and channel from simple_strtoul()
-> scsi_add_single_device() <- calls shost->transportt->user_scan()
-> ata_scsi_user_scan()
-> ata_find_dev()
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index d462c5a3a7ef..44ba292f2cd7 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -3030,10 +3030,12 @@ static unsigned int atapi_xlat(struct ata_queued_cmd *qc)
static struct ata_device *ata_find_dev(struct ata_port *ap, int devno)
{
if (!sata_pmp_attached(ap)) {
- if (likely(devno < ata_link_max_devices(&ap->link)))
+ if (likely(devno >= 0 &&
+ devno < ata_link_max_devices(&ap->link)))
return &ap->link.device[devno];
} else {
- if (likely(devno < ap->nr_pmp_links))
+ if (likely(devno >= 0 &&
+ devno < ap->nr_pmp_links))
return &ap->pmp_link[devno].device[0];
}
^ permalink raw reply related
* Re: [PATCH] libata: array underflow in ata_find_dev()
From: Tejun Heo @ 2017-07-19 14:34 UTC (permalink / raw)
To: Dan Carpenter; +Cc: linux-ide, kernel-janitors
In-Reply-To: <20170719100641.7ste3wo6ap2g2djv@mwanda>
Hello,
On Wed, Jul 19, 2017 at 01:06:41PM +0300, Dan Carpenter wrote:
> My static checker complains that "devno" can be negative, meaning that
> we read before the start of the loop. I've looked at the code, and I
> think the warning is right. This come from /proc so it's root only or
> it would be quite a quite a serious bug. The call tree looks like this:
>
> proc_scsi_write() <- gets id and channel from simple_strtoul()
> -> scsi_add_single_device() <- calls shost->transportt->user_scan()
> -> ata_scsi_user_scan()
> -> ata_find_dev()
>
> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
I'm impressed that the static checker caught this. Thanks a lot for
the fix, and lol at the code. :) Applied to libata/for-4.13-fixes w/
stable cc'd.
Thanks!
--
tejun
^ permalink raw reply
* [PATCH 000/102] Convert drivers to explicit reset API
From: Philipp Zabel @ 2017-07-19 15:25 UTC (permalink / raw)
To: linux-kernel
Cc: Philipp Zabel, David S. Miller, Emilio López, Adrian Hunter,
Alan Stern, Alan Tull, Alexandre Torgue, Andrew Lunn, Ben Skeggs,
Benjamin Gaignard, Bin Liu, Bjorn Andersson, Bjorn Helgaas,
Boris Brezillon, Brian Norris, Chanwoo Choi, Chen Feng,
Chen-Yu Tsai, Corentin Labbe
The reset control API has two modes: exclusive access, where the driver
expects to have full and immediate control over the state of the reset
line, and shared (clock-like) access, where drivers only request reset
deassertion while active, but don't care about the state of the reset line
while inactive.
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
reset lines") started to transition the reset control request API calls
to explicitly state whether the driver needs exclusive or shared reset
control behavior.
This series converts all drivers that currently implicitly request
exclusive reset controls to the corresponding explicit API call. It is,
for the most part, generated from the following semantic patch:
@@
expression rstc, dev, id;
@@
-rstc = reset_control_get(dev, id);
+rstc = reset_control_get_exclusive(dev, id);
@@
expression rstc, dev, id;
@@
-rstc = reset_control_get_optional(dev, id);
+rstc = reset_control_get_optional_exclusive(dev, id);
@@
expression rstc, node, id;
@@
-rstc = of_reset_control_get(node, id);
+rstc = of_reset_control_get_exclusive(node, id);
@@
expression rstc, node, index;
@@
-rstc = of_reset_control_get_by_index(node, index);
+rstc = of_reset_control_get_exclusive_by_index(node, index);
@@
expression rstc, dev, id;
@@
-rstc = devm_reset_control_get(dev, id);
+rstc = devm_reset_control_get_exclusive(dev, id);
@@
expression rstc, dev, id;
@@
-rstc = devm_reset_control_get_optional(dev, id);
+rstc = devm_reset_control_get_optional_exclusive(dev, id);
@@
expression rstc, dev, index;
@@
-rstc = devm_reset_control_get_by_index(dev, index);
+rstc = devm_reset_control_get_exclusive_by_index(dev, index);
After all driver patches are applied, the temporary transition helpers
can be removed.
regards
Philipp
Philipp Zabel (102):
ARM: rockchip: explicitly request exclusive reset control
ARM: socfpga: explicitly request exclusive reset control
MIPS: pci-mt7620: explicitly request exclusive reset control
ahci: st: explicitly request exclusive reset control
ata: sata_gemini: explicitly request exclusive reset control
ata: ahci_tegra: explicitly request exclusive reset control
bus: sunxi-rsb: explicitly request exclusive reset control
bus: tegra-gmi: explicitly request exclusive reset control
clk: sunxi: explicitly request exclusive reset control
clk: tegra: explicitly request exclusive reset control
clocksource/drivers/timer-stm32: explicitly request exclusive reset
control
clocksource/drivers/sun5i: explicitly request exclusive reset control
crypto: rockchip: explicitly request exclusive reset control
crypto: sun4i-ss - request exclusive reset control
PM / devfreq: tegra: explicitly request exclusive reset control
dmaengine: stm32-dma: explicitly request exclusive reset control
dmaengine: sun6i: explicitly request exclusive reset control
dmaengine: tegra-apb: explicitly request exclusive reset control
drm: kirin: explicitly request exclusive reset control
drm/nouveau/tegra: explicitly request exclusive reset control
drm/rockchip: explicitly request exclusive reset control
drm/sti: explicitly request exclusive reset control
drm/stm: explicitly request exclusive reset control
drm/sun4i: explicitly request exclusive reset control
drm/tegra: explicitly request exclusive reset control
gpu: host1x: explicitly request exclusive reset control
i2c: mv64xxx: explicitly request exclusive reset control
i2c: stm32f4: explicitly request exclusive reset control
i2c: sun6i-pw2i: explicitly request exclusive reset control
i2c: tegra: explicitly request exclusive reset control
iio: adc: rockchip_saradc: explicitly request exclusive reset control
iio: dac: stm32-dac-core: explicitly request exclusive reset control
Input: tegra-kbc - request exclusive reset control
coda: explicitly request exclusive reset control
st-rc: explicitly request exclusive reset control
stm32-dcmi: explicitly request exclusive reset control
rc: sunxi-cir: explicitly request exclusive reset control
mmc: dw_mmc: explicitly request exclusive reset control
mmc: sdhci-st: explicitly request exclusive reset control
mmc: sunxi: explicitly request exclusive reset control
mmc: tegra: explicitly request exclusive reset control
mtd: nand: sunxi: explicitly request exclusive reset control
mtd: spi-nor: stm32-quadspi: explicitly request exclusive reset
control
net: dsa: mt7530: explicitly request exclusive reset control
net: ethernet: hisi_femac: explicitly request exclusive reset control
net: ethernet: hix5hd2_gmac: explicitly request exclusive reset
control
net: stmmac: explicitly request exclusive reset control
net: stmmac: dwc-qos: explicitly request exclusive reset control
ath10k: explicitly request exclusive reset control
nvmem: lpc18xx-eeprom: explicitly request exclusive reset control
PCI: dwc: pcie-qcom: explicitly request exclusive reset control
PCI: imx6: explicitly request exclusive reset control
PCI: tegra: explicitly request exclusive reset control
PCI: rockchip: explicitly request exclusive reset control
phy: berlin-usb: explicitly request exclusive reset control
PCI: mediatek: explicitly request exclusive reset control
phy: qcom-usb-hs: explicitly request exclusive reset control
phy: rockchip-pcie: explicitly request exclusive reset control
phy: rockchip-typec: explicitly request exclusive reset control
phy: rockchip-usb: explicitly request exclusive reset control
phy: sun4i-usb: explicitly request exclusive reset control
phy: sun9i-usb: explicitly request exclusive reset control
phy: tegra: explicitly request exclusive reset control
phy: qcom-qmp: explicitly request exclusive reset control
phy: qcom-qusb2: explicitly request exclusive reset control
pinctrl: stm32: explicitly request exclusive reset control
pinctrl: sunxi: explicitly request exclusive reset control
pinctrl: tegra: explicitly request exclusive reset control
pwm: hibvt: explicitly request exclusive reset control
pwm: tegra: explicitly request exclusive reset control
remoteproc/keystone: explicitly request exclusive reset control
remoteproc: qcom: explicitly request exclusive reset control
remoteproc: st: explicitly request exclusive reset control
soc: mediatek: PMIC wrap: explicitly request exclusive reset control
soc/tegra: pmc: explicitly request exclusive reset control
spi: stm32: explicitly request exclusive reset control
spi: sun6i: explicitly request exclusive reset control
spi: tegra20-slink: explicitly request exclusive reset control
spi: tegra114: explicitly request exclusive reset control
spi: tegra20-sflash: explicitly request exclusive reset control
staging: nvec: explicitly request exclusive reset control
thermal: rockchip: explicitly request exclusive reset control
thermal: tegra: explicitly request exclusive reset control
serial: 8250_dw: explicitly request exclusive reset control
serial: tegra: explicitly request exclusive reset control
usb: chipidea: msm: explicitly request exclusive reset control
usb: dwc2: explicitly request exclusive reset control
usb: host: ehci-tegra: explicitly request exclusive reset control
usb: host: xhci-tegra: explicitly request exclusive reset control
usb: musb: sunxi: explicitly request exclusive reset control
usb: phy: msm: explicitly request exclusive reset control
usb: phy: qcom-8x16-usb: explicitly request exclusive reset control
watchdog: asm9260: explicitly request exclusive reset control
watchdog: mt7621: explicitly request exclusive reset control
watchdog: rt2880: explicitly request exclusive reset control
watchdog: zx2967: explicitly request exclusive reset control
ASoC: img: explicitly request exclusive reset control
ASoC: stm32: explicitly request exclusive reset control
ASoC: sun4i: explicitly request exclusive reset control
ASoC: tegra: explicitly request exclusive reset control
Documentation: devres: add explicit exclusive/shared reset control
request calls
reset: finish transition to explicit exclusive reset control requests
Documentation/driver-model/devres.txt | 7 ++-
arch/arm/mach-rockchip/platsmp.c | 2 +-
arch/mips/pci/pci-mt7620.c | 2 +-
drivers/ata/ahci_st.c | 6 +--
drivers/ata/ahci_tegra.c | 8 ++--
drivers/ata/sata_gemini.c | 4 +-
drivers/bus/sunxi-rsb.c | 2 +-
drivers/bus/tegra-gmi.c | 2 +-
drivers/clk/sunxi/clk-sun9i-mmc.c | 2 +-
drivers/clk/tegra/clk-dfll.c | 2 +-
drivers/clocksource/timer-stm32.c | 2 +-
drivers/clocksource/timer-sun5i.c | 2 +-
drivers/crypto/rockchip/rk3288_crypto.c | 2 +-
drivers/crypto/sunxi-ss/sun4i-ss-core.c | 3 +-
drivers/devfreq/tegra-devfreq.c | 2 +-
drivers/dma/stm32-dma.c | 2 +-
drivers/dma/sun6i-dma.c | 2 +-
drivers/dma/tegra20-apb-dma.c | 2 +-
drivers/fpga/altera-hps2fpga.c | 3 +-
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c | 2 +-
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 2 +-
drivers/gpu/drm/rockchip/cdn-dp-core.c | 8 ++--
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 2 +-
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 +-
drivers/gpu/drm/sti/sti_hdmi.c | 2 +-
drivers/gpu/drm/sti/sti_hqvdp.c | 2 +-
drivers/gpu/drm/sti/sti_tvout.c | 2 +-
drivers/gpu/drm/stm/ltdc.c | 2 +-
drivers/gpu/drm/sun4i/sun4i_backend.c | 4 +-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 +-
drivers/gpu/drm/sun4i/sun4i_tv.c | 2 +-
drivers/gpu/drm/sun4i/sun6i_drc.c | 2 +-
drivers/gpu/drm/sun4i/sun8i_mixer.c | 2 +-
drivers/gpu/drm/tegra/dc.c | 2 +-
drivers/gpu/drm/tegra/dpaux.c | 3 +-
drivers/gpu/drm/tegra/dsi.c | 2 +-
drivers/gpu/drm/tegra/gr3d.c | 6 +--
drivers/gpu/drm/tegra/hdmi.c | 2 +-
drivers/gpu/drm/tegra/sor.c | 2 +-
drivers/gpu/host1x/dev.c | 2 +-
drivers/i2c/busses/i2c-mv64xxx.c | 2 +-
drivers/i2c/busses/i2c-stm32f4.c | 2 +-
drivers/i2c/busses/i2c-sun6i-p2wi.c | 2 +-
drivers/i2c/busses/i2c-tegra.c | 2 +-
drivers/iio/adc/rockchip_saradc.c | 3 +-
drivers/iio/dac/stm32-dac-core.c | 2 +-
drivers/input/keyboard/tegra-kbc.c | 2 +-
drivers/media/platform/coda/coda-common.c | 3 +-
drivers/media/platform/stm32/stm32-dcmi.c | 2 +-
drivers/media/rc/st_rc.c | 2 +-
drivers/media/rc/sunxi-cir.c | 2 +-
drivers/mmc/host/dw_mmc.c | 2 +-
drivers/mmc/host/sdhci-st.c | 2 +-
drivers/mmc/host/sdhci-tegra.c | 3 +-
drivers/mmc/host/sunxi-mmc.c | 3 +-
drivers/mtd/nand/sunxi_nand.c | 2 +-
drivers/mtd/spi-nor/stm32-quadspi.c | 2 +-
drivers/net/dsa/mt7530.c | 3 +-
drivers/net/ethernet/hisilicon/hisi_femac.c | 4 +-
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c | 6 +--
.../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c | 2 +-
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 3 +-
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 +-
drivers/net/wireless/ath/ath10k/ahb.c | 15 ++++---
drivers/nvmem/lpc18xx_eeprom.c | 2 +-
drivers/pci/dwc/pci-imx6.c | 7 +--
drivers/pci/dwc/pcie-qcom.c | 40 +++++++++--------
drivers/pci/host/pci-tegra.c | 6 +--
drivers/pci/host/pcie-mediatek.c | 2 +-
drivers/pci/host/pcie-rockchip.c | 15 ++++---
drivers/phy/allwinner/phy-sun4i-usb.c | 2 +-
drivers/phy/allwinner/phy-sun9i-usb.c | 4 +-
drivers/phy/marvell/phy-berlin-usb.c | 2 +-
drivers/phy/qualcomm/phy-qcom-qmp.c | 4 +-
drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 +-
drivers/phy/qualcomm/phy-qcom-usb-hs.c | 3 +-
drivers/phy/rockchip/phy-rockchip-pcie.c | 2 +-
drivers/phy/rockchip/phy-rockchip-typec.c | 6 +--
drivers/phy/rockchip/phy-rockchip-usb.c | 2 +-
drivers/phy/tegra/xusb-tegra210.c | 4 +-
drivers/phy/tegra/xusb.c | 2 +-
drivers/pinctrl/stm32/pinctrl-stm32.c | 2 +-
drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c | 2 +-
drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c | 2 +-
drivers/pinctrl/tegra/pinctrl-tegra-xusb.c | 2 +-
drivers/pwm/pwm-hibvt.c | 2 +-
drivers/pwm/pwm-tegra.c | 2 +-
drivers/remoteproc/keystone_remoteproc.c | 2 +-
drivers/remoteproc/qcom_q6v5_pil.c | 3 +-
drivers/remoteproc/st_remoteproc.c | 6 ++-
drivers/reset/core.c | 2 +-
drivers/soc/mediatek/mtk-pmic-wrap.c | 5 ++-
drivers/soc/tegra/pmc.c | 2 +-
drivers/spi/spi-stm32.c | 2 +-
drivers/spi/spi-sun6i.c | 2 +-
drivers/spi/spi-tegra114.c | 2 +-
drivers/spi/spi-tegra20-sflash.c | 2 +-
drivers/spi/spi-tegra20-slink.c | 2 +-
drivers/staging/nvec/nvec.c | 2 +-
drivers/thermal/rockchip_thermal.c | 3 +-
drivers/thermal/tegra/soctherm.c | 3 +-
drivers/tty/serial/8250/8250_dw.c | 2 +-
drivers/tty/serial/serial-tegra.c | 2 +-
drivers/usb/chipidea/ci_hdrc_msm.c | 2 +-
drivers/usb/dwc2/platform.c | 3 +-
drivers/usb/host/ehci-tegra.c | 5 ++-
drivers/usb/host/xhci-tegra.c | 6 ++-
drivers/usb/musb/sunxi.c | 2 +-
drivers/usb/phy/phy-msm-usb.c | 4 +-
drivers/usb/phy/phy-qcom-8x16-usb.c | 2 +-
drivers/watchdog/asm9260_wdt.c | 2 +-
drivers/watchdog/mt7621_wdt.c | 2 +-
drivers/watchdog/rt2880_wdt.c | 2 +-
drivers/watchdog/zx2967_wdt.c | 2 +-
include/linux/reset.h | 50 ----------------------
sound/soc/img/img-i2s-in.c | 2 +-
sound/soc/img/img-i2s-out.c | 2 +-
sound/soc/img/img-parallel-out.c | 2 +-
sound/soc/img/img-spdif-in.c | 2 +-
sound/soc/img/img-spdif-out.c | 2 +-
sound/soc/stm/stm32_i2s.c | 2 +-
sound/soc/stm/stm32_sai.c | 2 +-
sound/soc/stm/stm32_spdifrx.c | 2 +-
sound/soc/sunxi/sun4i-codec.c | 3 +-
sound/soc/sunxi/sun4i-i2s.c | 2 +-
sound/soc/sunxi/sun4i-spdif.c | 3 +-
sound/soc/tegra/tegra30_ahub.c | 4 +-
128 files changed, 226 insertions(+), 235 deletions(-)
--
2.11.0
Cc: "David S. Miller" <davem@davemloft.net>
Cc: "Emilio López" <emilio@elopez.com.ar>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Alan Tull <atull@kernel.org>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Cc: Bin Liu <b-liu@ti.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Chanwoo Choi <cw00.choi@samsung.com>
Cc: Chen Feng <puck.chen@hisilicon.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Corentin Labbe <clabbe.montjoie@gmail.com>
Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: David Airlie <airlied@linux.ie>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Felipe Balbi <balbi@kernel.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Hartmut Knaack <knaack.h@gmx.de>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jiri Slaby <jslaby@suse.com>
Cc: Joachim Eastwood <manabian@gmail.com>
Cc: John Youn <johnyoun@synopsys.com>
Cc: Jon Hunter <jonathanh@nvidia.com>
Cc: Jonathan Cameron <jic23@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Kalle Valo <kvalo@qca.qualcomm.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Marc Dietrich <marvin24@gmx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Mark Yao <mark.yao@rock-chips.com>
Cc: Mathias Nyman <mathias.nyman@intel.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Moritz Fischer <moritz.fischer@ettus.com>
Cc: MyungJoo Ham <myungjoo.ham@samsung.com>
Cc: Ohad Ben-Cohen <ohad@wizery.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Peter Chen <Peter.Chen@nxp.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net>
Cc: Philippe Cornu <philippe.cornu@st.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Rakesh Iyer <riyer@nvidia.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Richard Weinberger <richard@nod.at>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Rongrong Zou <zourongrong@gmail.com>
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Salil Mehta <salil.mehta@huawei.com>
Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Tejun Heo <tj@kernel.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Vincent Abriou <vincent.abriou@st.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Cc: Wim Van Sebroeck <wim@iguana.be>
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Xinliang Liu <z.liuxinliang@hisilicon.com>
Cc: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Cc: Yannick Fertre <yannick.fertre@st.com>
Cc: Yisen Zhuang <yisen.zhuang@huawei.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: alsa-devel@alsa-project.org
Cc: ath10k@lists.infradead.org
Cc: devel@driverdev.osuosl.org
Cc: dmaengine@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-crypto@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Cc: linux-fpga@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-i2c@vger.kernel.org
Cc: linux-ide@vger.kernel.org
Cc: linux-iio@vger.kernel.org
Cc: linux-input@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-media@vger.kernel.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-mips@linux-mips.org
Cc: linux-mmc@vger.kernel.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-pci@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-pwm@vger.kernel.org
Cc: linux-remoteproc@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Cc: linux-serial@vger.kernel.org
Cc: linux-spi@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-usb@vger.kernel.org
Cc: linux-watchdog@vger.kernel.org
Cc: linux-wireless@vger.kernel.org
Cc: netdev@vger.kernel.org
Cc: nouveau@lists.freedesktop.org
^ permalink raw reply
* [PATCH 004/102] ahci: st: explicitly request exclusive reset control
From: Philipp Zabel @ 2017-07-19 15:25 UTC (permalink / raw)
To: linux-kernel; +Cc: Philipp Zabel, Patrice Chotard, Tejun Heo, linux-ide
In-Reply-To: <20170719152646.25903-1-p.zabel@pengutronix.de>
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
reset lines") started to transition the reset control request API calls
to explicitly state whether the driver needs exclusive or shared reset
control behavior. Convert all drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.
No functional changes.
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: linux-ide@vger.kernel.org
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/ata/ahci_st.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/ata/ahci_st.c b/drivers/ata/ahci_st.c
index bc345f2495553..8a26e917dae90 100644
--- a/drivers/ata/ahci_st.c
+++ b/drivers/ata/ahci_st.c
@@ -108,19 +108,19 @@ static int st_ahci_probe_resets(struct ahci_host_priv *hpriv,
{
struct st_ahci_drv_data *drv_data = hpriv->plat_data;
- drv_data->pwr = devm_reset_control_get(dev, "pwr-dwn");
+ drv_data->pwr = devm_reset_control_get_exclusive(dev, "pwr-dwn");
if (IS_ERR(drv_data->pwr)) {
dev_info(dev, "power reset control not defined\n");
drv_data->pwr = NULL;
}
- drv_data->sw_rst = devm_reset_control_get(dev, "sw-rst");
+ drv_data->sw_rst = devm_reset_control_get_exclusive(dev, "sw-rst");
if (IS_ERR(drv_data->sw_rst)) {
dev_info(dev, "soft reset control not defined\n");
drv_data->sw_rst = NULL;
}
- drv_data->pwr_rst = devm_reset_control_get(dev, "pwr-rst");
+ drv_data->pwr_rst = devm_reset_control_get_exclusive(dev, "pwr-rst");
if (IS_ERR(drv_data->pwr_rst)) {
dev_dbg(dev, "power soft reset control not defined\n");
drv_data->pwr_rst = NULL;
--
2.11.0
^ permalink raw reply related
* [PATCH 005/102] ata: sata_gemini: explicitly request exclusive reset control
From: Philipp Zabel @ 2017-07-19 15:25 UTC (permalink / raw)
To: linux-kernel; +Cc: Philipp Zabel, Linus Walleij, Tejun Heo, linux-ide
In-Reply-To: <20170719152646.25903-1-p.zabel@pengutronix.de>
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
reset lines") started to transition the reset control request API calls
to explicitly state whether the driver needs exclusive or shared reset
control behavior. Convert all drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.
No functional changes.
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Tejun Heo <tj@kernel.org>
Cc: linux-ide@vger.kernel.org
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/ata/sata_gemini.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ata/sata_gemini.c b/drivers/ata/sata_gemini.c
index 8c704523bae7d..7ae713a33e11a 100644
--- a/drivers/ata/sata_gemini.c
+++ b/drivers/ata/sata_gemini.c
@@ -274,14 +274,14 @@ static int gemini_sata_bridge_init(struct sata_gemini *sg)
return ret;
}
- sg->sata0_reset = devm_reset_control_get(dev, "sata0");
+ sg->sata0_reset = devm_reset_control_get_exclusive(dev, "sata0");
if (IS_ERR(sg->sata0_reset)) {
dev_err(dev, "no SATA0 reset controller\n");
clk_disable_unprepare(sg->sata1_pclk);
clk_disable_unprepare(sg->sata0_pclk);
return PTR_ERR(sg->sata0_reset);
}
- sg->sata1_reset = devm_reset_control_get(dev, "sata1");
+ sg->sata1_reset = devm_reset_control_get_exclusive(dev, "sata1");
if (IS_ERR(sg->sata1_reset)) {
dev_err(dev, "no SATA1 reset controller\n");
clk_disable_unprepare(sg->sata1_pclk);
--
2.11.0
^ permalink raw reply related
* [PATCH 006/102] ata: ahci_tegra: explicitly request exclusive reset control
From: Philipp Zabel @ 2017-07-19 15:25 UTC (permalink / raw)
To: linux-kernel
Cc: Philipp Zabel, Tejun Heo, Thierry Reding, Jonathan Hunter,
linux-ide, linux-tegra
In-Reply-To: <20170719152646.25903-1-p.zabel@pengutronix.de>
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
reset lines") started to transition the reset control request API calls
to explicitly state whether the driver needs exclusive or shared reset
control behavior. Convert all drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.
No functional changes.
Cc: Tejun Heo <tj@kernel.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-ide@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/ata/ahci_tegra.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/ata/ahci_tegra.c b/drivers/ata/ahci_tegra.c
index 3a62eb246d80b..e9daf938738c5 100644
--- a/drivers/ata/ahci_tegra.c
+++ b/drivers/ata/ahci_tegra.c
@@ -319,19 +319,21 @@ static int tegra_ahci_probe(struct platform_device *pdev)
if (IS_ERR(tegra->sata_regs))
return PTR_ERR(tegra->sata_regs);
- tegra->sata_rst = devm_reset_control_get(&pdev->dev, "sata");
+ tegra->sata_rst = devm_reset_control_get_exclusive(&pdev->dev, "sata");
if (IS_ERR(tegra->sata_rst)) {
dev_err(&pdev->dev, "Failed to get sata reset\n");
return PTR_ERR(tegra->sata_rst);
}
- tegra->sata_oob_rst = devm_reset_control_get(&pdev->dev, "sata-oob");
+ tegra->sata_oob_rst = devm_reset_control_get_exclusive(&pdev->dev,
+ "sata-oob");
if (IS_ERR(tegra->sata_oob_rst)) {
dev_err(&pdev->dev, "Failed to get sata-oob reset\n");
return PTR_ERR(tegra->sata_oob_rst);
}
- tegra->sata_cold_rst = devm_reset_control_get(&pdev->dev, "sata-cold");
+ tegra->sata_cold_rst = devm_reset_control_get_exclusive(&pdev->dev,
+ "sata-cold");
if (IS_ERR(tegra->sata_cold_rst)) {
dev_err(&pdev->dev, "Failed to get sata-cold reset\n");
return PTR_ERR(tegra->sata_cold_rst);
--
2.11.0
^ permalink raw reply related
* Re: [PATCH 000/102] Convert drivers to explicit reset API
From: Thomas Petazzoni @ 2017-07-19 19:15 UTC (permalink / raw)
To: Philipp Zabel
Cc: Andrew Lunn, Prashant Gaikwad, Heiko Stuebner, Peter Chen,
Linus Walleij, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
Marc Dietrich, Rakesh Iyer, Peter Meerwald-Stadler,
linux-clk-u79uwXL29TY76Z2rM5mHXA, Wolfram Sang, Xinliang Liu,
Chanwoo Choi, Alan Stern, Jiri Slaby, Michael Turquette,
Guenter Roeck, Ohad Ben-Cohen, linux-pm-u79uwXL29TY76Z2rM5mHXA,
Thomas Gleixner, Vincent Abriou, Bin Liu, Greg Kroah-Hartman,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-wireless-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170719152646.25903-1-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Hello,
On Wed, 19 Jul 2017 17:25:04 +0200, Philipp Zabel wrote:
> The reset control API has two modes: exclusive access, where the driver
> expects to have full and immediate control over the state of the reset
> line, and shared (clock-like) access, where drivers only request reset
> deassertion while active, but don't care about the state of the reset line
> while inactive.
>
> Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
> reset lines") started to transition the reset control request API calls
> to explicitly state whether the driver needs exclusive or shared reset
> control behavior.
>
> This series converts all drivers that currently implicitly request
> exclusive reset controls to the corresponding explicit API call. It is,
> for the most part, generated from the following semantic patch:
>
> @@
> expression rstc, dev, id;
> @@
> -rstc = reset_control_get(dev, id);
> +rstc = reset_control_get_exclusive(dev, id);
I don't know if it has been discussed in the past, so forgive me if it
has been. Have you considered adding a "int flags" argument to the
existing reset_control_get_*() functions, rather than introducing
separate exclusive variants ?
Indeed, with a "int flags" argument you could in the future add more
variants/behaviors without actually multiplying the number of
functions. Something like the "flags" argument for request_irq() for
example.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* [PATCH] powerpc/asm/cacheflush: Cleanup cacheflush function params
From: Matt Brown @ 2017-07-20 6:28 UTC (permalink / raw)
To: linuxppc-dev, linux-ide, dri-devel, adi-buildroot-devel,
linux-mmc, linux-mtd, linux-arm-kernel, linux-spi, linux-serial,
linux-usb
The cacheflush prototypes currently use start and stop values and each
call requires typecasting the address to an unsigned long.
This patch changes the cacheflush prototypes to follow the x86 style of
using a base and size values, with base being a void pointer.
All callers of the cacheflush functions, including drivers, have been
modified to conform to the new prototypes.
The 64 bit cacheflush functions which were implemented in assembly code
(flush_dcache_range, flush_inval_dcache_range) have been translated into
C for readability and coherence.
Signed-off-by: Matt Brown <matthew.brown.dev@gmail.com>
---
arch/powerpc/include/asm/cacheflush.h | 47 +++++++++++++++++--------
arch/powerpc/kernel/misc_64.S | 52 ----------------------------
arch/powerpc/mm/dma-noncoherent.c | 15 ++++----
arch/powerpc/platforms/512x/mpc512x_shared.c | 10 +++---
arch/powerpc/platforms/85xx/smp.c | 6 ++--
arch/powerpc/sysdev/dart_iommu.c | 5 +--
drivers/ata/pata_bf54x.c | 3 +-
drivers/char/agp/uninorth-agp.c | 6 ++--
drivers/gpu/drm/drm_cache.c | 3 +-
drivers/macintosh/smu.c | 15 ++++----
drivers/mmc/host/bfin_sdh.c | 3 +-
drivers/mtd/nand/bf5xx_nand.c | 6 ++--
drivers/soc/fsl/qbman/dpaa_sys.h | 2 +-
drivers/soc/fsl/qbman/qman_ccsr.c | 3 +-
drivers/spi/spi-bfin5xx.c | 10 +++---
drivers/tty/serial/mpsc.c | 46 ++++++++----------------
drivers/usb/musb/blackfin.c | 6 ++--
17 files changed, 86 insertions(+), 152 deletions(-)
diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
index 11843e3..b8f04c3 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -51,13 +51,13 @@ static inline void __flush_dcache_icache_phys(unsigned long physaddr)
* Write any modified data cache blocks out to memory and invalidate them.
* Does not invalidate the corresponding instruction cache blocks.
*/
-static inline void flush_dcache_range(unsigned long start, unsigned long stop)
+static inline void flush_dcache_range(void *start, unsigned long size)
{
- void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
- unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
+ void *addr = (void *)((u32)start & ~(L1_CACHE_BYTES - 1));
+ unsigned long len = size + (L1_CACHE_BYTES - 1);
unsigned long i;
- for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
+ for (i = 0; i < len >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
dcbf(addr);
mb(); /* sync */
}
@@ -67,13 +67,13 @@ static inline void flush_dcache_range(unsigned long start, unsigned long stop)
* Does not invalidate the corresponding cache lines (especially for
* any corresponding instruction cache).
*/
-static inline void clean_dcache_range(unsigned long start, unsigned long stop)
+static inline void clean_dcache_range(void *start, unsigned long size)
{
- void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
- unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
+ void *addr = (void *)((u32)start & ~(L1_CACHE_BYTES - 1));
+ unsigned long len = size + (L1_CACHE_BYTES - 1);
unsigned long i;
- for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
+ for (i = 0; i < len >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
dcbst(addr);
mb(); /* sync */
}
@@ -83,22 +83,39 @@ static inline void clean_dcache_range(unsigned long start, unsigned long stop)
* to invalidate the cache so the PPC core doesn't get stale data
* from the CPM (no cache snooping here :-).
*/
-static inline void invalidate_dcache_range(unsigned long start,
- unsigned long stop)
+static inline void invalidate_dcache_range(void *start, unsigned long size)
{
- void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
- unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
+ void *addr = (void *)((u32)start & ~(L1_CACHE_BYTES - 1));
+ unsigned long len = size + (L1_CACHE_SHIFT - 1);
unsigned long i;
- for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
+ for (i = 0; i < len >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
dcbi(addr);
mb(); /* sync */
}
#endif /* CONFIG_PPC32 */
#ifdef CONFIG_PPC64
-extern void flush_dcache_range(unsigned long start, unsigned long stop);
-extern void flush_inval_dcache_range(unsigned long start, unsigned long stop);
+static inline void flush_dcache_range(void *start, unsigned long size)
+{
+ void *addr = (void *)((u64)start & ~(L1_CACHE_BYTES - 1));
+ unsigned long len = size + (L1_CACHE_BYTES - 1);
+ unsigned long i;
+
+ for (i = 0; i < len >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
+ dcbf(addr);
+ mb(); /* sync */
+}
+static inline void flush_inval_dcache_range(void *start, unsigned long size)
+{
+ void *addr = (void *)((u64)start & ~(L1_CACHE_BYTES - 1));
+ unsigned long len = size + (L1_CACHE_BYTES - 1);
+ unsigned long i;
+
+ for (i = 0; i < len >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
+ dcbi(addr);
+ mb(); /* sync */
+}
#endif
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 0ed5c55..a4ebeec 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -114,58 +114,6 @@ _ASM_NOKPROBE_SYMBOL(flush_icache_range)
EXPORT_SYMBOL(flush_icache_range)
/*
- * Like above, but only do the D-cache.
- *
- * flush_dcache_range(unsigned long start, unsigned long stop)
- *
- * flush all bytes from start to stop-1 inclusive
- */
-_GLOBAL_TOC(flush_dcache_range)
-
-/*
- * Flush the data cache to memory
- *
- * Different systems have different cache line sizes
- */
- ld r10,PPC64_CACHES@toc(r2)
- lwz r7,DCACHEL1BLOCKSIZE(r10) /* Get dcache block size */
- addi r5,r7,-1
- andc r6,r3,r5 /* round low to line bdy */
- subf r8,r6,r4 /* compute length */
- add r8,r8,r5 /* ensure we get enough */
- lwz r9,DCACHEL1LOGBLOCKSIZE(r10) /* Get log-2 of dcache block size */
- srw. r8,r8,r9 /* compute line count */
- beqlr /* nothing to do? */
- mtctr r8
-0: dcbst 0,r6
- add r6,r6,r7
- bdnz 0b
- sync
- blr
-EXPORT_SYMBOL(flush_dcache_range)
-
-_GLOBAL(flush_inval_dcache_range)
- ld r10,PPC64_CACHES@toc(r2)
- lwz r7,DCACHEL1BLOCKSIZE(r10) /* Get dcache block size */
- addi r5,r7,-1
- andc r6,r3,r5 /* round low to line bdy */
- subf r8,r6,r4 /* compute length */
- add r8,r8,r5 /* ensure we get enough */
- lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block size */
- srw. r8,r8,r9 /* compute line count */
- beqlr /* nothing to do? */
- sync
- isync
- mtctr r8
-0: dcbf 0,r6
- add r6,r6,r7
- bdnz 0b
- sync
- isync
- blr
-
-
-/*
* Flush a particular page from the data cache to RAM.
* Note: this is necessary because the instruction cache does *not*
* snoop from the data cache.
diff --git a/arch/powerpc/mm/dma-noncoherent.c b/arch/powerpc/mm/dma-noncoherent.c
index 3825284..5fd3171 100644
--- a/arch/powerpc/mm/dma-noncoherent.c
+++ b/arch/powerpc/mm/dma-noncoherent.c
@@ -204,9 +204,9 @@ __dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t
* kernel direct-mapped region for device DMA.
*/
{
- unsigned long kaddr = (unsigned long)page_address(page);
+ void *kaddr = page_address(page);
memset(page_address(page), 0, size);
- flush_dcache_range(kaddr, kaddr + size);
+ flush_dcache_range(kaddr, size);
}
/*
@@ -316,9 +316,6 @@ EXPORT_SYMBOL(__dma_free_coherent);
*/
void __dma_sync(void *vaddr, size_t size, int direction)
{
- unsigned long start = (unsigned long)vaddr;
- unsigned long end = start + size;
-
switch (direction) {
case DMA_NONE:
BUG();
@@ -328,15 +325,15 @@ void __dma_sync(void *vaddr, size_t size, int direction)
* the potential for discarding uncommitted data from the cache
*/
if ((start | end) & (L1_CACHE_BYTES - 1))
- flush_dcache_range(start, end);
+ flush_dcache_range(vaddr, size);
else
- invalidate_dcache_range(start, end);
+ invalidate_dcache_range(vaddr, size);
break;
case DMA_TO_DEVICE: /* writeback only */
- clean_dcache_range(start, end);
+ clean_dcache_range(vaddr, size);
break;
case DMA_BIDIRECTIONAL: /* writeback and invalidate */
- flush_dcache_range(start, end);
+ flush_dcache_range(vaddr, size);
break;
}
}
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
index 6b4f4cb..0f3a7d9 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -225,7 +225,7 @@ static void __init mpc512x_init_diu(void)
phys_addr_t desc;
void __iomem *vaddr;
unsigned long mode, pix_fmt, res, bpp;
- unsigned long dst;
+ void *dst;
np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-diu");
if (!np) {
@@ -254,8 +254,8 @@ static void __init mpc512x_init_diu(void)
}
memcpy(&diu_shared_fb.ad0, vaddr, sizeof(struct diu_ad));
/* flush fb area descriptor */
- dst = (unsigned long)&diu_shared_fb.ad0;
- flush_dcache_range(dst, dst + sizeof(struct diu_ad) - 1);
+ dst = &diu_shared_fb.ad0;
+ flush_dcache_range(dst, sizeof(struct diu_ad) - 1);
res = in_be32(&diu_reg->disp_size);
pix_fmt = in_le32(vaddr);
@@ -274,8 +274,8 @@ static void __init mpc512x_init_diu(void)
}
memcpy(&diu_shared_fb.gamma, vaddr, sizeof(diu_shared_fb.gamma));
/* flush gamma table */
- dst = (unsigned long)&diu_shared_fb.gamma;
- flush_dcache_range(dst, dst + sizeof(diu_shared_fb.gamma) - 1);
+ dst = &diu_shared_fb.gamma;
+ flush_dcache_range(dst, sizeof(diu_shared_fb.gamma) - 1);
iounmap(vaddr);
out_be32(&diu_reg->gamma, virt_to_phys(&diu_shared_fb.gamma));
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index f51fd35..645edc9 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -166,14 +166,12 @@ static void qoriq_cpu_kill(unsigned int cpu)
*/
static inline void flush_spin_table(void *spin_table)
{
- flush_dcache_range((ulong)spin_table,
- (ulong)spin_table + sizeof(struct epapr_spin_table));
+ flush_dcache_range(spin_table, sizeof(struct epapr_spin_table));
}
static inline u32 read_spin_table_addr_l(void *spin_table)
{
- flush_dcache_range((ulong)spin_table,
- (ulong)spin_table + sizeof(struct epapr_spin_table));
+ flush_dcache_range(spin_table, sizeof(struct epapr_spin_table));
return in_be32(&((struct epapr_spin_table *)spin_table)->addr_l);
}
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index 3573d54..149b6e8 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -152,12 +152,13 @@ static void dart_cache_sync(unsigned int *base, unsigned int count)
* comment in Darwin indicating that the memory controller
* can prefetch unmapped memory under some circumstances.
*/
+ unsigned long size = (count + 1) * sizeof(unsigned int);
unsigned long start = (unsigned long)base;
- unsigned long end = start + (count + 1) * sizeof(unsigned int);
+ unsigned long end = start + size;
unsigned int tmp;
/* Perform a standard cache flush */
- flush_inval_dcache_range(start, end);
+ flush_inval_dcache_range(base, size);
/*
* Perform the sequence described in the CPC925 manual to
diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c
index 0e55a8d..485e070 100644
--- a/drivers/ata/pata_bf54x.c
+++ b/drivers/ata/pata_bf54x.c
@@ -866,8 +866,7 @@ static void bfin_bmdma_setup(struct ata_queued_cmd *qc)
/* Set the last descriptor to stop mode */
dma_desc_cpu[qc->n_elem - 1].cfg &= ~(DMAFLOW | NDSIZE);
- flush_dcache_range((unsigned int)dma_desc_cpu,
- (unsigned int)dma_desc_cpu +
+ flush_dcache_range(dma_desc_cpu,
qc->n_elem * sizeof(struct dma_desc_array));
/* Enable ATA DMA operation*/
diff --git a/drivers/char/agp/uninorth-agp.c b/drivers/char/agp/uninorth-agp.c
index fdced54..e46eae2 100644
--- a/drivers/char/agp/uninorth-agp.c
+++ b/drivers/char/agp/uninorth-agp.c
@@ -186,8 +186,7 @@ static int uninorth_insert_memory(struct agp_memory *mem, off_t pg_start, int ty
else
gp[i] = cpu_to_le32((page_to_phys(mem->pages[i]) & 0xFFFFF000UL) |
0x1UL);
- flush_dcache_range((unsigned long)__va(page_to_phys(mem->pages[i])),
- (unsigned long)__va(page_to_phys(mem->pages[i]))+0x1000);
+ flush_dcache_range(__va(page_to_phys(mem->pages[i])), 0x1000);
}
mb();
uninorth_tlbflush(mem);
@@ -416,8 +415,7 @@ static int uninorth_create_gatt_table(struct agp_bridge_data *bridge)
bridge->gatt_table_real = (u32 *) table;
/* Need to clear out any dirty data still sitting in caches */
- flush_dcache_range((unsigned long)table,
- (unsigned long)table_end + 1);
+ flush_dcache_range(table, (unsigned long)(table_end - table) + 1);
bridge->gatt_table = vmap(uninorth_priv.pages_arr, (1 << page_order), 0, PAGE_KERNEL_NCG);
if (bridge->gatt_table == NULL)
diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
index 3bd76e9..5b8062f 100644
--- a/drivers/gpu/drm/drm_cache.c
+++ b/drivers/gpu/drm/drm_cache.c
@@ -100,8 +100,7 @@ drm_clflush_pages(struct page *pages[], unsigned long num_pages)
continue;
page_virtual = kmap_atomic(page);
- flush_dcache_range((unsigned long)page_virtual,
- (unsigned long)page_virtual + PAGE_SIZE);
+ flush_dcache_range(page_virtual, PAGE_SIZE);
kunmap_atomic(page_virtual);
}
#else
diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c
index 1ac6642..e92507d 100644
--- a/drivers/macintosh/smu.c
+++ b/drivers/macintosh/smu.c
@@ -111,8 +111,9 @@ static void smu_i2c_retry(unsigned long data);
static void smu_start_cmd(void)
{
- unsigned long faddr, fend;
struct smu_cmd *cmd;
+ unsigned long flen;
+ void *faddr;
if (list_empty(&smu->cmd_list))
return;
@@ -132,9 +133,9 @@ static void smu_start_cmd(void)
memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
/* Flush command and data to RAM */
- faddr = (unsigned long)smu->cmd_buf;
- fend = faddr + smu->cmd_buf->length + 2;
- flush_inval_dcache_range(faddr, fend);
+ faddr = smu->cmd_buf;
+ flen = smu->cmd_buf->length + 2;
+ flush_inval_dcache_range(faddr, flen);
/* We also disable NAP mode for the duration of the command
@@ -186,8 +187,8 @@ static irqreturn_t smu_db_intr(int irq, void *arg)
goto bail;
if (rc == 0) {
- unsigned long faddr;
int reply_len;
+ void *faddr;
u8 ack;
/* CPU might have brought back the cache line, so we need
@@ -195,8 +196,8 @@ static irqreturn_t smu_db_intr(int irq, void *arg)
* flush the entire buffer for now as we haven't read the
* reply length (it's only 2 cache lines anyway)
*/
- faddr = (unsigned long)smu->cmd_buf;
- flush_inval_dcache_range(faddr, faddr + 256);
+ faddr = smu->cmd_buf;
+ flush_inval_dcache_range(faddr, 256);
/* Now check ack */
ack = (~cmd->cmd) & 0xff;
diff --git a/drivers/mmc/host/bfin_sdh.c b/drivers/mmc/host/bfin_sdh.c
index 526231e..479a5cc 100644
--- a/drivers/mmc/host/bfin_sdh.c
+++ b/drivers/mmc/host/bfin_sdh.c
@@ -175,8 +175,7 @@ static int sdh_setup_data(struct sdh_host *host, struct mmc_data *data)
host->sg_cpu[i].x_modify);
}
}
- flush_dcache_range((unsigned int)host->sg_cpu,
- (unsigned int)host->sg_cpu +
+ flush_dcache_range(host->sg_cpu,
host->dma_len * sizeof(struct dma_desc_array));
/* Set the last descriptor to stop mode */
host->sg_cpu[host->dma_len - 1].cfg &= ~(DMAFLOW | NDSIZE);
diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c
index 3962f55..6f485a4 100644
--- a/drivers/mtd/nand/bf5xx_nand.c
+++ b/drivers/mtd/nand/bf5xx_nand.c
@@ -492,11 +492,9 @@ static void bf5xx_nand_dma_rw(struct mtd_info *mtd,
* can be introduced to your driver.
*/
if (is_read)
- invalidate_dcache_range((unsigned int)buf,
- (unsigned int)(buf + chip->ecc.size));
+ invalidate_dcache_range(buf, chip->ecc.size);
else
- flush_dcache_range((unsigned int)buf,
- (unsigned int)(buf + chip->ecc.size));
+ flush_dcache_range(buf, chip->ecc.size);
/*
* This register must be written before each page is
diff --git a/drivers/soc/fsl/qbman/dpaa_sys.h b/drivers/soc/fsl/qbman/dpaa_sys.h
index 2ce394a..e49a961 100644
--- a/drivers/soc/fsl/qbman/dpaa_sys.h
+++ b/drivers/soc/fsl/qbman/dpaa_sys.h
@@ -56,7 +56,7 @@
static inline void dpaa_flush(void *p)
{
#ifdef CONFIG_PPC
- flush_dcache_range((unsigned long)p, (unsigned long)p+64);
+ flush_dcache_range(p, 64);
#elif defined(CONFIG_ARM32)
__cpuc_flush_dcache_area(p, 64);
#elif defined(CONFIG_ARM64)
diff --git a/drivers/soc/fsl/qbman/qman_ccsr.c b/drivers/soc/fsl/qbman/qman_ccsr.c
index 90bc40c..ba10979 100644
--- a/drivers/soc/fsl/qbman/qman_ccsr.c
+++ b/drivers/soc/fsl/qbman/qman_ccsr.c
@@ -450,8 +450,7 @@ static int zero_priv_mem(struct device *dev, struct device_node *node,
return -ENOMEM;
memset_io(tmpp, 0, sz);
- flush_dcache_range((unsigned long)tmpp,
- (unsigned long)tmpp + sz);
+ flush_dcache_range(tmpp, sz);
iounmap(tmpp);
return 0;
diff --git a/drivers/spi/spi-bfin5xx.c b/drivers/spi/spi-bfin5xx.c
index 249c7a3..7e90746 100644
--- a/drivers/spi/spi-bfin5xx.c
+++ b/drivers/spi/spi-bfin5xx.c
@@ -730,9 +730,8 @@ static void bfin_spi_pump_transfers(unsigned long data)
/* invalidate caches, if needed */
if (bfin_addr_dcacheable((unsigned long) drv_data->rx))
- invalidate_dcache_range((unsigned long) drv_data->rx,
- (unsigned long) (drv_data->rx +
- drv_data->len_in_bytes));
+ invalidate_dcache_range(drv_data->rx,
+ drv_data->len_in_bytes);
dma_config |= WNR;
dma_start_addr = (unsigned long)drv_data->rx;
@@ -743,9 +742,8 @@ static void bfin_spi_pump_transfers(unsigned long data)
/* flush caches, if needed */
if (bfin_addr_dcacheable((unsigned long) drv_data->tx))
- flush_dcache_range((unsigned long) drv_data->tx,
- (unsigned long) (drv_data->tx +
- drv_data->len_in_bytes));
+ flush_dcache_range(drv_data->tx,
+ drv_data->len_in_bytes);
dma_start_addr = (unsigned long)drv_data->tx;
cr |= BIT_CTL_TIMOD_DMA_TX;
diff --git a/drivers/tty/serial/mpsc.c b/drivers/tty/serial/mpsc.c
index 67ffecc..eaab3b3 100644
--- a/drivers/tty/serial/mpsc.c
+++ b/drivers/tty/serial/mpsc.c
@@ -529,8 +529,7 @@ static void mpsc_sdma_start_tx(struct mpsc_port_info *pi)
DMA_FROM_DEVICE);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- invalidate_dcache_range((ulong)txre,
- (ulong)txre + MPSC_TXRE_SIZE);
+ invalidate_dcache_range(txre, MPSC_TXRE_SIZE);
#endif
if (be32_to_cpu(txre->cmdstat) & SDMA_DESC_CMDSTAT_O) {
@@ -875,9 +874,7 @@ static void mpsc_init_rings(struct mpsc_port_info *pi)
MPSC_DMA_ALLOC_SIZE, DMA_BIDIRECTIONAL);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- flush_dcache_range((ulong)pi->dma_region,
- (ulong)pi->dma_region
- + MPSC_DMA_ALLOC_SIZE);
+ flush_dcache_range(pi->dma_region, MPSC_DMA_ALLOC_SIZE);
#endif
return;
@@ -950,8 +947,7 @@ static int mpsc_rx_intr(struct mpsc_port_info *pi, unsigned long *flags)
DMA_FROM_DEVICE);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- invalidate_dcache_range((ulong)rxre,
- (ulong)rxre + MPSC_RXRE_SIZE);
+ invalidate_dcache_range(rxre, MPSC_RXRE_SIZE);
#endif
/*
@@ -984,8 +980,7 @@ static int mpsc_rx_intr(struct mpsc_port_info *pi, unsigned long *flags)
DMA_FROM_DEVICE);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- invalidate_dcache_range((ulong)bp,
- (ulong)bp + MPSC_RXBE_SIZE);
+ invalidate_dcache_range(bp, MPSC_RXBE_SIZE);
#endif
/*
@@ -1060,8 +1055,7 @@ static int mpsc_rx_intr(struct mpsc_port_info *pi, unsigned long *flags)
DMA_BIDIRECTIONAL);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- flush_dcache_range((ulong)rxre,
- (ulong)rxre + MPSC_RXRE_SIZE);
+ flush_dcache_range(rxre, MPSC_RXRE_SIZE);
#endif
/* Advance to next descriptor */
@@ -1072,8 +1066,7 @@ static int mpsc_rx_intr(struct mpsc_port_info *pi, unsigned long *flags)
DMA_FROM_DEVICE);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- invalidate_dcache_range((ulong)rxre,
- (ulong)rxre + MPSC_RXRE_SIZE);
+ invalidate_dcache_range(rxre, MPSC_RXRE_SIZE);
#endif
rc = 1;
}
@@ -1106,8 +1099,7 @@ static void mpsc_setup_tx_desc(struct mpsc_port_info *pi, u32 count, u32 intr)
DMA_BIDIRECTIONAL);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- flush_dcache_range((ulong)txre,
- (ulong)txre + MPSC_TXRE_SIZE);
+ flush_dcache_range(txre, MPSC_TXRE_SIZE);
#endif
}
@@ -1153,8 +1145,7 @@ static void mpsc_copy_tx_data(struct mpsc_port_info *pi)
DMA_BIDIRECTIONAL);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- flush_dcache_range((ulong)bp,
- (ulong)bp + MPSC_TXBE_SIZE);
+ flush_dcache_range(bp, MPSC_TXBE_SIZE);
#endif
mpsc_setup_tx_desc(pi, i, 1);
@@ -1179,8 +1170,7 @@ static int mpsc_tx_intr(struct mpsc_port_info *pi)
DMA_FROM_DEVICE);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- invalidate_dcache_range((ulong)txre,
- (ulong)txre + MPSC_TXRE_SIZE);
+ invalidate_dcache_range(txre, MPSC_TXRE_SIZE);
#endif
while (!(be32_to_cpu(txre->cmdstat) & SDMA_DESC_CMDSTAT_O)) {
@@ -1198,8 +1188,7 @@ static int mpsc_tx_intr(struct mpsc_port_info *pi)
MPSC_TXRE_SIZE, DMA_FROM_DEVICE);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- invalidate_dcache_range((ulong)txre,
- (ulong)txre + MPSC_TXRE_SIZE);
+ invalidate_dcache_range(txre, MPSC_TXRE_SIZE);
#endif
}
@@ -1580,8 +1569,7 @@ static int mpsc_get_poll_char(struct uart_port *port)
MPSC_RXRE_SIZE, DMA_FROM_DEVICE);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- invalidate_dcache_range((ulong)rxre,
- (ulong)rxre + MPSC_RXRE_SIZE);
+ invalidate_dcache_range(rxre, MPSC_RXRE_SIZE);
#endif
/*
* Loop through Rx descriptors handling ones that have
@@ -1596,8 +1584,7 @@ static int mpsc_get_poll_char(struct uart_port *port)
MPSC_RXBE_SIZE, DMA_FROM_DEVICE);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- invalidate_dcache_range((ulong)bp,
- (ulong)bp + MPSC_RXBE_SIZE);
+ invalidate_dcache_range(bp, MPSC_RXBE_SIZE);
#endif
if ((unlikely(cmdstat & (SDMA_DESC_CMDSTAT_BR |
SDMA_DESC_CMDSTAT_FR | SDMA_DESC_CMDSTAT_OR))) &&
@@ -1622,8 +1609,7 @@ static int mpsc_get_poll_char(struct uart_port *port)
MPSC_RXRE_SIZE, DMA_BIDIRECTIONAL);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- flush_dcache_range((ulong)rxre,
- (ulong)rxre + MPSC_RXRE_SIZE);
+ flush_dcache_range(rxre, MPSC_RXRE_SIZE);
#endif
/* Advance to next descriptor */
@@ -1635,8 +1621,7 @@ static int mpsc_get_poll_char(struct uart_port *port)
MPSC_RXRE_SIZE, DMA_FROM_DEVICE);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- invalidate_dcache_range((ulong)rxre,
- (ulong)rxre + MPSC_RXRE_SIZE);
+ invalidate_dcache_range(rxre, MPSC_RXRE_SIZE);
#endif
}
@@ -1748,8 +1733,7 @@ static void mpsc_console_write(struct console *co, const char *s, uint count)
DMA_BIDIRECTIONAL);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
- flush_dcache_range((ulong)bp,
- (ulong)bp + MPSC_TXBE_SIZE);
+ flush_dcache_range(bp, MPSC_TXBE_SIZE);
#endif
mpsc_setup_tx_desc(pi, i, 0);
pi->txr_head = (pi->txr_head + 1) & (MPSC_TXR_ENTRIES - 1);
diff --git a/drivers/usb/musb/blackfin.c b/drivers/usb/musb/blackfin.c
index 4418574..092a011 100644
--- a/drivers/usb/musb/blackfin.c
+++ b/drivers/usb/musb/blackfin.c
@@ -90,8 +90,7 @@ static void bfin_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
if (!ANOMALY_05000380 && epnum != 0) {
u16 dma_reg;
- flush_dcache_range((unsigned long)src,
- (unsigned long)(src + len));
+ flush_dcache_range(src, len);
/* Setup DMA address register */
dma_reg = (u32)src;
@@ -144,8 +143,7 @@ static void bfin_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
if (ANOMALY_05000467 && epnum != 0) {
u16 dma_reg;
- invalidate_dcache_range((unsigned long)dst,
- (unsigned long)(dst + len));
+ invalidate_dcache_range(dst, len);
/* Setup DMA address register */
dma_reg = (u32)dst;
--
2.9.3
^ permalink raw reply related
* Re: [PATCH 000/102] Convert drivers to explicit reset API
From: Maxime Ripard @ 2017-07-20 6:56 UTC (permalink / raw)
To: Philipp Zabel
Cc: Andrew Lunn, Prashant Gaikwad, Heiko Stuebner, Peter Chen,
Linus Walleij, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
Marc Dietrich, Rakesh Iyer, Peter Meerwald-Stadler,
linux-clk-u79uwXL29TY76Z2rM5mHXA, Wim Van Sebroeck, Wolfram Sang,
Xinliang Liu, Chanwoo Choi, Alan Stern, Jiri Slaby,
Michael Turquette, Guenter Roeck, Ohad Ben-Cohen,
linux-pm-u79uwXL29TY76Z2rM5mHXA, Thomas Gleixner, Vincent Abriou,
Bin Liu, Greg Kroah-Hartman, linux-usb-u79uwXL29TaqPxH82wqD4g
In-Reply-To: <20170719152646.25903-1-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
[-- Attachment #1.1: Type: text/plain, Size: 8914 bytes --]
On Wed, Jul 19, 2017 at 05:25:04PM +0200, Philipp Zabel wrote:
> The reset control API has two modes: exclusive access, where the driver
> expects to have full and immediate control over the state of the reset
> line, and shared (clock-like) access, where drivers only request reset
> deassertion while active, but don't care about the state of the reset line
> while inactive.
>
> Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
> reset lines") started to transition the reset control request API calls
> to explicitly state whether the driver needs exclusive or shared reset
> control behavior.
>
> This series converts all drivers that currently implicitly request
> exclusive reset controls to the corresponding explicit API call. It is,
> for the most part, generated from the following semantic patch:
>
> @@
> expression rstc, dev, id;
> @@
> -rstc = reset_control_get(dev, id);
> +rstc = reset_control_get_exclusive(dev, id);
> @@
> expression rstc, dev, id;
> @@
> -rstc = reset_control_get_optional(dev, id);
> +rstc = reset_control_get_optional_exclusive(dev, id);
> @@
> expression rstc, node, id;
> @@
> -rstc = of_reset_control_get(node, id);
> +rstc = of_reset_control_get_exclusive(node, id);
> @@
> expression rstc, node, index;
> @@
> -rstc = of_reset_control_get_by_index(node, index);
> +rstc = of_reset_control_get_exclusive_by_index(node, index);
> @@
> expression rstc, dev, id;
> @@
> -rstc = devm_reset_control_get(dev, id);
> +rstc = devm_reset_control_get_exclusive(dev, id);
> @@
> expression rstc, dev, id;
> @@
> -rstc = devm_reset_control_get_optional(dev, id);
> +rstc = devm_reset_control_get_optional_exclusive(dev, id);
> @@
> expression rstc, dev, index;
> @@
> -rstc = devm_reset_control_get_by_index(dev, index);
> +rstc = devm_reset_control_get_exclusive_by_index(dev, index);
>
> After all driver patches are applied, the temporary transition helpers
> can be removed.
>
> regards
> Philipp
>
> Philipp Zabel (102):
> ARM: rockchip: explicitly request exclusive reset control
> ARM: socfpga: explicitly request exclusive reset control
> MIPS: pci-mt7620: explicitly request exclusive reset control
> ahci: st: explicitly request exclusive reset control
> ata: sata_gemini: explicitly request exclusive reset control
> ata: ahci_tegra: explicitly request exclusive reset control
> bus: sunxi-rsb: explicitly request exclusive reset control
> bus: tegra-gmi: explicitly request exclusive reset control
> clk: sunxi: explicitly request exclusive reset control
> clk: tegra: explicitly request exclusive reset control
> clocksource/drivers/timer-stm32: explicitly request exclusive reset
> control
> clocksource/drivers/sun5i: explicitly request exclusive reset control
> crypto: rockchip: explicitly request exclusive reset control
> crypto: sun4i-ss - request exclusive reset control
> PM / devfreq: tegra: explicitly request exclusive reset control
> dmaengine: stm32-dma: explicitly request exclusive reset control
> dmaengine: sun6i: explicitly request exclusive reset control
> dmaengine: tegra-apb: explicitly request exclusive reset control
> drm: kirin: explicitly request exclusive reset control
> drm/nouveau/tegra: explicitly request exclusive reset control
> drm/rockchip: explicitly request exclusive reset control
> drm/sti: explicitly request exclusive reset control
> drm/stm: explicitly request exclusive reset control
> drm/sun4i: explicitly request exclusive reset control
> drm/tegra: explicitly request exclusive reset control
> gpu: host1x: explicitly request exclusive reset control
> i2c: mv64xxx: explicitly request exclusive reset control
> i2c: stm32f4: explicitly request exclusive reset control
> i2c: sun6i-pw2i: explicitly request exclusive reset control
> i2c: tegra: explicitly request exclusive reset control
> iio: adc: rockchip_saradc: explicitly request exclusive reset control
> iio: dac: stm32-dac-core: explicitly request exclusive reset control
> Input: tegra-kbc - request exclusive reset control
> coda: explicitly request exclusive reset control
> st-rc: explicitly request exclusive reset control
> stm32-dcmi: explicitly request exclusive reset control
> rc: sunxi-cir: explicitly request exclusive reset control
> mmc: dw_mmc: explicitly request exclusive reset control
> mmc: sdhci-st: explicitly request exclusive reset control
> mmc: sunxi: explicitly request exclusive reset control
> mmc: tegra: explicitly request exclusive reset control
> mtd: nand: sunxi: explicitly request exclusive reset control
> mtd: spi-nor: stm32-quadspi: explicitly request exclusive reset
> control
> net: dsa: mt7530: explicitly request exclusive reset control
> net: ethernet: hisi_femac: explicitly request exclusive reset control
> net: ethernet: hix5hd2_gmac: explicitly request exclusive reset
> control
> net: stmmac: explicitly request exclusive reset control
> net: stmmac: dwc-qos: explicitly request exclusive reset control
> ath10k: explicitly request exclusive reset control
> nvmem: lpc18xx-eeprom: explicitly request exclusive reset control
> PCI: dwc: pcie-qcom: explicitly request exclusive reset control
> PCI: imx6: explicitly request exclusive reset control
> PCI: tegra: explicitly request exclusive reset control
> PCI: rockchip: explicitly request exclusive reset control
> phy: berlin-usb: explicitly request exclusive reset control
> PCI: mediatek: explicitly request exclusive reset control
> phy: qcom-usb-hs: explicitly request exclusive reset control
> phy: rockchip-pcie: explicitly request exclusive reset control
> phy: rockchip-typec: explicitly request exclusive reset control
> phy: rockchip-usb: explicitly request exclusive reset control
> phy: sun4i-usb: explicitly request exclusive reset control
> phy: sun9i-usb: explicitly request exclusive reset control
> phy: tegra: explicitly request exclusive reset control
> phy: qcom-qmp: explicitly request exclusive reset control
> phy: qcom-qusb2: explicitly request exclusive reset control
> pinctrl: stm32: explicitly request exclusive reset control
> pinctrl: sunxi: explicitly request exclusive reset control
> pinctrl: tegra: explicitly request exclusive reset control
> pwm: hibvt: explicitly request exclusive reset control
> pwm: tegra: explicitly request exclusive reset control
> remoteproc/keystone: explicitly request exclusive reset control
> remoteproc: qcom: explicitly request exclusive reset control
> remoteproc: st: explicitly request exclusive reset control
> soc: mediatek: PMIC wrap: explicitly request exclusive reset control
> soc/tegra: pmc: explicitly request exclusive reset control
> spi: stm32: explicitly request exclusive reset control
> spi: sun6i: explicitly request exclusive reset control
> spi: tegra20-slink: explicitly request exclusive reset control
> spi: tegra114: explicitly request exclusive reset control
> spi: tegra20-sflash: explicitly request exclusive reset control
> staging: nvec: explicitly request exclusive reset control
> thermal: rockchip: explicitly request exclusive reset control
> thermal: tegra: explicitly request exclusive reset control
> serial: 8250_dw: explicitly request exclusive reset control
> serial: tegra: explicitly request exclusive reset control
> usb: chipidea: msm: explicitly request exclusive reset control
> usb: dwc2: explicitly request exclusive reset control
> usb: host: ehci-tegra: explicitly request exclusive reset control
> usb: host: xhci-tegra: explicitly request exclusive reset control
> usb: musb: sunxi: explicitly request exclusive reset control
> usb: phy: msm: explicitly request exclusive reset control
> usb: phy: qcom-8x16-usb: explicitly request exclusive reset control
> watchdog: asm9260: explicitly request exclusive reset control
> watchdog: mt7621: explicitly request exclusive reset control
> watchdog: rt2880: explicitly request exclusive reset control
> watchdog: zx2967: explicitly request exclusive reset control
> ASoC: img: explicitly request exclusive reset control
> ASoC: stm32: explicitly request exclusive reset control
> ASoC: sun4i: explicitly request exclusive reset control
> ASoC: tegra: explicitly request exclusive reset control
> Documentation: devres: add explicit exclusive/shared reset control
> request calls
> reset: finish transition to explicit exclusive reset control requests
For all sunxi patches:
Acked-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
[-- Attachment #1.2: signature.asc --]
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_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply
* Re: [PATCH] powerpc/asm/cacheflush: Cleanup cacheflush function params
From: Geert Uytterhoeven @ 2017-07-20 7:00 UTC (permalink / raw)
To: Matt Brown
Cc: USB list, Linux MMC List,
adi-buildroot-devel@lists.sourceforge.net, DRI Development,
linux-spi, linux-ide@vger.kernel.org, MTD Maling List,
linux-serial@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20170720062850.2195-1-matthew.brown.dev@gmail.com>
On Thu, Jul 20, 2017 at 8:28 AM, Matt Brown <matthew.brown.dev@gmail.com> wrote:
> The cacheflush prototypes currently use start and stop values and each
> call requires typecasting the address to an unsigned long.
> This patch changes the cacheflush prototypes to follow the x86 style of
> using a base and size values, with base being a void pointer.
>
> All callers of the cacheflush functions, including drivers, have been
> modified to conform to the new prototypes.
>
> The 64 bit cacheflush functions which were implemented in assembly code
> (flush_dcache_range, flush_inval_dcache_range) have been translated into
> C for readability and coherence.
>
> Signed-off-by: Matt Brown <matthew.brown.dev@gmail.com>
> drivers/spi/spi-bfin5xx.c | 10 +++---
> drivers/usb/musb/blackfin.c | 6 ++--
These are used on blackfin, so changing them without changing the blackfin
cache ops will break the build.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
_______________________________________________
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^ permalink raw reply
* Re: [PATCH 000/102] Convert drivers to explicit reset API
From: Greg Kroah-Hartman @ 2017-07-20 8:11 UTC (permalink / raw)
To: Philipp Zabel
Cc: Andrew Lunn, Prashant Gaikwad, Heiko Stuebner, Peter Chen,
Linus Walleij, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
Marc Dietrich, Rakesh Iyer, Peter Meerwald-Stadler,
linux-clk-u79uwXL29TY76Z2rM5mHXA, Wim Van Sebroeck, Wolfram Sang,
Xinliang Liu, Chanwoo Choi, Alan Stern, Jiri Slaby,
Michael Turquette, Guenter Roeck, Ohad Ben-Cohen,
linux-pm-u79uwXL29TY76Z2rM5mHXA, Thomas Gleixner, Vincent Abriou,
Bin Liu, linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-wireless-u79uwXL29TY76Z2rM5mHXA, linux-kernel@
In-Reply-To: <20170719152646.25903-1-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
On Wed, Jul 19, 2017 at 05:25:04PM +0200, Philipp Zabel wrote:
> The reset control API has two modes: exclusive access, where the driver
> expects to have full and immediate control over the state of the reset
> line, and shared (clock-like) access, where drivers only request reset
> deassertion while active, but don't care about the state of the reset line
> while inactive.
>
> Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
> reset lines") started to transition the reset control request API calls
> to explicitly state whether the driver needs exclusive or shared reset
> control behavior.
>
> This series converts all drivers that currently implicitly request
> exclusive reset controls to the corresponding explicit API call. It is,
> for the most part, generated from the following semantic patch:
Hey, I'm all for large api changes, but this really seems ackward, isn't
there a "better" way to do this?
Why not, as you say the "implicit" request is exclusive, just leave
everything alone and state that the "reset_control_get()" call is
exclusive and make the shared one the "odd" usage as that seems to not
be the normal case.
That should be a much smaller patch right?
That way you don't break everything here, and require 100+ patches to
just change the name of a function from one to another and do nothing
else.
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH 000/102] Convert drivers to explicit reset API
From: Philipp Zabel @ 2017-07-20 9:24 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Andrew Lunn, Prashant Gaikwad, Heiko Stuebner, Peter Chen,
Linus Walleij, dri-devel, Marc Dietrich, Rakesh Iyer,
Peter Meerwald-Stadler, linux-clk, Wim Van Sebroeck, Wolfram Sang,
Xinliang Liu, Chanwoo Choi, Alan Stern, Jiri Slaby,
Michael Turquette, Guenter Roeck, Ohad Ben-Cohen, linux-pm,
Thomas Gleixner, Vincent Abriou, Bin Liu, linux-usb,
linux-wireless, linux-kernel@
In-Reply-To: <20170720081157.GA11630@kroah.com>
Hi Greg,
The patches in this series are completely independent of each other, and
I would like the subsystem maintainers to apply them at their own
leisure.
Well, except for the last one, which I will apply only after there are
no more users of the transition helpers.
On Thu, 2017-07-20 at 10:11 +0200, Greg Kroah-Hartman wrote:
> On Wed, Jul 19, 2017 at 05:25:04PM +0200, Philipp Zabel wrote:
> > The reset control API has two modes: exclusive access, where the driver
> > expects to have full and immediate control over the state of the reset
> > line, and shared (clock-like) access, where drivers only request reset
> > deassertion while active, but don't care about the state of the reset line
> > while inactive.
> >
> > Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
> > reset lines") started to transition the reset control request API calls
> > to explicitly state whether the driver needs exclusive or shared reset
> > control behavior.
> >
> > This series converts all drivers that currently implicitly request
> > exclusive reset controls to the corresponding explicit API call. It is,
> > for the most part, generated from the following semantic patch:
>
> Hey, I'm all for large api changes, but this really seems ackward, isn't
> there a "better" way to do this?
It is a bit awkward. I am sorry I haven't done this earlier. Quite a few
new drivers started using the old API after the explicit requests were
introduced last year.
> Why not, as you say the "implicit" request is exclusive, just leave
> everything alone and state that the "reset_control_get()" call is
> exclusive
I think it is better to let the drivers explicitly state what they
expect from the API, and using reset_control_get_exclusive vs _shared
helps driver developers to make a conscious decision.
Further, the implicit API call predates shared reset support, so it is
not clear that all of the old users really need exclusive control.
A few drivers have been switched to the shared API already.
> and make the shared one the "odd" usage as that seems to not
> be the normal case.
I am not sure, there have been people arguing that the "clock-like" case
really is the common one. I suppose some of those drivers touched by the
100 patches in this series could also be changed to shared. But I don't
dare to make this decision for each of them.
> That should be a much smaller patch right?
>
> That way you don't break everything here, and require 100+ patches to
> just change the name of a function from one to another and do nothing
> else.
I don't break anything here, and I'm absolutely fine with squashing
patches together per subsystem where that is preferable.
regards
Philipp
^ permalink raw reply
* Re: [PATCH 000/102] Convert drivers to explicit reset API
From: Philipp Zabel @ 2017-07-20 9:36 UTC (permalink / raw)
To: Thomas Petazzoni
Cc: linux-kernel, Andrew Lunn, Prashant Gaikwad, Heiko Stuebner,
Peter Chen, Linus Walleij, dri-devel, Marc Dietrich, Rakesh Iyer,
Peter Meerwald-Stadler, linux-clk, Wim Van Sebroeck, Wolfram Sang,
Xinliang Liu, Chanwoo Choi, Alan Stern, Jiri Slaby,
Michael Turquette, Guenter Roeck, Ohad Ben-Cohen, linux-pm,
Thomas Gleixner <tglx>
In-Reply-To: <20170719211515.46a1196c@windsurf>
Hi Thomas,
On Wed, 2017-07-19 at 21:15 +0200, Thomas Petazzoni wrote:
> Hello,
>
> On Wed, 19 Jul 2017 17:25:04 +0200, Philipp Zabel wrote:
> > The reset control API has two modes: exclusive access, where the driver
> > expects to have full and immediate control over the state of the reset
> > line, and shared (clock-like) access, where drivers only request reset
> > deassertion while active, but don't care about the state of the reset line
> > while inactive.
> >
> > Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
> > reset lines") started to transition the reset control request API calls
> > to explicitly state whether the driver needs exclusive or shared reset
> > control behavior.
> >
> > This series converts all drivers that currently implicitly request
> > exclusive reset controls to the corresponding explicit API call. It is,
> > for the most part, generated from the following semantic patch:
> >
> > @@
> > expression rstc, dev, id;
> > @@
> > -rstc = reset_control_get(dev, id);
> > +rstc = reset_control_get_exclusive(dev, id);
>
> I don't know if it has been discussed in the past, so forgive me if it
> has been. Have you considered adding a "int flags" argument to the
> existing reset_control_get_*() functions, rather than introducing
> separate exclusive variants ?
>
> Indeed, with a "int flags" argument you could in the future add more
> variants/behaviors without actually multiplying the number of
> functions. Something like the "flags" argument for request_irq() for
> example.
I can't find the discussion right now, but I remember we had talked
about this in the past.
Behind the scenes, all the inline API functions already call common
entry points with flags (well, currently separate bool parameters for
shared and optional).
One reason against exposing those as an int flags in the user facing API
is the possibility to accidentally provide a wrong value.
regards
Philipp
^ permalink raw reply
* Re: [PATCH 000/102] Convert drivers to explicit reset API
From: Thomas Petazzoni @ 2017-07-20 10:36 UTC (permalink / raw)
To: Philipp Zabel
Cc: Andrew Lunn, Prashant Gaikwad, Heiko Stuebner, Peter Chen,
Linus Walleij, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
Marc Dietrich, Rakesh Iyer, Peter Meerwald-Stadler,
linux-clk-u79uwXL29TY76Z2rM5mHXA, Wolfram Sang, Xinliang Liu,
Chanwoo Choi, Alan Stern, Jiri Slaby, Michael Turquette,
Guenter Roeck, Ohad Ben-Cohen, linux-pm-u79uwXL29TY76Z2rM5mHXA,
Thomas Gleixner, Vincent Abriou, Bin Liu, Greg Kroah-Hartman,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-wireless-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1500543415.2354.37.camel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Hello,
On Thu, 20 Jul 2017 11:36:55 +0200, Philipp Zabel wrote:
> > I don't know if it has been discussed in the past, so forgive me if it
> > has been. Have you considered adding a "int flags" argument to the
> > existing reset_control_get_*() functions, rather than introducing
> > separate exclusive variants ?
> >
> > Indeed, with a "int flags" argument you could in the future add more
> > variants/behaviors without actually multiplying the number of
> > functions. Something like the "flags" argument for request_irq() for
> > example.
>
> I can't find the discussion right now, but I remember we had talked
> about this in the past.
> Behind the scenes, all the inline API functions already call common
> entry points with flags (well, currently separate bool parameters for
> shared and optional).
> One reason against exposing those as an int flags in the user facing API
> is the possibility to accidentally provide a wrong value.
This is a quite strange argument. You could also accidentally use the
wrong variant of the function, just like you could use the wrong flag.
Once again, the next time you have another parameter for those reset
functions, beyond the exclusive/shared variant, you will multiply again
by two the number of functions ? You already have the exclusive/shared
and optional/mandatory variants, so 4 variants. When you'll add a new
parameter, you'll have 8 variants. Doesn't seem really good.
What about reset_control_get(struct device *, const char *, int flags)
to replace all those variants ?
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* Re: [PATCH] powerpc/asm/cacheflush: Cleanup cacheflush function params
From: Michael Ellerman @ 2017-07-20 11:43 UTC (permalink / raw)
To: Matt Brown, linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-ide-u79uwXL29TY76Z2rM5mHXA,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
adi-buildroot-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
linux-mmc-u79uwXL29TY76Z2rM5mHXA,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-spi-u79uwXL29TY76Z2rM5mHXA,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
linux-usb-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170720062850.2195-1-matthew.brown.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Hi Matt,
Thanks for tackling this mess.
Matt Brown <matthew.brown.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> writes:
> The cacheflush prototypes currently use start and stop values and each
> call requires typecasting the address to an unsigned long.
> This patch changes the cacheflush prototypes to follow the x86 style of
> using a base and size values, with base being a void pointer.
>
> All callers of the cacheflush functions, including drivers, have been
> modified to conform to the new prototypes.
>
> The 64 bit cacheflush functions which were implemented in assembly code
> (flush_dcache_range, flush_inval_dcache_range) have been translated into
> C for readability and coherence.
>
> Signed-off-by: Matt Brown <matthew.brown.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> arch/powerpc/include/asm/cacheflush.h | 47 +++++++++++++++++--------
> arch/powerpc/kernel/misc_64.S | 52 ----------------------------
> arch/powerpc/mm/dma-noncoherent.c | 15 ++++----
> arch/powerpc/platforms/512x/mpc512x_shared.c | 10 +++---
> arch/powerpc/platforms/85xx/smp.c | 6 ++--
> arch/powerpc/sysdev/dart_iommu.c | 5 +--
> drivers/ata/pata_bf54x.c | 3 +-
> drivers/char/agp/uninorth-agp.c | 6 ++--
> drivers/gpu/drm/drm_cache.c | 3 +-
> drivers/macintosh/smu.c | 15 ++++----
> drivers/mmc/host/bfin_sdh.c | 3 +-
> drivers/mtd/nand/bf5xx_nand.c | 6 ++--
> drivers/soc/fsl/qbman/dpaa_sys.h | 2 +-
> drivers/soc/fsl/qbman/qman_ccsr.c | 3 +-
> drivers/spi/spi-bfin5xx.c | 10 +++---
> drivers/tty/serial/mpsc.c | 46 ++++++++----------------
> drivers/usb/musb/blackfin.c | 6 ++--
I think you want to trim that to powerpc only drivers for now at least.
> diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
> index 11843e3..b8f04c3 100644
> --- a/arch/powerpc/include/asm/cacheflush.h
> +++ b/arch/powerpc/include/asm/cacheflush.h
> @@ -51,13 +51,13 @@ static inline void __flush_dcache_icache_phys(unsigned long physaddr)
> * Write any modified data cache blocks out to memory and invalidate them.
> * Does not invalidate the corresponding instruction cache blocks.
> */
> -static inline void flush_dcache_range(unsigned long start, unsigned long stop)
> +static inline void flush_dcache_range(void *start, unsigned long size)
> {
> - void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
> - unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
> + void *addr = (void *)((u32)start & ~(L1_CACHE_BYTES - 1));
unsigned long would be nicer than u32.
And ALIGN_DOWN() should work here I think.
> + unsigned long len = size + (L1_CACHE_BYTES - 1);
And ALIGN?
> @@ -83,22 +83,39 @@ static inline void clean_dcache_range(unsigned long start, unsigned long stop)
> * to invalidate the cache so the PPC core doesn't get stale data
> * from the CPM (no cache snooping here :-).
> */
> -static inline void invalidate_dcache_range(unsigned long start,
> - unsigned long stop)
> +static inline void invalidate_dcache_range(void *start, unsigned long size)
> {
> - void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
> - unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
> + void *addr = (void *)((u32)start & ~(L1_CACHE_BYTES - 1));
> + unsigned long len = size + (L1_CACHE_SHIFT - 1);
> unsigned long i;
>
> - for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
> + for (i = 0; i < len >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
> dcbi(addr);
> mb(); /* sync */
> }
>
> #endif /* CONFIG_PPC32 */
> #ifdef CONFIG_PPC64
> -extern void flush_dcache_range(unsigned long start, unsigned long stop);
> -extern void flush_inval_dcache_range(unsigned long start, unsigned long stop);
> +static inline void flush_dcache_range(void *start, unsigned long size)
> +{
> + void *addr = (void *)((u64)start & ~(L1_CACHE_BYTES - 1));
> + unsigned long len = size + (L1_CACHE_BYTES - 1);
> + unsigned long i;
> +
> + for (i = 0; i < len >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
> + dcbf(addr);
> + mb(); /* sync */
> +}
I'd probably prefer a precursor patch to do the asm -> C conversion, but
I guess that's a pain because then you have to implement both the old
and new logic in C.
Also L1_CACHE_SHIFT is not necessarily == DCACHEL1BLOCKSIZE.
Finally it would be good to see what code the compiler generates out of
this, and see how it compares to the asm version. Not because it's
particularly performance critical (hopefully) but just so we know.
> diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
> index 6b4f4cb..0f3a7d9 100644
> --- a/arch/powerpc/platforms/512x/mpc512x_shared.c
> +++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
> @@ -254,8 +254,8 @@ static void __init mpc512x_init_diu(void)
> }
> memcpy(&diu_shared_fb.ad0, vaddr, sizeof(struct diu_ad));
> /* flush fb area descriptor */
> - dst = (unsigned long)&diu_shared_fb.ad0;
> - flush_dcache_range(dst, dst + sizeof(struct diu_ad) - 1);
> + dst = &diu_shared_fb.ad0;
Do you even need dst anymore?
> + flush_dcache_range(dst, sizeof(struct diu_ad) - 1);
^
You shouldn't be subtracting 1 any more.
cheers
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^ permalink raw reply
* Re: [PATCH] powerpc/asm/cacheflush: Cleanup cacheflush function params
From: Geert Uytterhoeven @ 2017-07-20 12:07 UTC (permalink / raw)
To: Michael Ellerman
Cc: USB list, Linux MMC List,
adi-buildroot-devel@lists.sourceforge.net, DRI Development,
Matt Brown, linux-ide@vger.kernel.org, MTD Maling List,
linux-serial@vger.kernel.org, linux-spi,
linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <87mv7zgwpl.fsf@concordia.ellerman.id.au>
On Thu, Jul 20, 2017 at 1:43 PM, Michael Ellerman <mpe@ellerman.id.au> wrote:
> Matt Brown <matthew.brown.dev@gmail.com> writes:
>> The cacheflush prototypes currently use start and stop values and each
>> call requires typecasting the address to an unsigned long.
>> This patch changes the cacheflush prototypes to follow the x86 style of
>> using a base and size values, with base being a void pointer.
>>
>> All callers of the cacheflush functions, including drivers, have been
>> modified to conform to the new prototypes.
>>
>> The 64 bit cacheflush functions which were implemented in assembly code
>> (flush_dcache_range, flush_inval_dcache_range) have been translated into
>> C for readability and coherence.
>> --- a/arch/powerpc/include/asm/cacheflush.h
>> +++ b/arch/powerpc/include/asm/cacheflush.h
>> @@ -51,13 +51,13 @@ static inline void __flush_dcache_icache_phys(unsigned long physaddr)
>> * Write any modified data cache blocks out to memory and invalidate them.
>> * Does not invalidate the corresponding instruction cache blocks.
>> */
>> -static inline void flush_dcache_range(unsigned long start, unsigned long stop)
>> +static inline void flush_dcache_range(void *start, unsigned long size)
>> {
>> - void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
>> - unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
>> + void *addr = (void *)((u32)start & ~(L1_CACHE_BYTES - 1));
>
> unsigned long would be nicer than u32.
Indeed. That would make this work on ppc64, too.
After which ppc64 has an identical copy (u64 = unsigned long on ppc64) below?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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^ permalink raw reply
* Re: [PATCH 000/102] Convert drivers to explicit reset API
From: Philipp Zabel @ 2017-07-20 12:55 UTC (permalink / raw)
To: Thomas Petazzoni
Cc: linux-kernel, Andrew Lunn, Prashant Gaikwad, Heiko Stuebner,
Peter Chen, Linus Walleij, dri-devel, Marc Dietrich, Rakesh Iyer,
Peter Meerwald-Stadler, linux-clk, Wim Van Sebroeck, Wolfram Sang,
Xinliang Liu, Chanwoo Choi, Alan Stern, Jiri Slaby,
Michael Turquette, Guenter Roeck, Ohad Ben-Cohen, linux-pm,
Thomas Gleixner <tglx>
In-Reply-To: <20170720123640.43c2ce01@windsurf>
Hi Thomas,
On Thu, 2017-07-20 at 12:36 +0200, Thomas Petazzoni wrote:
> Hello,
>
> On Thu, 20 Jul 2017 11:36:55 +0200, Philipp Zabel wrote:
>
> > > I don't know if it has been discussed in the past, so forgive me if it
> > > has been. Have you considered adding a "int flags" argument to the
> > > existing reset_control_get_*() functions, rather than introducing
> > > separate exclusive variants ?
> > >
> > > Indeed, with a "int flags" argument you could in the future add more
> > > variants/behaviors without actually multiplying the number of
> > > functions. Something like the "flags" argument for request_irq() for
> > > example.
> >
> > I can't find the discussion right now, but I remember we had talked
> > about this in the past.
> > Behind the scenes, all the inline API functions already call common
> > entry points with flags (well, currently separate bool parameters for
> > shared and optional).
> > One reason against exposing those as an int flags in the user facing API
> > is the possibility to accidentally provide a wrong value.
>
> This is a quite strange argument. You could also accidentally use the
> wrong variant of the function, just like you could use the wrong flag.
You can't accidentally use no flag at all or a completely bogus value
with the "plethora of inline functions" variant.
> Once again, the next time you have another parameter for those reset
> functions, beyond the exclusive/shared variant, you will multiply again
> by two the number of functions ? You already have the exclusive/shared
> and optional/mandatory variants, so 4 variants. When you'll add a new
> parameter, you'll have 8 variants. Doesn't seem really good.
I'd rather avoid adding more variants, if possible. The complexity
increases regardless of whether the API is expressed as a bunch of
functions or as a single function with a bunch of flags.
> What about reset_control_get(struct device *, const char *, int flags)
> to replace all those variants ?
While I like how this looks, unfortunately (devm_)reset_control_get
already exists without the flags, so we can't change to that with a
gentle transition.
regards
Philipp
^ permalink raw reply
* Re: [PATCH] powerpc/asm/cacheflush: Cleanup cacheflush function params
From: Michael Ellerman @ 2017-07-20 13:01 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Matt Brown, linuxppc-dev@lists.ozlabs.org,
linux-ide@vger.kernel.org, DRI Development,
adi-buildroot-devel@lists.sourceforge.net, Linux MMC List,
MTD Maling List, linux-arm-kernel@lists.infradead.org, linux-spi,
linux-serial@vger.kernel.org, USB list
In-Reply-To: <CAMuHMdXU-R8kBs_xp7XDK0pnC5fakpghchuEPD8jtEcHLmgyHg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
Geert Uytterhoeven <geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org> writes:
> On Thu, Jul 20, 2017 at 1:43 PM, Michael Ellerman <mpe-Gsx/Oe8HsFggBc27wqDAHg@public.gmane.org> wrote:
>> Matt Brown <matthew.brown.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> writes:
>>> The cacheflush prototypes currently use start and stop values and each
>>> call requires typecasting the address to an unsigned long.
>>> This patch changes the cacheflush prototypes to follow the x86 style of
>>> using a base and size values, with base being a void pointer.
>>>
>>> All callers of the cacheflush functions, including drivers, have been
>>> modified to conform to the new prototypes.
>>>
>>> The 64 bit cacheflush functions which were implemented in assembly code
>>> (flush_dcache_range, flush_inval_dcache_range) have been translated into
>>> C for readability and coherence.
>
>>> --- a/arch/powerpc/include/asm/cacheflush.h
>>> +++ b/arch/powerpc/include/asm/cacheflush.h
>>> @@ -51,13 +51,13 @@ static inline void __flush_dcache_icache_phys(unsigned long physaddr)
>>> * Write any modified data cache blocks out to memory and invalidate them.
>>> * Does not invalidate the corresponding instruction cache blocks.
>>> */
>>> -static inline void flush_dcache_range(unsigned long start, unsigned long stop)
>>> +static inline void flush_dcache_range(void *start, unsigned long size)
>>> {
>>> - void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
>>> - unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
>>> + void *addr = (void *)((u32)start & ~(L1_CACHE_BYTES - 1));
>>
>> unsigned long would be nicer than u32.
>
> Indeed. That would make this work on ppc64, too.
> After which ppc64 has an identical copy (u64 = unsigned long on ppc64) below?
That was Matt's homework to notice that ;)
cheers
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^ permalink raw reply
* [PATCH] ata: ahci_platform: Add shutdown handler
From: Nate Watterson @ 2017-07-20 19:26 UTC (permalink / raw)
To: Hans de Goede, Tejun Heo, linux-ide, linux-kernel; +Cc: Nate Watterson
The newly introduced ahci_platform_shutdown() method is called during
system shutdown to disable host controller DMA and interrupts in order
to avoid potentially corrupting or otherwise interfering with a new
kernel being started with kexec.
Signed-off-by: Nate Watterson <nwatters@codeaurora.org>
---
drivers/ata/ahci_platform.c | 1 +
drivers/ata/libahci_platform.c | 34 ++++++++++++++++++++++++++++++++++
include/linux/ahci_platform.h | 2 ++
3 files changed, 37 insertions(+)
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 62a04c8..99f9a89 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -93,6 +93,7 @@ static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_platform_suspend,
static struct platform_driver ahci_driver = {
.probe = ahci_probe,
.remove = ata_platform_remove_one,
+ .shutdown = ahci_platform_shutdown,
.driver = {
.name = DRV_NAME,
.of_match_table = ahci_of_match,
diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
index cd2eab6..a270a11 100644
--- a/drivers/ata/libahci_platform.c
+++ b/drivers/ata/libahci_platform.c
@@ -602,6 +602,40 @@ static void ahci_host_stop(struct ata_host *host)
ahci_platform_disable_resources(hpriv);
}
+/**
+ * ahci_platform_shutdown - Disable interrupts and stop DMA for host ports
+ * @dev: platform device pointer for the host
+ *
+ * This function is called during system shutdown and performs the minimal
+ * deconfiguration required to ensure that an ahci_platform host cannot
+ * corrupt or otherwise interfere with a new kernel being started with kexec.
+ */
+void ahci_platform_shutdown(struct platform_device *pdev)
+{
+ struct ata_host *host = platform_get_drvdata(pdev);
+ struct ahci_host_priv *hpriv = host->private_data;
+ void __iomem *mmio = hpriv->mmio;
+ int i;
+
+ for (i = 0; i < host->n_ports; i++) {
+ struct ata_port *ap = host->ports[i];
+
+ /* Disable port interrupts */
+ if (ap->ops->freeze)
+ ap->ops->freeze(ap);
+
+ /* Stop the port DMA engines */
+ if (ap->ops->port_stop)
+ ap->ops->port_stop(ap);
+ }
+
+ /* Disable and clear host interrupts */
+ writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL);
+ readl(mmio + HOST_CTL); /* flush */
+ writel(GENMASK(host->n_ports, 0), mmio + HOST_IRQ_STAT);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_shutdown);
+
#ifdef CONFIG_PM_SLEEP
/**
* ahci_platform_suspend_host - Suspend an ahci-platform host
diff --git a/include/linux/ahci_platform.h b/include/linux/ahci_platform.h
index a270f25e..1b0a17b 100644
--- a/include/linux/ahci_platform.h
+++ b/include/linux/ahci_platform.h
@@ -36,6 +36,8 @@ int ahci_platform_init_host(struct platform_device *pdev,
const struct ata_port_info *pi_template,
struct scsi_host_template *sht);
+void ahci_platform_shutdown(struct platform_device *pdev);
+
int ahci_platform_suspend_host(struct device *dev);
int ahci_platform_resume_host(struct device *dev);
int ahci_platform_suspend(struct device *dev);
--
Qualcomm Datacenter Technologies, Inc. on behalf of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux
Foundation Collaborative Project.
^ permalink raw reply related
* Re: [PATCH 000/102] Convert drivers to explicit reset API
From: Heiko Stuebner @ 2017-07-20 20:32 UTC (permalink / raw)
To: Philipp Zabel
Cc: Andrew Lunn, Prashant Gaikwad, Peter Chen, Linus Walleij,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Marc Dietrich,
Rakesh Iyer, Peter Meerwald-Stadler,
linux-clk-u79uwXL29TY76Z2rM5mHXA, Wim Van Sebroeck, Wolfram Sang,
Xinliang Liu, Chanwoo Choi, Alan Stern, Jiri Slaby,
Michael Turquette, Guenter Roeck, Ohad Ben-Cohen,
linux-pm-u79uwXL29TY76Z2rM5mHXA, Thomas Gleixner, Vincent Abriou,
Bin Liu, Greg Kroah-Hartman, linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-wireless-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170719152646.25903-1-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Hi,
> crypto: rockchip: explicitly request exclusive reset control
> iio: adc: rockchip_saradc: explicitly request exclusive reset control
> PCI: rockchip: explicitly request exclusive reset control
> phy: rockchip-pcie: explicitly request exclusive reset control
> phy: rockchip-typec: explicitly request exclusive reset control
> phy: rockchip-usb: explicitly request exclusive reset control
> thermal: rockchip: explicitly request exclusive reset control
for the driver-related Rockchip changes
Acked-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
^ permalink raw reply
* Re: [PATCH 000/102] Convert drivers to explicit reset API
From: Heiko Stuebner @ 2017-07-20 20:32 UTC (permalink / raw)
To: Philipp Zabel
Cc: Andrew Lunn, Prashant Gaikwad, Peter Chen, Linus Walleij,
dri-devel, Marc Dietrich, Rakesh Iyer, Peter Meerwald-Stadler,
linux-clk, Wim Van Sebroeck, Wolfram Sang, Xinliang Liu,
Chanwoo Choi, Alan Stern, Jiri Slaby, Michael Turquette,
Guenter Roeck, Ohad Ben-Cohen, linux-pm, Thomas Gleixner,
Vincent Abriou, Bin Liu, Greg Kroah-Hartman, linux-usb,
linux-wireless
In-Reply-To: <20170719152646.25903-1-p.zabel@pengutronix.de>
Hi,
> crypto: rockchip: explicitly request exclusive reset control
> iio: adc: rockchip_saradc: explicitly request exclusive reset control
> PCI: rockchip: explicitly request exclusive reset control
> phy: rockchip-pcie: explicitly request exclusive reset control
> phy: rockchip-typec: explicitly request exclusive reset control
> phy: rockchip-usb: explicitly request exclusive reset control
> thermal: rockchip: explicitly request exclusive reset control
for the driver-related Rockchip changes
Acked-by: Heiko Stuebner <heiko@sntech.de>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply
* Re: [PATCH 000/102] Convert drivers to explicit reset API
From: Heiko Stuebner @ 2017-07-20 20:32 UTC (permalink / raw)
To: Philipp Zabel
Cc: Andrew Lunn, Prashant Gaikwad, Peter Chen, Linus Walleij,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Marc Dietrich,
Rakesh Iyer, Peter Meerwald-Stadler,
linux-clk-u79uwXL29TY76Z2rM5mHXA, Wim Van Sebroeck, Wolfram Sang,
Xinliang Liu, Chanwoo Choi, Alan Stern, Jiri Slaby,
Michael Turquette, Guenter Roeck, Ohad Ben-Cohen,
linux-pm-u79uwXL29TY76Z2rM5mHXA, Thomas Gleixner, Vincent Abriou,
Bin Liu, Greg Kroah-Hartman, linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-wireless-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170719152646.25903-1-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Hi,
> crypto: rockchip: explicitly request exclusive reset control
> iio: adc: rockchip_saradc: explicitly request exclusive reset control
> PCI: rockchip: explicitly request exclusive reset control
> phy: rockchip-pcie: explicitly request exclusive reset control
> phy: rockchip-typec: explicitly request exclusive reset control
> phy: rockchip-usb: explicitly request exclusive reset control
> thermal: rockchip: explicitly request exclusive reset control
for the driver-related Rockchip changes
Acked-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
^ permalink raw reply
* Re: [PATCH 000/102] Convert drivers to explicit reset API
From: Heiko Stuebner @ 2017-07-20 20:32 UTC (permalink / raw)
To: Philipp Zabel
Cc: Andrew Lunn, Prashant Gaikwad, Peter Chen, Linus Walleij,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Marc Dietrich,
Rakesh Iyer, Peter Meerwald-Stadler,
linux-clk-u79uwXL29TY76Z2rM5mHXA, Wim Van Sebroeck, Wolfram Sang,
Xinliang Liu, Chanwoo Choi, Alan Stern, Jiri Slaby,
Michael Turquette, Guenter Roeck, Ohad Ben-Cohen,
linux-pm-u79uwXL29TY76Z2rM5mHXA, Thomas Gleixner, Vincent Abriou,
Bin Liu, Greg Kroah-Hartman, linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-wireless-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170719152646.25903-1-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Hi,
> crypto: rockchip: explicitly request exclusive reset control
> iio: adc: rockchip_saradc: explicitly request exclusive reset control
> PCI: rockchip: explicitly request exclusive reset control
> phy: rockchip-pcie: explicitly request exclusive reset control
> phy: rockchip-typec: explicitly request exclusive reset control
> phy: rockchip-usb: explicitly request exclusive reset control
> thermal: rockchip: explicitly request exclusive reset control
for the driver-related Rockchip changes
Acked-by: Heiko Stuebner <heiko@sntech.de>
_______________________________________________
Nouveau mailing list
Nouveau@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/nouveau
^ permalink raw reply
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