* [tj-libata:for-4.14 8/10] drivers/ata/pata_ftide010.c:376:31: error: assignment of member 'flags' in read-only object
From: kbuild test robot @ 2017-08-24 17:21 UTC (permalink / raw)
To: Arvind Yadav; +Cc: kbuild-all, linux-ide, Tejun Heo
[-- Attachment #1: Type: text/plain, Size: 7607 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git for-4.14
head: 1916a98f8d0c84065b2f73aa571ccebafb63e90f
commit: 8ab84a8d2ae554f248d3e59b5ad8242e2352b4c1 [8/10] ata: ftide010: constify ata_port_info
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 8ab84a8d2ae554f248d3e59b5ad8242e2352b4c1
# save the attached .config to linux build tree
make.cross ARCH=arm
All errors (new ones prefixed by >>):
drivers/ata/pata_ftide010.c: In function 'pata_ftide010_gemini_init':
>> drivers/ata/pata_ftide010.c:376:31: error: assignment of member 'flags' in read-only object
ftide010_port_info[0].flags |= ATA_FLAG_SATA;
^~
vim +/flags +376 drivers/ata/pata_ftide010.c
be4e456e Linus Walleij 2017-06-04 350
be4e456e Linus Walleij 2017-06-04 351 static int pata_ftide010_gemini_init(struct ftide010 *ftide,
be4e456e Linus Walleij 2017-06-04 352 bool is_ata1)
be4e456e Linus Walleij 2017-06-04 353 {
be4e456e Linus Walleij 2017-06-04 354 struct device *dev = ftide->dev;
be4e456e Linus Walleij 2017-06-04 355 struct sata_gemini *sg;
be4e456e Linus Walleij 2017-06-04 356 enum gemini_muxmode muxmode;
be4e456e Linus Walleij 2017-06-04 357
be4e456e Linus Walleij 2017-06-04 358 /* Look up SATA bridge */
be4e456e Linus Walleij 2017-06-04 359 sg = gemini_sata_bridge_get();
be4e456e Linus Walleij 2017-06-04 360 if (IS_ERR(sg))
be4e456e Linus Walleij 2017-06-04 361 return PTR_ERR(sg);
be4e456e Linus Walleij 2017-06-04 362 ftide->sg = sg;
be4e456e Linus Walleij 2017-06-04 363
be4e456e Linus Walleij 2017-06-04 364 muxmode = gemini_sata_get_muxmode(sg);
be4e456e Linus Walleij 2017-06-04 365
be4e456e Linus Walleij 2017-06-04 366 /* Special ops */
be4e456e Linus Walleij 2017-06-04 367 pata_ftide010_port_ops.port_start =
be4e456e Linus Walleij 2017-06-04 368 pata_ftide010_gemini_port_start;
be4e456e Linus Walleij 2017-06-04 369 pata_ftide010_port_ops.port_stop =
be4e456e Linus Walleij 2017-06-04 370 pata_ftide010_gemini_port_stop;
be4e456e Linus Walleij 2017-06-04 371 pata_ftide010_port_ops.cable_detect =
be4e456e Linus Walleij 2017-06-04 372 pata_ftide010_gemini_cable_detect;
be4e456e Linus Walleij 2017-06-04 373
be4e456e Linus Walleij 2017-06-04 374 /* Flag port as SATA-capable */
be4e456e Linus Walleij 2017-06-04 375 if (gemini_sata_bridge_enabled(sg, is_ata1))
be4e456e Linus Walleij 2017-06-04 @376 ftide010_port_info[0].flags |= ATA_FLAG_SATA;
be4e456e Linus Walleij 2017-06-04 377
be4e456e Linus Walleij 2017-06-04 378 /*
be4e456e Linus Walleij 2017-06-04 379 * We assume that a simple 40-wire cable is used in the PATA mode.
be4e456e Linus Walleij 2017-06-04 380 * if you're adding a system using the PATA interface, make sure
be4e456e Linus Walleij 2017-06-04 381 * the right cable is set up here, it might be necessary to use
be4e456e Linus Walleij 2017-06-04 382 * special hardware detection or encode the cable type in the device
be4e456e Linus Walleij 2017-06-04 383 * tree with special properties.
be4e456e Linus Walleij 2017-06-04 384 */
be4e456e Linus Walleij 2017-06-04 385 if (!is_ata1) {
be4e456e Linus Walleij 2017-06-04 386 switch (muxmode) {
be4e456e Linus Walleij 2017-06-04 387 case GEMINI_MUXMODE_0:
be4e456e Linus Walleij 2017-06-04 388 ftide->master_cbl = ATA_CBL_SATA;
be4e456e Linus Walleij 2017-06-04 389 ftide->slave_cbl = ATA_CBL_PATA40;
be4e456e Linus Walleij 2017-06-04 390 ftide->master_to_sata0 = true;
be4e456e Linus Walleij 2017-06-04 391 break;
be4e456e Linus Walleij 2017-06-04 392 case GEMINI_MUXMODE_1:
be4e456e Linus Walleij 2017-06-04 393 ftide->master_cbl = ATA_CBL_SATA;
be4e456e Linus Walleij 2017-06-04 394 ftide->slave_cbl = ATA_CBL_NONE;
be4e456e Linus Walleij 2017-06-04 395 ftide->master_to_sata0 = true;
be4e456e Linus Walleij 2017-06-04 396 break;
be4e456e Linus Walleij 2017-06-04 397 case GEMINI_MUXMODE_2:
be4e456e Linus Walleij 2017-06-04 398 ftide->master_cbl = ATA_CBL_PATA40;
be4e456e Linus Walleij 2017-06-04 399 ftide->slave_cbl = ATA_CBL_PATA40;
be4e456e Linus Walleij 2017-06-04 400 break;
be4e456e Linus Walleij 2017-06-04 401 case GEMINI_MUXMODE_3:
be4e456e Linus Walleij 2017-06-04 402 ftide->master_cbl = ATA_CBL_SATA;
be4e456e Linus Walleij 2017-06-04 403 ftide->slave_cbl = ATA_CBL_SATA;
be4e456e Linus Walleij 2017-06-04 404 ftide->master_to_sata0 = true;
be4e456e Linus Walleij 2017-06-04 405 ftide->slave_to_sata1 = true;
be4e456e Linus Walleij 2017-06-04 406 break;
be4e456e Linus Walleij 2017-06-04 407 }
be4e456e Linus Walleij 2017-06-04 408 } else {
be4e456e Linus Walleij 2017-06-04 409 switch (muxmode) {
be4e456e Linus Walleij 2017-06-04 410 case GEMINI_MUXMODE_0:
be4e456e Linus Walleij 2017-06-04 411 ftide->master_cbl = ATA_CBL_SATA;
be4e456e Linus Walleij 2017-06-04 412 ftide->slave_cbl = ATA_CBL_NONE;
be4e456e Linus Walleij 2017-06-04 413 ftide->master_to_sata1 = true;
be4e456e Linus Walleij 2017-06-04 414 break;
be4e456e Linus Walleij 2017-06-04 415 case GEMINI_MUXMODE_1:
be4e456e Linus Walleij 2017-06-04 416 ftide->master_cbl = ATA_CBL_SATA;
be4e456e Linus Walleij 2017-06-04 417 ftide->slave_cbl = ATA_CBL_PATA40;
be4e456e Linus Walleij 2017-06-04 418 ftide->master_to_sata1 = true;
be4e456e Linus Walleij 2017-06-04 419 break;
be4e456e Linus Walleij 2017-06-04 420 case GEMINI_MUXMODE_2:
be4e456e Linus Walleij 2017-06-04 421 ftide->master_cbl = ATA_CBL_SATA;
be4e456e Linus Walleij 2017-06-04 422 ftide->slave_cbl = ATA_CBL_SATA;
be4e456e Linus Walleij 2017-06-04 423 ftide->slave_to_sata0 = true;
be4e456e Linus Walleij 2017-06-04 424 ftide->master_to_sata1 = true;
be4e456e Linus Walleij 2017-06-04 425 break;
be4e456e Linus Walleij 2017-06-04 426 case GEMINI_MUXMODE_3:
be4e456e Linus Walleij 2017-06-04 427 ftide->master_cbl = ATA_CBL_PATA40;
be4e456e Linus Walleij 2017-06-04 428 ftide->slave_cbl = ATA_CBL_PATA40;
be4e456e Linus Walleij 2017-06-04 429 break;
be4e456e Linus Walleij 2017-06-04 430 }
be4e456e Linus Walleij 2017-06-04 431 }
be4e456e Linus Walleij 2017-06-04 432 dev_info(dev, "set up Gemini PATA%d\n", is_ata1);
be4e456e Linus Walleij 2017-06-04 433
be4e456e Linus Walleij 2017-06-04 434 return 0;
be4e456e Linus Walleij 2017-06-04 435 }
be4e456e Linus Walleij 2017-06-04 436 #else
be4e456e Linus Walleij 2017-06-04 437 static int pata_ftide010_gemini_init(struct ftide010 *ftide,
be4e456e Linus Walleij 2017-06-04 438 bool is_ata1)
be4e456e Linus Walleij 2017-06-04 439 {
be4e456e Linus Walleij 2017-06-04 440 return -ENOTSUPP;
be4e456e Linus Walleij 2017-06-04 441 }
be4e456e Linus Walleij 2017-06-04 442 #endif
be4e456e Linus Walleij 2017-06-04 443
be4e456e Linus Walleij 2017-06-04 444
:::::: The code at line 376 was first introduced by commit
:::::: be4e456ed3a5918f4e75f532837bb19128a690c9 ata: Add driver for Faraday Technology FTIDE010
:::::: TO: Linus Walleij <linus.walleij@linaro.org>
:::::: CC: Tejun Heo <tj@kernel.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 62819 bytes --]
^ permalink raw reply
* Re: [PATCH 0/3] constify ata_port_info
From: Tejun Heo @ 2017-08-24 14:23 UTC (permalink / raw)
To: Arvind Yadav; +Cc: b.zolnierkie, linus.walleij, linux-kernel, linux-ide
In-Reply-To: <1503568201-9991-1-git-send-email-arvind.yadav.cs@gmail.com>
On Thu, Aug 24, 2017 at 03:19:58PM +0530, Arvind Yadav wrote:
> ata_port_info are not supposed to change at runtime. All functions
> working with ata_port_info provided by <linux/libata.h> work with
> const ata_port_info. So mark the non-const structs as const.
Applied 1-3 to libata/for-4.14.
Thanks.
--
tejun
^ permalink raw reply
* Re: Regression due to "libata: implement SECURITY PROTOCOL IN/OUT"
From: Ido Schimmel @ 2017-08-24 12:18 UTC (permalink / raw)
To: Christoph Hellwig; +Cc: tj, xiaolong.ye, mlxsw, michaelsh, linux-ide
In-Reply-To: <20170824120728.GA23186@lst.de>
On Thu, Aug 24, 2017 at 02:07:29PM +0200, Christoph Hellwig wrote:
> What kind of device is this? Seems like we need to blacklist it
> as it chokes when we tried to read the Identify Devіce Log.
Is the below enough or do you need more info?
$ smartctl -a /dev/sda
=== START OF INFORMATION SECTION ===
Model Family: Innodisk 3IE3/3ME3 SSDs
Device Model: M.2 (S42) 3ME3
Serial Number: 20161029AA101511210E
LU WWN Device Id: 5 24693e 2016a210e
Firmware Version: S15A19
User Capacity: 16,013,942,784 bytes [16.0 GB]
Sector Size: 512 bytes logical/physical
Rotation Rate: Solid State Device
Form Factor: 2.5 inches
Device is: In smartctl database [for details use: -P show]
ATA Version is: ATA8-ACS (minor revision not indicated)
SATA Version is: SATA 3.0, 6.0 Gb/s (current: 6.0 Gb/s)
Local Time is: Thu Aug 24 15:10:44 2017 IDT
SMART support is: Available - device has SMART capability.
SMART support is: Enabled
=== START OF READ SMART DATA SECTION ===
SMART overall-health self-assessment test result: PASSED
General SMART Values:
Offline data collection status: (0x00) Offline data collection activity
was never started.
Auto Offline Data Collection: Disabled.
Total time to complete Offline
data collection: ( 32) seconds.
Offline data collection
capabilities: (0x00) Offline data collection not supported.
SMART capabilities: (0x0003) Saves SMART data before entering
power-saving mode.
Supports SMART auto save timer.
Error logging capability: (0x00) Error logging NOT supported.
General Purpose Logging supported.
SCT capabilities: (0x0039) SCT Status supported.
SCT Error Recovery Control supported.
SCT Feature Control supported.
SCT Data Table supported.
SMART Attributes Data Structure revision number: 16
Vendor Specific SMART Attributes with Thresholds:
ID# ATTRIBUTE_NAME FLAG VALUE WORST THRESH TYPE UPDATED WHEN_FAILED RAW_VALUE
1 Raw_Read_Error_Rate 0x0000 000 000 000 Old_age Offline - 0
2 Throughput_Performance 0x0000 000 000 000 Old_age Offline - 0
3 Spin_Up_Time 0x0000 000 000 000 Old_age Offline - 0
5 Later_Bad_Block 0x0013 100 100 001 Pre-fail Always - 0
7 Seek_Error_Rate 0x0000 000 000 000 Old_age Offline - 0
8 Seek_Time_Performance 0x0000 000 000 000 Old_age Offline - 0
9 Power_On_Hours 0x0002 255 000 000 Old_age Always - 255
10 Spin_Retry_Count 0x0000 000 000 000 Old_age Offline - 0
12 Power_Cycle_Count 0x0002 097 000 000 Old_age Always - 97
163 Total_Bad_Block_Count 0x0000 000 000 000 Old_age Offline - 13
168 SATA_PHY_Error_Count 0x0000 000 000 000 Old_age Offline - 0
169 Remaining_Lifetime_Perc 0x0000 099 000 000 Old_age Offline - 99
175 Bad_Cluster_Table_Count 0x0000 000 000 000 Old_age Offline - 0
192 Power-Off_Retract_Count 0x0000 000 000 000 Old_age Offline - 0
194 Temperature_Celsius 0x0000 030 100 000 Old_age Offline - 30 (2 100 0 0 0)
197 Current_Pending_Sector 0x0012 000 100 000 Old_age Always - 0
225 Data_Log_Write_Count 0x0000 000 240 000 Old_age Offline - 272040
240 Write_Head 0x0000 000 000 000 Old_age Offline - 0
165 Max_Erase_Count 0x0002 010 001 000 Old_age Always - 10
167 Average_Erase_Count 0x0002 005 001 000 Old_age Always - 5
170 Spare_Block_Count 0x0003 100 001 000 Pre-fail Always - 65
171 Program_Fail_Count 0x0002 000 001 000 Old_age Always - 0
172 Erase_Fail_Count 0x0002 000 001 000 Old_age Always - 0
176 RANGE_RECORD_Count 0x0000 100 001 000 Old_age Offline - 0
187 Reported_Uncorrect 0x0002 000 001 000 Old_age Always - 0
229 Flash_ID 0x0002 100 001 000 Old_age Always - 0x51769394de98
232 Spares_Remaining_Perc 0x0003 100 001 000 Pre-fail Always - 0
235 Later_Bad_Blk_Inf_R/W/E 0x0002 000 000 000 Old_age Always - 0 0 0
241 Host_Writes_32MiB 0x0002 100 001 000 Old_age Always - 1062
242 Host_Reads_32MiB 0x0002 100 001 000 Old_age Always - 762
^ permalink raw reply
* Re: Regression due to "libata: implement SECURITY PROTOCOL IN/OUT"
From: Christoph Hellwig @ 2017-08-24 12:07 UTC (permalink / raw)
To: Ido Schimmel; +Cc: hch, tj, xiaolong.ye, mlxsw, michaelsh, linux-ide
In-Reply-To: <20170824112932.GA12461@shredder.mtl.com>
What kind of device is this? Seems like we need to blacklist it
as it chokes when we tried to read the Identify Devіce Log.
^ permalink raw reply
* Regression due to "libata: implement SECURITY PROTOCOL IN/OUT"
From: Ido Schimmel @ 2017-08-24 11:29 UTC (permalink / raw)
To: hch, tj; +Cc: xiaolong.ye, mlxsw, michaelsh, linux-ide
Hi,
Booting kernel v4.13-rc6 on my system results in the following errors in
the kernel log:
ata5.00: qc timeout (cmd 0x47)
ata5.00: READ LOG DMA EXT failed, trying PIO
ata5.00: ATA Identify Device Log not supported
ata5.00: Security Log not supported
ata5.00: failed to set xfermode (err_mask=0x40)
ata5: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
ata5.00: qc timeout (cmd 0xec)
ata5.00: failed to IDENTIFY (I/O error, err_mask=0x5)
ata5.00: revalidation failed (errno=-5)
ata5: limiting SATA link speed to 3.0 Gbps
ata5: SATA link up 3.0 Gbps (SStatus 123 SControl 320)
ata5.00: qc timeout (cmd 0xec)
ata5.00: failed to IDENTIFY (I/O error, err_mask=0x5)
ata5.00: revalidation failed (errno=-5)
ata5.00: disabled
ata5: hard resetting link
ata5: SATA link up 3.0 Gbps (SStatus 123 SControl 320)
ata5: EH complete
And a dracut shell. Bisected this down to commit 818831c8b22f ("libata:
implement SECURITY PROTOCOL IN/OUT"). Can you please look into it? I can
easily test your patches.
I didn't find any relevant patches in patchwork or similar reports
beside this one:
https://www.spinics.net/lists/kernel/msg2533719.html
To which no one replied.
Thanks!
More info that might help:
Full bisection log:
git bisect start
# bad: [5771a8c08880cdca3bfb4a3fc6d309d6bba20877] Linux v4.13-rc1
git bisect bad 5771a8c08880cdca3bfb4a3fc6d309d6bba20877
# good: [6f7da290413ba713f0cdd9ff1a2a9bb129ef4f6c] Linux 4.12
git bisect good 6f7da290413ba713f0cdd9ff1a2a9bb129ef4f6c
# good: [e5f76a2e0e84ca2a215ecbf6feae88780d055c56] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace
git bisect good e5f76a2e0e84ca2a215ecbf6feae88780d055c56
# bad: [bd78acad8e866e1167f9de97c9b090ee6c2c96a7] parisc: move generic-y of exported headers to uapi/asm/Kbuild
git bisect bad bd78acad8e866e1167f9de97c9b090ee6c2c96a7
# bad: [e0f25a3f2d052e36ff67a9b4db835c3e27e950d8] Merge tag 'hwlock-v4.13' of git://github.com/andersson/remoteproc
git bisect bad e0f25a3f2d052e36ff67a9b4db835c3e27e950d8
# bad: [920f2ecdf6c3b3526f60fbd38c68597953cad3ee] Merge tag 'sound-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
git bisect bad 920f2ecdf6c3b3526f60fbd38c68597953cad3ee
# good: [b821d298f8864dc3c3d42643812df43289159507] Merge remote-tracking branch 'asoc/topic/inte' into asoc-next
git bisect good b821d298f8864dc3c3d42643812df43289159507
# good: [7fc8e7c1d9787ab8cb0f91adb3bc9c2c64c00ef8] Merge branch 'for-linus' into for-next
git bisect good 7fc8e7c1d9787ab8cb0f91adb3bc9c2c64c00ef8
# good: [9b51f04424e17051a89ab32d892ca66b2a104825] Merge branch 'parisc-4.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
git bisect good 9b51f04424e17051a89ab32d892ca66b2a104825
# bad: [109a5db5042c035ded330b948a710b9a0c20934d] Merge branch 'for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
git bisect bad 109a5db5042c035ded330b948a710b9a0c20934d
# bad: [79af3ae6e293855321dcd1a43c73be316fdff1a9] ata: pata_octeon_cf: make of_device_ids const.
git bisect bad 79af3ae6e293855321dcd1a43c73be316fdff1a9
# good: [f01f62c257cc343246a5a9b2df8135f01fc044ab] libata: move ata_read_log_page to libata-core.c
git bisect good f01f62c257cc343246a5a9b2df8135f01fc044ab
# bad: [af36ddc988922adc00221b37662120cd78f4aa7d] ata: Add DT bindings for Faraday Technology FTIDE010
git bisect bad af36ddc988922adc00221b37662120cd78f4aa7d
# good: [1d51d5f3907abf86ef0521971bcddf5853564263] libata: clarify log page naming / grouping
git bisect good 1d51d5f3907abf86ef0521971bcddf5853564263
# bad: [818831c8b22f75353f59a63a484e20736c0567c9] libata: implement SECURITY PROTOCOL IN/OUT
git bisect bad 818831c8b22f75353f59a63a484e20736c0567c9
# good: [a0fd2454a36ffab2ce39b3a91c1385a5f98e63f0] libata: factor out a ata_identify_page_supported helper
git bisect good a0fd2454a36ffab2ce39b3a91c1385a5f98e63f0
# first bad commit: [818831c8b22f75353f59a63a484e20736c0567c9] libata: implement SECURITY PROTOCOL IN/OUT
Relevant hardware info:
$ lshw -class disk
*-disk
description: ATA Disk
product: M.2 (S42) 3ME3
physical id: 0.0.0
bus info: scsi@4:0.0.0
logical name: /dev/sda
version: 19
serial: 20161029AA101511210E
size: 14GiB (16GB)
capabilities: partitioned partitioned:dos
configuration: ansiversion=5 logicalsectorsize=512 sectorsize=512 signature=8de6ec69
$ lshw -class storage
*-storage:0
description: SATA controller
product: Atom processor C2000 AHCI SATA2 Controller
vendor: Intel Corporation
physical id: 17
bus info: pci@0000:00:17.0
version: 02
width: 32 bits
clock: 66MHz
capabilities: storage msi pm ahci_1.0 bus_master cap_list
configuration: driver=ahci latency=0
resources: irq:27 ioport:f0f0(size=8) ioport:f0e0(size=4) ioport:f0d0(size=8) ioport:f0c0(size=4) ioport:f040(size=32) memory:dfcaa000-dfcaa7ff
*-storage:1
description: SATA controller
product: Atom processor C2000 AHCI SATA3 Controller
vendor: Intel Corporation
physical id: 18
bus info: pci@0000:00:18.0
version: 02
width: 32 bits
clock: 66MHz
capabilities: storage msi pm ahci_1.0 bus_master cap_list
configuration: driver=ahci latency=0
resources: irq:28 ioport:f0b0(size=8) ioport:f0a0(size=4) ioport:f090(size=8) ioport:f080(size=4) ioport:f020(size=32) memory:dfca9000-dfca97ff
*-scsi
physical id: 1
logical name: scsi4
capabilities: emulated
^ permalink raw reply
* [PATCH 3/3] ata: constify ata_port_info
From: Arvind Yadav @ 2017-08-24 9:50 UTC (permalink / raw)
To: tj, b.zolnierkie, linus.walleij; +Cc: linux-kernel, linux-ide
In-Reply-To: <1503568201-9991-1-git-send-email-arvind.yadav.cs@gmail.com>
ata_port_info are not supposed to change at runtime. All functions
working with ata_port_info provided by <linux/libata.h> work with
const ata_port_info. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
---
drivers/ata/pdc_adma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ata/pdc_adma.c b/drivers/ata/pdc_adma.c
index f1e873a..77c21cb 100644
--- a/drivers/ata/pdc_adma.c
+++ b/drivers/ata/pdc_adma.c
@@ -162,7 +162,7 @@ static int adma_ata_init_one(struct pci_dev *pdev,
.port_stop = adma_port_stop,
};
-static struct ata_port_info adma_port_info[] = {
+static const struct ata_port_info adma_port_info[] = {
/* board_1841_idx */
{
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_POLLING,
--
1.9.1
^ permalink raw reply related
* [PATCH 0/3] constify ata_port_info
From: Arvind Yadav @ 2017-08-24 9:49 UTC (permalink / raw)
To: tj, b.zolnierkie, linus.walleij; +Cc: linux-kernel, linux-ide
ata_port_info are not supposed to change at runtime. All functions
working with ata_port_info provided by <linux/libata.h> work with
const ata_port_info. So mark the non-const structs as const.
Arvind Yadav (3):
[PATCH 1/3] ata: ftide010: constify ata_port_info
[PATCH 2/3] ata: pdc2027x: constify ata_port_info
[PATCH 3/3] ata: constify ata_port_info
drivers/ata/pata_ftide010.c | 2 +-
drivers/ata/pata_pdc2027x.c | 2 +-
drivers/ata/pdc_adma.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
--
1.9.1
^ permalink raw reply
* [PATCH 2/3] ata: pdc2027x: constify ata_port_info
From: Arvind Yadav @ 2017-08-24 9:50 UTC (permalink / raw)
To: tj, b.zolnierkie, linus.walleij; +Cc: linux-kernel, linux-ide
In-Reply-To: <1503568201-9991-1-git-send-email-arvind.yadav.cs@gmail.com>
ata_port_info are not supposed to change at runtime. All functions
working with ata_port_info provided by <linux/libata.h> work with
const ata_port_info. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
---
drivers/ata/pata_pdc2027x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c
index 82bfd51..62ae69a 100644
--- a/drivers/ata/pata_pdc2027x.c
+++ b/drivers/ata/pata_pdc2027x.c
@@ -154,7 +154,7 @@ enum {
.set_mode = pdc2027x_set_mode,
};
-static struct ata_port_info pdc2027x_port_info[] = {
+static const struct ata_port_info pdc2027x_port_info[] = {
/* PDC_UDMA_100 */
{
.flags = ATA_FLAG_SLAVE_POSS,
--
1.9.1
^ permalink raw reply related
* [PATCH 1/3] ata: ftide010: constify ata_port_info
From: Arvind Yadav @ 2017-08-24 9:49 UTC (permalink / raw)
To: tj, b.zolnierkie, linus.walleij; +Cc: linux-kernel, linux-ide
In-Reply-To: <1503568201-9991-1-git-send-email-arvind.yadav.cs@gmail.com>
ata_port_info are not supposed to change at runtime. All functions
working with ata_port_info provided by <linux/libata.h> work with
const ata_port_info. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
---
drivers/ata/pata_ftide010.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ata/pata_ftide010.c b/drivers/ata/pata_ftide010.c
index 5d4b72e..6c04495 100644
--- a/drivers/ata/pata_ftide010.c
+++ b/drivers/ata/pata_ftide010.c
@@ -256,7 +256,7 @@ static unsigned int ftide010_qc_issue(struct ata_queued_cmd *qc)
.qc_issue = ftide010_qc_issue,
};
-static struct ata_port_info ftide010_port_info[] = {
+static const struct ata_port_info ftide010_port_info[] = {
{
.flags = ATA_FLAG_SLAVE_POSS,
.mwdma_mask = ATA_MWDMA2,
--
1.9.1
^ permalink raw reply related
* Re: [PATCH v2 1/9] devicetree: bindings: Add sata port phy config parameters in ahci-ceva
From: Rob Herring @ 2017-08-23 0:41 UTC (permalink / raw)
To: Michal Simek
Cc: linux-kernel, monstr, Alexander Graf, Anurag Kumar Vulisha,
Tejun Heo, devicetree, linux-ide, Mark Rutland
In-Reply-To: <ad403e69fd5f17255db7d5190993f55ceb72c5a0.1503314240.git.michal.simek@xilinx.com>
On Mon, Aug 21, 2017 at 01:17:16PM +0200, Michal Simek wrote:
> From: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
>
> This patch adds device tree bindings for sata port phy parameters
> in the ahci-ceva.txt file.
>
> Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> Changes in v2:
> - DT fix naming in parameters description use pN instead of phy
> reported by Rob
>
> .../devicetree/bindings/ata/ahci-ceva.txt | 39 ++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Dear Friend
From: Mr. Hassan Alwan Ali @ 2017-08-22 8:29 UTC (permalink / raw)
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Thanks,
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^ permalink raw reply
* [PATCH v2 5/9] ata: ceva: Make RxWaterMark value as module parameter
From: Michal Simek @ 2017-08-21 11:17 UTC (permalink / raw)
To: linux-kernel, monstr
Cc: Alexander Graf, Rob Herring, Anurag Kumar Vulisha, Tejun Heo,
linux-ide
In-Reply-To: <cover.1503314240.git.michal.simek@xilinx.com>
From: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
This patch updates the driver to make Rx Fifo water mark value
as a module parameter.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/ata/ahci_ceva.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c
index b63fab2507fa..eff40ec86065 100644
--- a/drivers/ata/ahci_ceva.c
+++ b/drivers/ata/ahci_ceva.c
@@ -71,6 +71,10 @@
#define DRV_NAME "ahci-ceva"
#define CEVA_FLAG_BROKEN_GEN2 1
+static unsigned int rx_watermark = PTC_RX_WM_VAL;
+module_param(rx_watermark, uint, 0644);
+MODULE_PARM_DESC(rx_watermark, "RxWaterMark value (0 - 0x80)");
+
struct ceva_ahci_priv {
struct platform_device *ahci_pdev;
/* Port Phy2Cfg Register */
@@ -152,7 +156,7 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv)
writel(cevapriv->pp5c[i], mmio + AHCI_VEND_PP5C);
/* Rx Watermark setting */
- tmp = PTC_RX_WM_VAL | PTC_RSVD;
+ tmp = rx_watermark | PTC_RSVD;
writel(tmp, mmio + AHCI_VEND_PTC);
/* Default to Gen 3 Speed and Gen 1 if Gen2 is broken */
--
1.9.1
^ permalink raw reply related
* [PATCH v2 1/9] devicetree: bindings: Add sata port phy config parameters in ahci-ceva
From: Michal Simek @ 2017-08-21 11:17 UTC (permalink / raw)
To: linux-kernel, monstr
Cc: Alexander Graf, Rob Herring, Anurag Kumar Vulisha, Tejun Heo,
devicetree, linux-ide, Rob Herring, Mark Rutland
In-Reply-To: <cover.1503314240.git.michal.simek@xilinx.com>
From: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
This patch adds device tree bindings for sata port phy parameters
in the ahci-ceva.txt file.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2:
- DT fix naming in parameters description use pN instead of phy
reported by Rob
.../devicetree/bindings/ata/ahci-ceva.txt | 39 ++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/Documentation/devicetree/bindings/ata/ahci-ceva.txt b/Documentation/devicetree/bindings/ata/ahci-ceva.txt
index 7ca8b976c13a..7561cc4de371 100644
--- a/Documentation/devicetree/bindings/ata/ahci-ceva.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-ceva.txt
@@ -5,6 +5,36 @@ Required properties:
- compatible: Compatibility string. Must be 'ceva,ahci-1v84'.
- clocks: Input clock specifier. Refer to common clock bindings.
- interrupts: Interrupt specifier. Refer to interrupt binding.
+ - ceva,p0-cominit-params: OOB timing value for COMINIT parameter for port 0.
+ - ceva,p1-cominit-params: OOB timing value for COMINIT parameter for port 1.
+ The fields for the above parameter must be as shown below:
+ ceva,pN-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
+ CINMP : COMINIT Negate Minimum Period.
+ CIBGN : COMINIT Burst Gap Nominal.
+ CIBGMX: COMINIT Burst Gap Maximum.
+ CIBGMN: COMINIT Burst Gap Minimum.
+ - ceva,p0-comwake-params: OOB timing value for COMWAKE parameter for port 0.
+ - ceva,p1-comwake-params: OOB timing value for COMWAKE parameter for port 1.
+ The fields for the above parameter must be as shown below:
+ ceva,pN-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
+ CWBGMN: COMWAKE Burst Gap Minimum.
+ CWBGMX: COMWAKE Burst Gap Maximum.
+ CWBGN: COMWAKE Burst Gap Nominal.
+ CWNMP: COMWAKE Negate Minimum Period.
+ - ceva,p0-burst-params: Burst timing value for COM parameter for port 0.
+ - ceva,p1-burst-params: Burst timing value for COM parameter for port 1.
+ The fields for the above parameter must be as shown below:
+ ceva,pN-burst-params = /bits/ 8 <BMX BNM SFD PTST>;
+ BMX: COM Burst Maximum.
+ BNM: COM Burst Nominal.
+ SFD: Signal Failure Detection value.
+ PTST: Partial to Slumber timer value.
+ - ceva,p0-retry-params: Retry interval timing value for port 0.
+ - ceva,p1-retry-params: Retry interval timing value for port 1.
+ The fields for the above parameter must be as shown below:
+ ceva,pN-retry-params = /bits/ 16 <RIT RCT>;
+ RIT: Retry Interval Timer.
+ RCT: Rate Change Timer.
Optional properties:
- ceva,broken-gen2: limit to gen1 speed instead of gen2.
@@ -16,5 +46,14 @@ Examples:
interrupt-parent = <&gic>;
interrupts = <0 133 4>;
clocks = <&clkc SATA_CLK_ID>;
+ ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
+ ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
+ ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
+ ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
+
+ ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
+ ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
+ ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
+ ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
ceva,broken-gen2;
};
--
1.9.1
^ permalink raw reply related
* [PATCH v2 0/9] Ata ceva patches
From: Michal Simek @ 2017-08-21 11:17 UTC (permalink / raw)
To: linux-kernel, monstr
Cc: Alexander Graf, Rob Herring, Tejun Heo, devicetree, linux-ide,
Rob Herring, Mark Rutland
Hi,
this patchset contains the latest changes which are available in Xilinx tree.
Thanks,
Michal
Changes in v2:
- DT fix naming in parameters description use pN instead of phy
reported by Rob
Anurag Kumar Vulisha (9):
devicetree: bindings: Add sata port phy config parameters in ahci-ceva
ata: ceva: Move sata port phy oob settings to device-tree
ata: ceva: Add gen 3 mode support in driver
ata: ceva: Disable Device Sleep capability
ata: ceva: Make RxWaterMark value as module parameter
ata: ceva: Add CCI support for SATA if CCI is enabled
ata: ceva: Correct the AXI bus configuration for SATA ports
ata: ceva: Correct the suspend and resume logic for SATA
ata: ceva: Add SMMU support for SATA IP
.../devicetree/bindings/ata/ahci-ceva.txt | 39 ++++
drivers/ata/ahci_ceva.c | 197 +++++++++++++++++----
2 files changed, 198 insertions(+), 38 deletions(-)
--
1.9.1
^ permalink raw reply
* [PATCH v2 9/9] ata: ceva: Add SMMU support for SATA IP
From: Michal Simek @ 2017-08-21 11:17 UTC (permalink / raw)
To: linux-kernel, monstr
Cc: Alexander Graf, Rob Herring, Anurag Kumar Vulisha, Tejun Heo,
linux-ide
In-Reply-To: <cover.1503314240.git.michal.simek@xilinx.com>
From: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
AXI master interface in CEVA AHCI controller requires two unique
Write/Read ID tags per port. This is because, ahci controller uses
different AXI ID[3:0] bits for identifying non-data transfers(like
reading descriptors, updating PRD tables, etc) and data transfers
(like sending/receiving FIS).To make SMMU work with SATA we need to
add correct SMMU stream id for SATA. SMMU stream id for SATA is
determined based on the AXI ID[1:0] as shown below
SATA SMMU ID = <TBU number>, 0011, 00, 00, AXI ID[1:0]
Note: SATA in ZynqMp uses TBU1 so TBU number = 0x1, so
SMMU ID = 001, 0011, 00, 00, AXI ID[1:0]
Since we have four different AXI ID[3:0] (2 for port0 & 2 for port1
as said above) we get four different SMMU stream id's combinations
for SATA. These AXI ID can be configured using PAXIC register.
In this patch we assumed the below AXI ID values
Read ID/ Write ID for Non-Data Port0 transfers = 0
Read ID/ Write ID for Data Port0 transfers = 1
Read ID/ Write ID for Non-Data Port1 transfers = 2
Read ID/ Write ID for Data Port1 transfers = 3
Based on the above values,SMMU stream ID's for SATA will be 0x4c0 &
0x4c1 for PORT0, 0x4c2 & 0x4c3 for PORT1. These values needed to be
added to iommus dts property. This patch does the same.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/ata/ahci_ceva.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c
index c0742cbe4faa..5ecc9d46cb54 100644
--- a/drivers/ata/ahci_ceva.c
+++ b/drivers/ata/ahci_ceva.c
@@ -38,8 +38,10 @@
/* Vendor Specific Register bit definitions */
#define PAXIC_ADBW_BW64 0x1
-#define PAXIC_MAWIDD (1 << 8)
-#define PAXIC_MARIDD (1 << 16)
+#define PAXIC_MAWID(i) (((i) * 2) << 4)
+#define PAXIC_MARID(i) (((i) * 2) << 12)
+#define PAXIC_MARIDD(i) ((((i) * 2) + 1) << 16)
+#define PAXIC_MAWIDD(i) ((((i) * 2) + 1) << 8)
#define PAXIC_OTL (0x4 << 20)
/* Register bit definitions for cache control */
@@ -147,9 +149,11 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv)
/*
* AXI Data bus width to 64
* Set Mem Addr Read, Write ID for data transfers
+ * Set Mem Addr Read ID, Write ID for non-data transfers
* Transfer limit to 72 DWord
*/
- tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD | PAXIC_MARIDD | PAXIC_OTL;
+ tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD(i) | PAXIC_MARIDD(i) |
+ PAXIC_MAWID(i) | PAXIC_MARID(i) | PAXIC_OTL;
writel(tmp, mmio + AHCI_VEND_PAXIC);
/* Set AXI cache control register if CCi is enabled */
--
1.9.1
^ permalink raw reply related
* [PATCH v2 8/9] ata: ceva: Correct the suspend and resume logic for SATA
From: Michal Simek @ 2017-08-21 11:17 UTC (permalink / raw)
To: linux-kernel, monstr
Cc: Alexander Graf, Rob Herring, Anurag Kumar Vulisha, Tejun Heo,
linux-ide
In-Reply-To: <cover.1503314240.git.michal.simek@xilinx.com>
From: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
The present suspend code disables the port interrupts
and stops the HBA. On resume it enables the interrupts and HBA.
This works fine until the FPD power domain is not off.
If FPD is off then the ceva vendor specific configurations like
OOB, AXI settings are lost, they need to be re-programmed and
also since SERDES is also in FPD , SATA lane phy init needs to
be called again (which is not happening in the present sequence)
Because of this incorrect sequence SATA fails to work on resume.
This patch corrects the code to make Suspend & Resume work in normal
and FPD off cases.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/ata/ahci_ceva.c | 29 +++++++++++++++++++++++++++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c
index 113c1f617da9..c0742cbe4faa 100644
--- a/drivers/ata/ahci_ceva.c
+++ b/drivers/ata/ahci_ceva.c
@@ -298,12 +298,37 @@ static int ceva_ahci_probe(struct platform_device *pdev)
static int __maybe_unused ceva_ahci_suspend(struct device *dev)
{
- return ahci_platform_suspend_host(dev);
+ return ahci_platform_suspend(dev);
}
static int __maybe_unused ceva_ahci_resume(struct device *dev)
{
- return ahci_platform_resume_host(dev);
+ struct ata_host *host = dev_get_drvdata(dev);
+ struct ahci_host_priv *hpriv = host->private_data;
+ int rc;
+
+ rc = ahci_platform_enable_resources(hpriv);
+ if (rc)
+ return rc;
+
+ /* Configure CEVA specific config before resuming HBA */
+ ahci_ceva_setup(hpriv);
+
+ rc = ahci_platform_resume_host(dev);
+ if (rc)
+ goto disable_resources;
+
+ /* We resumed so update PM runtime state */
+ pm_runtime_disable(dev);
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+
+ return 0;
+
+disable_resources:
+ ahci_platform_disable_resources(hpriv);
+
+ return rc;
}
static SIMPLE_DEV_PM_OPS(ahci_ceva_pm_ops, ceva_ahci_suspend, ceva_ahci_resume);
--
1.9.1
^ permalink raw reply related
* [PATCH v2 7/9] ata: ceva: Correct the AXI bus configuration for SATA ports
From: Michal Simek @ 2017-08-21 11:17 UTC (permalink / raw)
To: linux-kernel, monstr
Cc: Alexander Graf, Rob Herring, Anurag Kumar Vulisha, Tejun Heo,
linux-ide
In-Reply-To: <cover.1503314240.git.michal.simek@xilinx.com>
From: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Previously PAXIC register was programmed before configuring PCFG
register. PCFG should be programmed with the address of the port
for which PAXIC should be configured for.
This was not happening before, so only one port PAXIC was written
correctly and the other port was having wrong value.
This patch moves the PXAIC register write after configuring PCFG,
doing so will correct the axi bus settings for sata port0 & port1.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/ata/ahci_ceva.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c
index ec9cfb52c6f6..113c1f617da9 100644
--- a/drivers/ata/ahci_ceva.c
+++ b/drivers/ata/ahci_ceva.c
@@ -134,14 +134,6 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv)
u32 tmp;
int i;
- /*
- * AXI Data bus width to 64
- * Set Mem Addr Read, Write ID for data transfers
- * Transfer limit to 72 DWord
- */
- tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD | PAXIC_MARIDD | PAXIC_OTL;
- writel(tmp, mmio + AHCI_VEND_PAXIC);
-
/* Set AHCI Enable */
tmp = readl(mmio + HOST_CTL);
tmp |= HOST_AHCI_EN;
@@ -152,6 +144,14 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv)
tmp = PCFG_TPSS_VAL | PCFG_TPRS_VAL | (PCFG_PAD_VAL + i);
writel(tmp, mmio + AHCI_VEND_PCFG);
+ /*
+ * AXI Data bus width to 64
+ * Set Mem Addr Read, Write ID for data transfers
+ * Transfer limit to 72 DWord
+ */
+ tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD | PAXIC_MARIDD | PAXIC_OTL;
+ writel(tmp, mmio + AHCI_VEND_PAXIC);
+
/* Set AXI cache control register if CCi is enabled */
if (cevapriv->is_cci_enabled) {
tmp = readl(mmio + AHCI_VEND_AXICC);
--
1.9.1
^ permalink raw reply related
* [PATCH v2 6/9] ata: ceva: Add CCI support for SATA if CCI is enabled
From: Michal Simek @ 2017-08-21 11:17 UTC (permalink / raw)
To: linux-kernel, monstr
Cc: Alexander Graf, Rob Herring, Anurag Kumar Vulisha, Tejun Heo,
linux-ide
In-Reply-To: <cover.1503314240.git.michal.simek@xilinx.com>
From: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
This patch adds support for CCI in SATA controller if CCI is
enabled in design. This patch will add CCI settings for SATA
if "dma-coherent" dts property is added.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/ata/ahci_ceva.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c
index eff40ec86065..ec9cfb52c6f6 100644
--- a/drivers/ata/ahci_ceva.c
+++ b/drivers/ata/ahci_ceva.c
@@ -32,6 +32,7 @@
#define AHCI_VEND_PP3C 0xB0
#define AHCI_VEND_PP4C 0xB4
#define AHCI_VEND_PP5C 0xB8
+#define AHCI_VEND_AXICC 0xBC
#define AHCI_VEND_PAXIC 0xC0
#define AHCI_VEND_PTC 0xC8
@@ -41,6 +42,15 @@
#define PAXIC_MARIDD (1 << 16)
#define PAXIC_OTL (0x4 << 20)
+/* Register bit definitions for cache control */
+#define AXICC_ARCA_VAL (0xF << 0)
+#define AXICC_ARCF_VAL (0xF << 4)
+#define AXICC_ARCH_VAL (0xF << 8)
+#define AXICC_ARCP_VAL (0xF << 12)
+#define AXICC_AWCFD_VAL (0xF << 16)
+#define AXICC_AWCD_VAL (0xF << 20)
+#define AXICC_AWCF_VAL (0xF << 24)
+
#define PCFG_TPSS_VAL (0x32 << 16)
#define PCFG_TPRS_VAL (0x2 << 12)
#define PCFG_PAD_VAL 0x2
@@ -82,6 +92,9 @@ struct ceva_ahci_priv {
u32 pp3c[NR_PORTS];
u32 pp4c[NR_PORTS];
u32 pp5c[NR_PORTS];
+ /* Axi Cache Control Register */
+ u32 axicc;
+ bool is_cci_enabled;
int flags;
};
@@ -139,6 +152,16 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv)
tmp = PCFG_TPSS_VAL | PCFG_TPRS_VAL | (PCFG_PAD_VAL + i);
writel(tmp, mmio + AHCI_VEND_PCFG);
+ /* Set AXI cache control register if CCi is enabled */
+ if (cevapriv->is_cci_enabled) {
+ tmp = readl(mmio + AHCI_VEND_AXICC);
+ tmp |= AXICC_ARCA_VAL | AXICC_ARCF_VAL |
+ AXICC_ARCH_VAL | AXICC_ARCP_VAL |
+ AXICC_AWCFD_VAL | AXICC_AWCD_VAL |
+ AXICC_AWCF_VAL;
+ writel(tmp, mmio + AHCI_VEND_AXICC);
+ }
+
/* Port Phy Cfg register enables */
tmp = PPCFG_TTA | PPCFG_PSS_EN | PPCFG_ESDF_EN;
writel(tmp, mmio + AHCI_VEND_PPCFG);
@@ -177,6 +200,7 @@ static int ceva_ahci_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct ahci_host_priv *hpriv;
struct ceva_ahci_priv *cevapriv;
+ enum dev_dma_attr attr;
int rc;
cevapriv = devm_kzalloc(dev, sizeof(*cevapriv), GFP_KERNEL);
@@ -248,6 +272,13 @@ static int ceva_ahci_probe(struct platform_device *pdev)
return -EINVAL;
}
+ /*
+ * Check if CCI is enabled for SATA. The DEV_DMA_COHERENT is returned
+ * if CCI is enabled, so check for DEV_DMA_COHERENT.
+ */
+ attr = device_get_dma_attr(dev);
+ cevapriv->is_cci_enabled = (attr == DEV_DMA_COHERENT);
+
hpriv->plat_data = cevapriv;
/* CEVA specific initialization */
--
1.9.1
^ permalink raw reply related
* [PATCH v2 4/9] ata: ceva: Disable Device Sleep capability
From: Michal Simek @ 2017-08-21 11:17 UTC (permalink / raw)
To: linux-kernel, monstr
Cc: Alexander Graf, Rob Herring, Anurag Kumar Vulisha, Tejun Heo,
linux-ide
In-Reply-To: <cover.1503314240.git.michal.simek@xilinx.com>
From: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Since CEVA controller does not support Device Sleep capability,
we need to clear that feature by clearing the DEVSLP bit in word78
of IDENTIFY DEVICE data. This patch does the same.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/ata/ahci_ceva.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c
index aa32c8a0f083..b63fab2507fa 100644
--- a/drivers/ata/ahci_ceva.c
+++ b/drivers/ata/ahci_ceva.c
@@ -81,8 +81,26 @@ struct ceva_ahci_priv {
int flags;
};
+static unsigned int ceva_ahci_read_id(struct ata_device *dev,
+ struct ata_taskfile *tf, u16 *id)
+{
+ u32 err_mask;
+
+ err_mask = ata_do_dev_read_id(dev, tf, id);
+ if (err_mask)
+ return err_mask;
+ /*
+ * Since CEVA controller does not support device sleep feature, we
+ * need to clear DEVSLP (bit 8) in word78 of the IDENTIFY DEVICE data.
+ */
+ id[ATA_ID_FEATURE_SUPP] &= cpu_to_le16(~(1 << 8));
+
+ return 0;
+}
+
static struct ata_port_operations ahci_ceva_ops = {
.inherits = &ahci_platform_ops,
+ .read_id = ceva_ahci_read_id,
};
static const struct ata_port_info ahci_ceva_port_info = {
--
1.9.1
^ permalink raw reply related
* [PATCH v2 3/9] ata: ceva: Add gen 3 mode support in driver
From: Michal Simek @ 2017-08-21 11:17 UTC (permalink / raw)
To: linux-kernel, monstr
Cc: Alexander Graf, Rob Herring, Anurag Kumar Vulisha, Tejun Heo,
linux-ide
In-Reply-To: <cover.1503314240.git.michal.simek@xilinx.com>
From: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
This patch sets gen 3 mode as default mode in ahci_ceva driver.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/ata/ahci_ceva.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c
index 59de2ca1885c..aa32c8a0f083 100644
--- a/drivers/ata/ahci_ceva.c
+++ b/drivers/ata/ahci_ceva.c
@@ -60,6 +60,7 @@
#define PORT1_BASE 0x180
/* Port Control Register Bit Definitions */
+#define PORT_SCTL_SPD_GEN3 (0x3 << 4)
#define PORT_SCTL_SPD_GEN2 (0x2 << 4)
#define PORT_SCTL_SPD_GEN1 (0x1 << 4)
#define PORT_SCTL_IPM (0x3 << 8)
@@ -136,8 +137,8 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv)
tmp = PTC_RX_WM_VAL | PTC_RSVD;
writel(tmp, mmio + AHCI_VEND_PTC);
- /* Default to Gen 2 Speed and Gen 1 if Gen2 is broken */
- tmp = PORT_SCTL_SPD_GEN2 | PORT_SCTL_IPM;
+ /* Default to Gen 3 Speed and Gen 1 if Gen2 is broken */
+ tmp = PORT_SCTL_SPD_GEN3 | PORT_SCTL_IPM;
if (cevapriv->flags & CEVA_FLAG_BROKEN_GEN2)
tmp = PORT_SCTL_SPD_GEN1 | PORT_SCTL_IPM;
writel(tmp, mmio + PORT_SCR_CTL + PORT_BASE + PORT_OFFSET * i);
--
1.9.1
^ permalink raw reply related
* [PATCH v2 2/9] ata: ceva: Move sata port phy oob settings to device-tree
From: Michal Simek @ 2017-08-21 11:17 UTC (permalink / raw)
To: linux-kernel, monstr
Cc: Alexander Graf, Rob Herring, Anurag Kumar Vulisha, Tejun Heo,
linux-ide
In-Reply-To: <cover.1503314240.git.michal.simek@xilinx.com>
From: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
In SATA Speed negotiation happens with OOB(Out of Band) signals. These OOB
signal timing values are configured through vendor specific registers in the
SATA controller. These OOB timings depends on the generator and detector clock
frequency, which varies from board to board (ex: ep108 and zc1751 has different
clock frequencies).
To avoid maintaing these OOB settings in the driver, it is better to move these
settings to the device-tree node and read from the device-tree.
This patch does the same.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/ata/ahci_ceva.c | 84 +++++++++++++++++++++++++++++++++++--------------
1 file changed, 61 insertions(+), 23 deletions(-)
diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c
index 207649d323c5..59de2ca1885c 100644
--- a/drivers/ata/ahci_ceva.c
+++ b/drivers/ata/ahci_ceva.c
@@ -50,21 +50,6 @@
#define PPCFG_PSS_EN (1 << 29)
#define PPCFG_ESDF_EN (1 << 31)
-#define PP2C_CIBGMN 0x0F
-#define PP2C_CIBGMX (0x25 << 8)
-#define PP2C_CIBGN (0x18 << 16)
-#define PP2C_CINMP (0x29 << 24)
-
-#define PP3C_CWBGMN 0x04
-#define PP3C_CWBGMX (0x0B << 8)
-#define PP3C_CWBGN (0x08 << 16)
-#define PP3C_CWNMP (0x0F << 24)
-
-#define PP4C_BMX 0x0a
-#define PP4C_BNM (0x08 << 8)
-#define PP4C_SFD (0x4a << 16)
-#define PP4C_PTST (0x06 << 24)
-
#define PP5C_RIT 0x60216
#define PP5C_RCT (0x7f0 << 20)
@@ -87,6 +72,11 @@
struct ceva_ahci_priv {
struct platform_device *ahci_pdev;
+ /* Port Phy2Cfg Register */
+ u32 pp2c[NR_PORTS];
+ u32 pp3c[NR_PORTS];
+ u32 pp4c[NR_PORTS];
+ u32 pp5c[NR_PORTS];
int flags;
};
@@ -131,20 +121,16 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv)
writel(tmp, mmio + AHCI_VEND_PPCFG);
/* Phy Control OOB timing parameters COMINIT */
- tmp = PP2C_CIBGMN | PP2C_CIBGMX | PP2C_CIBGN | PP2C_CINMP;
- writel(tmp, mmio + AHCI_VEND_PP2C);
+ writel(cevapriv->pp2c[i], mmio + AHCI_VEND_PP2C);
/* Phy Control OOB timing parameters COMWAKE */
- tmp = PP3C_CWBGMN | PP3C_CWBGMX | PP3C_CWBGN | PP3C_CWNMP;
- writel(tmp, mmio + AHCI_VEND_PP3C);
+ writel(cevapriv->pp3c[i], mmio + AHCI_VEND_PP3C);
/* Phy Control Burst timing setting */
- tmp = PP4C_BMX | PP4C_BNM | PP4C_SFD | PP4C_PTST;
- writel(tmp, mmio + AHCI_VEND_PP4C);
+ writel(cevapriv->pp4c[i], mmio + AHCI_VEND_PP4C);
/* Rate Change Timer and Retry Interval Timer setting */
- tmp = PP5C_RIT | PP5C_RCT;
- writel(tmp, mmio + AHCI_VEND_PP5C);
+ writel(cevapriv->pp5c[i], mmio + AHCI_VEND_PP5C);
/* Rx Watermark setting */
tmp = PTC_RX_WM_VAL | PTC_RSVD;
@@ -187,6 +173,58 @@ static int ceva_ahci_probe(struct platform_device *pdev)
if (of_property_read_bool(np, "ceva,broken-gen2"))
cevapriv->flags = CEVA_FLAG_BROKEN_GEN2;
+ /* Read OOB timing value for COMINIT from device-tree */
+ if (of_property_read_u8_array(np, "ceva,p0-cominit-params",
+ (u8 *)&cevapriv->pp2c[0], 4) < 0) {
+ dev_warn(dev, "ceva,p0-cominit-params property not defined\n");
+ return -EINVAL;
+ }
+
+ if (of_property_read_u8_array(np, "ceva,p1-cominit-params",
+ (u8 *)&cevapriv->pp2c[1], 4) < 0) {
+ dev_warn(dev, "ceva,p1-cominit-params property not defined\n");
+ return -EINVAL;
+ }
+
+ /* Read OOB timing value for COMWAKE from device-tree*/
+ if (of_property_read_u8_array(np, "ceva,p0-comwake-params",
+ (u8 *)&cevapriv->pp3c[0], 4) < 0) {
+ dev_warn(dev, "ceva,p0-comwake-params property not defined\n");
+ return -EINVAL;
+ }
+
+ if (of_property_read_u8_array(np, "ceva,p1-comwake-params",
+ (u8 *)&cevapriv->pp3c[1], 4) < 0) {
+ dev_warn(dev, "ceva,p1-comwake-params property not defined\n");
+ return -EINVAL;
+ }
+
+ /* Read phy BURST timing value from device-tree */
+ if (of_property_read_u8_array(np, "ceva,p0-burst-params",
+ (u8 *)&cevapriv->pp4c[0], 4) < 0) {
+ dev_warn(dev, "ceva,p0-burst-params property not defined\n");
+ return -EINVAL;
+ }
+
+ if (of_property_read_u8_array(np, "ceva,p1-burst-params",
+ (u8 *)&cevapriv->pp4c[1], 4) < 0) {
+ dev_warn(dev, "ceva,p1-burst-params property not defined\n");
+ return -EINVAL;
+ }
+
+ /* Read phy RETRY interval timing value from device-tree */
+ if (of_property_read_u16_array(np, "ceva,p0-retry-params",
+ (u16 *)&cevapriv->pp5c[0], 2) < 0) {
+ dev_warn(dev, "ceva,p0-retry-params property not defined\n");
+ return -EINVAL;
+ }
+
+ if (of_property_read_u16_array(np, "ceva,p1-retry-params",
+ (u16 *)&cevapriv->pp5c[1], 2) < 0) {
+ dev_warn(dev, "ceva,p1-retry-params property not defined\n");
+ return -EINVAL;
+ }
+
hpriv->plat_data = cevapriv;
/* CEVA specific initialization */
--
1.9.1
^ permalink raw reply related
* [tip:core/rcu] drivers/ata: Replace spin_unlock_wait() with lock/unlock pair
From: tip-bot for Paul E. McKenney @ 2017-08-21 9:14 UTC (permalink / raw)
To: linux-tip-commits
Cc: paulmck, peterz, parri.andrea, tj, will.deacon, mingo, hpa,
torvalds, tglx, stern, linux-ide
Commit-ID: a4f08141d0b876407ca4e4b0ae1b2dec35851532
Gitweb: http://git.kernel.org/tip/a4f08141d0b876407ca4e4b0ae1b2dec35851532
Author: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
AuthorDate: Thu, 29 Jun 2017 13:10:47 -0700
Committer: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
CommitDate: Thu, 17 Aug 2017 08:08:58 -0700
drivers/ata: Replace spin_unlock_wait() with lock/unlock pair
There is no agreed-upon definition of spin_unlock_wait()'s semantics,
and it appears that all callers could do just as well with a lock/unlock
pair. This commit therefore eliminates the spin_unlock_wait() call and
associated else-clause and hoists the then-clause's lock and unlock out of
the "if" statement. This should be safe from a performance perspective
because according to Tejun there should be few if any drivers that don't
set their own error handler.
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Tejun Heo <tj@kernel.org>
Cc: <linux-ide@vger.kernel.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Andrea Parri <parri.andrea@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
---
drivers/ata/libata-eh.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index b70bcf6..b325db2 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -645,12 +645,11 @@ void ata_scsi_cmd_error_handler(struct Scsi_Host *host, struct ata_port *ap,
* completions are honored. A scmd is determined to have
* timed out iff its associated qc is active and not failed.
*/
+ spin_lock_irqsave(ap->lock, flags);
if (ap->ops->error_handler) {
struct scsi_cmnd *scmd, *tmp;
int nr_timedout = 0;
- spin_lock_irqsave(ap->lock, flags);
-
/* This must occur under the ap->lock as we don't want
a polled recovery to race the real interrupt handler
@@ -700,12 +699,11 @@ void ata_scsi_cmd_error_handler(struct Scsi_Host *host, struct ata_port *ap,
if (nr_timedout)
__ata_port_freeze(ap);
- spin_unlock_irqrestore(ap->lock, flags);
/* initialize eh_tries */
ap->eh_tries = ATA_EH_MAX_TRIES;
- } else
- spin_unlock_wait(ap->lock);
+ }
+ spin_unlock_irqrestore(ap->lock, flags);
}
EXPORT_SYMBOL(ata_scsi_cmd_error_handler);
^ permalink raw reply related
* Re: [PATCH 08/12] ide-floppy: Use blk_rq_is_scsi()
From: Hannes Reinecke @ 2017-08-18 7:39 UTC (permalink / raw)
To: Bart Van Assche, Jens Axboe
Cc: linux-block, Christoph Hellwig, David S . Miller, linux-ide
In-Reply-To: <20170817232311.25948-9-bart.vanassche@wdc.com>
On 08/18/2017 01:23 AM, Bart Van Assche wrote:
> This patch does not change any functionality.
>
> Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
> Cc: David S. Miller <davem@davemloft.net>
> Cc: linux-ide@vger.kernel.org
> ---
> drivers/ide/ide-floppy.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/ide/ide-floppy.c b/drivers/ide/ide-floppy.c
> index 627b1f62a749..3ddd88219906 100644
> --- a/drivers/ide/ide-floppy.c
> +++ b/drivers/ide/ide-floppy.c
> @@ -72,7 +72,7 @@ static int ide_floppy_callback(ide_drive_t *drive, int dsc)
> drive->failed_pc = NULL;
>
> if (pc->c[0] == GPCMD_READ_10 || pc->c[0] == GPCMD_WRITE_10 ||
> - (req_op(rq) == REQ_OP_SCSI_IN || req_op(rq) == REQ_OP_SCSI_OUT))
> + blk_rq_is_scsi(rq))
> uptodate = 1; /* FIXME */
> else if (pc->c[0] == GPCMD_REQUEST_SENSE) {
>
>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Cheers,
Hannes
--
Dr. Hannes Reinecke Teamlead Storage & Networking
hare@suse.de +49 911 74053 688
SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: F. Imendörffer, J. Smithard, J. Guild, D. Upmanyu, G. Norton
HRB 21284 (AG Nürnberg)
^ permalink raw reply
* Re: [PATCH 08/12] ide-floppy: Use blk_rq_is_scsi()
From: David Miller @ 2017-08-18 5:00 UTC (permalink / raw)
To: bart.vanassche; +Cc: axboe, linux-block, hch, linux-ide
In-Reply-To: <20170817232311.25948-9-bart.vanassche@wdc.com>
From: Bart Van Assche <bart.vanassche@wdc.com>
Date: Thu, 17 Aug 2017 16:23:07 -0700
> This patch does not change any functionality.
>
> Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
Acked-by: David S. Miller <davem@davemloft.net>
^ permalink raw reply
* [PATCH v4 2/2] dt-bindings: ata: add DT bindings for MediaTek SATA controller
From: Ryder Lee @ 2017-08-18 1:13 UTC (permalink / raw)
To: Hans de Goede, Tejun Heo
Cc: Rob Herring, devicetree, linux-mediatek, linux-kernel, linux-ide,
Long Cheng, Ryder Lee
In-Reply-To: <cover.1503018631.git.ryder.lee@mediatek.com>
Add DT bindings for the onboard SATA controller present on the MediaTek
SoCs.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/ata/ahci-mtk.txt | 51 ++++++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ata/ahci-mtk.txt
diff --git a/Documentation/devicetree/bindings/ata/ahci-mtk.txt b/Documentation/devicetree/bindings/ata/ahci-mtk.txt
new file mode 100644
index 0000000..d2aa696
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/ahci-mtk.txt
@@ -0,0 +1,51 @@
+MediaTek Serial ATA controller
+
+Required properties:
+ - compatible : Must be "mediatek,<chip>-ahci", "mediatek,mtk-ahci".
+ When using "mediatek,mtk-ahci" compatible strings, you
+ need SoC specific ones in addition, one of:
+ - "mediatek,mt7622-ahci"
+ - reg : Physical base addresses and length of register sets.
+ - interrupts : Interrupt associated with the SATA device.
+ - interrupt-names : Associated name must be: "hostc".
+ - clocks : A list of phandle and clock specifier pairs, one for each
+ entry in clock-names.
+ - clock-names : Associated names must be: "ahb", "axi", "asic", "rbc", "pm".
+ - phys : A phandle and PHY specifier pair for the PHY port.
+ - phy-names : Associated name must be: "sata-phy".
+ - ports-implemented : See ./ahci-platform.txt for details.
+
+Optional properties:
+ - power-domains : A phandle and power domain specifier pair to the power
+ domain which is responsible for collapsing and restoring
+ power to the peripheral.
+ - resets : Must contain an entry for each entry in reset-names.
+ See ../reset/reset.txt for details.
+ - reset-names : Associated names must be: "axi", "sw", "reg".
+ - mediatek,phy-mode : A phandle to the system controller, used to enable
+ SATA function.
+
+Example:
+
+ sata: sata@1a200000 {
+ compatible = "mediatek,mt7622-ahci",
+ "mediatek,mtk-ahci";
+ reg = <0 0x1a200000 0 0x1100>;
+ interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hostc";
+ clocks = <&pciesys CLK_SATA_AHB_EN>,
+ <&pciesys CLK_SATA_AXI_EN>,
+ <&pciesys CLK_SATA_ASIC_EN>,
+ <&pciesys CLK_SATA_RBC_EN>,
+ <&pciesys CLK_SATA_PM_EN>;
+ clock-names = "ahb", "axi", "asic", "rbc", "pm";
+ phys = <&u3port1 PHY_TYPE_SATA>;
+ phy-names = "sata-phy";
+ ports-implemented = <0x1>;
+ power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
+ resets = <&pciesys MT7622_SATA_AXI_BUS_RST>,
+ <&pciesys MT7622_SATA_PHY_SW_RST>,
+ <&pciesys MT7622_SATA_PHY_REG_RST>;
+ reset-names = "axi", "sw", "reg";
+ mediatek,phy-mode = <&pciesys>;
+ };
--
1.9.1
^ permalink raw reply related
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