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Tue, 23 Sep 2025 01:21:03 -0700 (PDT) Received: from [10.5.0.2] ([91.205.230.222]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b29961979e5sm676840966b.0.2025.09.23.01.21.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Sep 2025 01:21:03 -0700 (PDT) Message-ID: <02c26151da7af1e05aecadf0e2ce20552c2908e0.camel@gmail.com> Subject: Re: [PATCH 2/2] iio: dac: adding support for Microchip MCP47FEB02 From: Nuno =?ISO-8859-1?Q?S=E1?= To: David Lechner , Ariana Lazar , Jonathan Cameron , Nuno =?ISO-8859-1?Q?S=E1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Date: Tue, 23 Sep 2025 09:21:30 +0100 In-Reply-To: <3457c119-2f49-43a3-b96b-736b8f5de99b@baylibre.com> References: <20250922-mcp47feb02-v1-0-06cb4acaa347@microchip.com> <20250922-mcp47feb02-v1-2-06cb4acaa347@microchip.com> <859d8472a8f9e8d28b890ad565f9d3ce11e162d5.camel@gmail.com> <3457c119-2f49-43a3-b96b-736b8f5de99b@baylibre.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Mon, 2025-09-22 at 17:15 -0500, David Lechner wrote: > On 9/22/25 3:10 PM, Nuno S=C3=A1 wrote: > > Hi Ariana, > >=20 > > Thanks for your patches. Some initial comments from me... > >=20 > > On Mon, 2025-09-22 at 14:30 +0300, Ariana Lazar wrote: >=20 > ... >=20 > > > +static IIO_DEVICE_ATTR(store_eeprom, 0200, NULL, mcp47feb02_store_ee= prom, > > > 0); > > > +static struct attribute *mcp47feb02_attributes[] =3D { > > > + &iio_dev_attr_store_eeprom.dev_attr.attr, > > > + NULL, > > > +}; > > > + > >=20 > > Not going to argue about the ABI for now but I don't think this is a > > standard one? So > > if acceptable you need an ABI doc. > >=20 > Here's a random idea. (I would wait for Jonathan to weigh in first before > assuming it is an acceptable idea though :-p) >=20 > The config registers are pretty much going to be a one-time deal. So thos= e > could be written to only if they need it during probe. >=20 > For the voltage output registers, we could add extra out_voltageY channel= s > that are the power-on output state channels. So writing to out_voltageY_r= aw > wouldn't change any real output but would just be written to EEPROM. This > way these voltages could be controlled independently from the real output= s > and it uses existing ABI. >=20 > In any case, it would be interesting to hear more about how this chips ar= e > actually used to better understand this EEPROM feature. I didn't really looked at the datasheet so this can be totally wrong. But w= e have some LTC parts (mainly hwmon stuff) that are also packed with an EEPRO= N. AFAIU, the usecase in there is to have some defaults you can program in the chips (and there's a feature we can enable so the chip can save things into= the eeprom automatically). Now, in those drivers we don't really support doing anything with the eeprom at runtime so I'm curious to see how this unfolds = :) - Nuno S=C3=A1