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([2a05:6e02:1041:c10:37e6:ed62:3c8b:2621]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-477a9de46cdsm106307725e9.8.2025.11.22.08.17.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 22 Nov 2025 08:17:00 -0800 (PST) Message-ID: <1dcf3278-7552-4b52-91d2-e8e711f8b230@linaro.org> Date: Sat, 22 Nov 2025 17:16:59 +0100 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 0/2] NXP SAR ADC IIO driver for s32g2/3 platforms From: Daniel Lezcano To: jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, robh@kernel.org, conor+dt@kernel.org, krzk+dt@kernel.org Cc: linux-iio@vger.kernel.org, s32@nxp.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, chester62515@gmail.com, mbrugger@suse.com, ghennadi.procopciuc@oss.nxp.com, vkoul@kernel.org References: <20251119223905.107065-1-daniel.lezcano@linaro.org> Content-Language: en-US In-Reply-To: <20251119223905.107065-1-daniel.lezcano@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Johnathan, I believe I took all comments into account. Can this series be considered to be merged ? Thanks -- Daniel On 11/19/25 23:39, Daniel Lezcano wrote: > The S32G2 and S32G3 platforms have a couple of successive > approximation register (SAR) ADCs with eight channels and 12-bit > resolution. These changes provide the driver support for these ADCs > and the bindings describing them. > > The driver is derived from the BSP driver version. It has been partly > rewritten to conform to upstream criteria. > > https://github.com/nxp-auto-linux/linux/blob/release/bsp44.0-6.6.85-rt/drivers/iio/adc/s32cc_adc.c > > After the V1 posting there were some discussions around the DMA code > to be converted to use the IIO DMA API [1]. Unfortunately this one is > not yet fully implemented and merged in the framework to support the > cyclic DMA. The current DMA code in the driver has been used in > production since several years and even if I agree it can be improved > with a dedicated IIO DMA API in the future, IMO, it sounds reasonable > to keep it as is until the IIO DMA API supporting the cyclic DMA is > merged. I'll be glad to convert the driver code if such an API exists > and allows to remove code inside the driver. > > [1] https://lore.kernel.org/all/c30bb4b6328d15a9c213c0fa64b909035dc7bf40.camel@gmail.com/ > [2] https://lore.kernel.org/all/aRyBKH4KOQ1L8lA4@black.igk.intel.com/ > > Changelog: > * V8: > ** Andy Shevchenko ** > - Fixed a sentence in the changelog > - Moved dev_name() to the upper line for a better line length > - Unified messages by starting with a capital letter everywhere > - Changed 'dma' -> 'DMA' > - Used DEFINE_SIMPLE_DEV_PM_OPS() instead of deprecated macros > - Fixed pm_ptr() -> pm_sleep_ptr() > > * V7: > ** Andy Shevchenko ** > - Moved paragraph closer to the tags in the changelog > - Used Originally-by which is more adequate > - Removed unneeded modulo conversion in macro > - Fixed the consistency of the style by lowercasing the hexa value > - Rename a timeout macro and remove another one > - Clarified a comment when getting the power state of the ADC > - Added a comment to clarify the clock is fast and suitable in atomic context > - Uppercased the 'adc' words > - Added a TODO to use field_get() when available > - Removed unneeded explicit casting > - Replaced a more readable version with raw ? 0 : 1 > - Folded return value check with wait_for_completion_interruptible() > - Fixed comment "8 bits" --> "8-bit" > - Fixed typo in comment > - Fixed comment "iio_push_to_buffers_with_ts()" > - Clarified why not using a pointer to a mask > - Removed unneeded blank line > - Removed duplicate error code in message > - Initialized the spin lock before requesting the interrupt > - One lined declaration in suspend/resume callbacks > - Added trailing comma in structure initialization > > * V6: > ** Vinod Koul ** > - Dynamically allocate/release the channel at enable/disable > > ** Jonathan Cameron ** > - Reached out Vinod to clarify the buffer life cycle > - Inverted more intuitive variable initialization > - Updated comment with "iio_push_to_buffers_with_ts" > > ** Andy Shevchenko ** > - Removed unused NXP_SAR_ADC_IIO_BUFF_SZ macro > - Removed "U" annotation > - Checked the buffer is a byte buffer > - Investigated callback routine vs residue and updated the changelog > the conclusions [2] > > * V5: > - Rebased against v6.18-rc1 > > ** Jonathan Cameron ** > - Replace DRIVER_NAME macro with its literal string > - Used FIELD_MODIFY() wherever it is possible > - Complied with the 80 chars convention > - Combined two variables in a single line declaration > - Removed the 'remove' function as it is useless > - Changed s32g2_sar_adc_data structure indentation / format > > * V4: > ** Christophe Jaillet ** > - Used dmam_alloc_coherent() instead of dma_alloc_coherent() > > * V3: > ** Jonathan Cameron ** > - Removed specific IIO_SYSFS_TRIGGER dependency in Kconfig > - Fixed headers > - Avoided macro generic names > - Used IIO_DECLARE_BUFFER_WITH_TS > - Documented buffer and buffer_chan > - Fixed single line comment > - Commented why channel 32 is the timestamp > - Renamed __ functions > - Factored out the raw read function to prevent nested goto in the switch > - Returned -EINVAL instead of break > - Removed explict pointer cast > - Used iio_push_to_buffers_with_ts variant > - Fixed ordering operations in postenable / predisable > - Return IRQ_HANDLED even if there is an error in the isr > - Fixed devm_add_action_or_reset() to return directly > - Used sizeof(*var) instead of sizeof(struct myvar) > - Used model name instead of dev_name() > - Used dev_err_probe() in any case in the probe function > - Fixed indentation > > ** David Lechner ** > - Kept alphabetical order in Makefile > - Changed explicit GPL-2.0-only > - Removed clock name in when calling devm_clk_get_enabled() > > ** Andriy Shevchenko ** > - Fixed headers ordering and added the missing ones > - Fixed constant numeric format > - Ran pahole and consolidated the nxp_sar_adc structure > - Fixed semi-column in comments and typos > - Fixed indentation > - Moved data assignment before iio_dev allocation > > * V2: > - Massaged the cover letter changelog to explain the DMA > ** Andriy Shevchenko ** > - Added missing headers and use proper header for of.h > - Changed macro offset zero to be consistent > - Remove macros REG_ADC_MCR_NRSMPL_* as they are unused > - Changed delays macro under the form 100000 => 100 * USEC_PER_MSEC > - Replaced PAGE_SIZE by a NXP_PAGE_SIZE = SZ_4K macro > - Replaced read_poll_timeout() by readl_poll_timeout() > - Changed error pattern "error first" > - Replaced variable type 'int' to 'unsigned int' > - Fixed bug right instead of left shift, use BIT(channel) > - Returned directly from switch-case > - Used guard(spinlock_irqsave)() > - One liner function call > - Remove redundant {} > - Write default values litterals instead of temporary variables > - Changed variable name vref -> vref_mV > - Removed unneeded error message > - Used dev_err_probe() consistently > - Removed successful driver probe message > - Removed redundant blank line > > ** Nuno Sa ** > - Replaced of_device_get_match_data() by device_get_match_data() > - Removed iio_device_unregister() because devm_iio_device_register() is used > - Removed "/* sentinel */" comment > - Removed CONFIG_PM_SLEEP defiries > > ** Krzysztof Kozlowski / David Lechner ** > - Removed clock-names in DT bindings > - Fixed minItems by maxItems > > * V1: > - Initial post > > Daniel Lezcano (2): > dt-bindings: iio: adc: Add the NXP SAR ADC for s32g2/3 platforms > iio: adc: Add the NXP SAR ADC support for the s32g2/3 platforms > > .../bindings/iio/adc/nxp,s32g2-sar-adc.yaml | 63 + > drivers/iio/adc/Kconfig | 12 + > drivers/iio/adc/Makefile | 1 + > drivers/iio/adc/nxp-sar-adc.c | 1017 +++++++++++++++++ > 4 files changed, 1093 insertions(+) > create mode 100644 Documentation/devicetree/bindings/iio/adc/nxp,s32g2-sar-adc.yaml > create mode 100644 drivers/iio/adc/nxp-sar-adc.c > -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog