From: Maxime Roussin-Belanger <maxime.roussinbelanger@gmail.com>
To: Lars-Peter Clausen <lars@metafoo.de>, linux-iio@vger.kernel.org
Cc: jeff.dagenais@gmail.com
Subject: Re: [PATCH] iio: dac: Add support for ltc2632 DACs
Date: Mon, 6 Mar 2017 11:48:16 -0500 [thread overview]
Message-ID: <20170306164815.GA4185@localhost.localdomain> (raw)
In-Reply-To: <4cc58721-aca3-f8ef-4ad3-97983f71f264@metafoo.de>
On Mon, Mar 06, 2017 at 11:24:58AM +0100, Lars-Peter Clausen wrote:
> On 03/02/2017 08:01 PM, Maxime Roussin-Belanger wrote:
> > +
> > +#define LTC2632_CMD_WRITE_INPUT_N 0x0
> > +#define LTC2632_CMD_UPDATE_DAC_N 0x1
> > +#define LTC2632_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2
> > +#define LTC2632_CMD_WRITE_INPUT_N_UPDATE_N 0x3
> > +#define LTC2632_CMD_POWERDOWN_DAC_N 0x4
> > +#define LTC2632_CMD_POWERDOWN_CHIP 0x5
> > +#define LTC2632_CMD_INTERNAL_REFER 0x6
> > +#define LTC2632_CMD_EXTERNAL_REFER 0x7
>
> Looks like the SPI versions of the LTC I2C DACs already supported in
> ad5064.c. Since that driver has SPI support, we could support them there
> instead of a separate driver. Should be a lot less code.
>
We considered it, but the ad5064 is complicated for the simple ltc2632. It
would complicated ad5064, I don't think it is worth it.
For example, we would need another spi_write, because the CMD shift and the
ADDR shift are not the same. The current support for LTC2632 doesn't support
midscale. It only has 2 channels.
We think this new ltc2632 driver could become the base for the rest of the
ltc2632 series as well as other similarly simple DACs.
prev parent reply other threads:[~2017-03-06 16:48 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-02 19:01 [PATCH] iio: dac: Add support for ltc2632 DACs Maxime Roussin-Belanger
2017-03-04 19:03 ` Jonathan Cameron
2017-03-07 15:59 ` Jean-Francois Dagenais
2017-03-13 20:32 ` Jonathan Cameron
2017-03-05 22:47 ` Peter Meerwald-Stadler
2017-03-06 10:24 ` Lars-Peter Clausen
2017-03-06 16:48 ` Maxime Roussin-Belanger [this message]
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