[PATCH 0/4] iio: accel: adxl345: add calibration offset and sampling frequency support

[PATCH 0/4] iio: accel: adxl345: add calibration offset and sampling frequency support

[Akinobu Mita]

This patchset adds calibration offset and sampling frequency support for
adxl345 driver with some preparatory changes.

Akinobu Mita (4):
  iio: accel: adxl345: add link to datasheet
  iio: accel: adxl345: use scan_index for accessing accel registers
  iio: accel: adxl345: add calibration offset support
  iio: accel: adxl345: add sampling frequency support

 drivers/iio/accel/adxl345_core.c | 126 +++++++++++++++++++++++++++++++++++----
 1 file changed, 115 insertions(+), 11 deletions(-)

Cc: Eva Rachel Retuya <eraretuya@gmail.com>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Jonathan Cameron <jic23@kernel.org>
-- 
2.7.4

[PATCH 1/4] iio: accel: adxl345: add link to datasheet

[Akinobu Mita]

Add a link to the ADXL345 datasheet

Cc: Eva Rachel Retuya <eraretuya@gmail.com>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
---
 drivers/iio/accel/adxl345_core.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c
index 7251d0e..8e0d56b 100644
--- a/drivers/iio/accel/adxl345_core.c
+++ b/drivers/iio/accel/adxl345_core.c
@@ -6,6 +6,8 @@
  * This file is subject to the terms and conditions of version 2 of
  * the GNU General Public License. See the file COPYING in the main
  * directory of this archive for more details.
+ *
+ * Datasheet: http://www.analog.com/media/en/technical-documentation/data-sheets/ADXL345.pdf
  */
 
 #include <linux/module.h>
-- 
2.7.4

[PATCH 2/4] iio: accel: adxl345: use scan_index for accessing accel registers

[Akinobu Mita]

Currently the address field in iio_chan_spec is filled with an accel
data register address for the corresponding axis.

In preparation for adding calibration offset support, this makes use of
scan_index field to access accel data registers instead of using address
field.  This change makes it easier to access both accel registers and
calibration offset registers with fewer lines of code as these are
located in X-axis, Y-axis, Z-axis order.

Cc: Eva Rachel Retuya <eraretuya@gmail.com>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
---
 drivers/iio/accel/adxl345_core.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c
index 8e0d56b..6b62f82 100644
--- a/drivers/iio/accel/adxl345_core.c
+++ b/drivers/iio/accel/adxl345_core.c
@@ -49,19 +49,19 @@ struct adxl345_data {
 	u8 data_range;
 };
 
-#define ADXL345_CHANNEL(reg, axis) {					\
+#define ADXL345_CHANNEL(si, axis) {					\
 	.type = IIO_ACCEL,						\
 	.modified = 1,							\
 	.channel2 = IIO_MOD_##axis,					\
-	.address = reg,							\
 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),			\
 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),		\
+	.scan_index = si,						\
 }
 
 static const struct iio_chan_spec adxl345_channels[] = {
-	ADXL345_CHANNEL(ADXL345_REG_DATAX0, X),
-	ADXL345_CHANNEL(ADXL345_REG_DATAY0, Y),
-	ADXL345_CHANNEL(ADXL345_REG_DATAZ0, Z),
+	ADXL345_CHANNEL(0, X),
+	ADXL345_CHANNEL(1, Y),
+	ADXL345_CHANNEL(2, Z),
 };
 
 static int adxl345_read_raw(struct iio_dev *indio_dev,
@@ -79,8 +79,9 @@ static int adxl345_read_raw(struct iio_dev *indio_dev,
 		 * ADXL345_REG_DATA(X0/Y0/Z0) contain the least significant byte
 		 * and ADXL345_REG_DATA(X0/Y0/Z0) + 1 the most significant byte
 		 */
-		ret = regmap_bulk_read(data->regmap, chan->address, &regval,
-				       sizeof(regval));
+		ret = regmap_bulk_read(data->regmap, ADXL345_REG_DATAX0 +
+				       sizeof(regval) * chan->scan_index,
+				       &regval, sizeof(regval));
 		if (ret < 0)
 			return ret;
 
-- 
2.7.4

[PATCH 3/4] iio: accel: adxl345: add calibration offset support

[Akinobu Mita]

The ADXL345 provides the offset adjustment registers for each axis.
This adds the iio channel information for the calibraion offsets with
that feature.

Cc: Eva Rachel Retuya <eraretuya@gmail.com>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
---
 drivers/iio/accel/adxl345_core.c | 52 +++++++++++++++++++++++++++++++++++-----
 1 file changed, 46 insertions(+), 6 deletions(-)

diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c
index 6b62f82..a392f9e 100644
--- a/drivers/iio/accel/adxl345_core.c
+++ b/drivers/iio/accel/adxl345_core.c
@@ -18,6 +18,9 @@
 #include "adxl345.h"
 
 #define ADXL345_REG_DEVID		0x00
+#define ADXL345_REG_OFSX		0x1e
+#define ADXL345_REG_OFSY		0x1f
+#define ADXL345_REG_OFSZ		0x20
 #define ADXL345_REG_POWER_CTL		0x2D
 #define ADXL345_REG_DATA_FORMAT		0x31
 #define ADXL345_REG_DATAX0		0x32
@@ -53,8 +56,10 @@ struct adxl345_data {
 	.type = IIO_ACCEL,						\
 	.modified = 1,							\
 	.channel2 = IIO_MOD_##axis,					\
-	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),			\
-	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),		\
+	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |			\
+		BIT(IIO_CHAN_INFO_CALIBBIAS),				\
+	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |		\
+		BIT(IIO_CHAN_INFO_CALIBSCALE),				\
 	.scan_index = si,						\
 }
 
@@ -69,7 +74,8 @@ static int adxl345_read_raw(struct iio_dev *indio_dev,
 			    int *val, int *val2, long mask)
 {
 	struct adxl345_data *data = iio_priv(indio_dev);
-	__le16 regval;
+	__le16 accel;
+	unsigned int regval;
 	int ret;
 
 	switch (mask) {
@@ -80,18 +86,51 @@ static int adxl345_read_raw(struct iio_dev *indio_dev,
 		 * and ADXL345_REG_DATA(X0/Y0/Z0) + 1 the most significant byte
 		 */
 		ret = regmap_bulk_read(data->regmap, ADXL345_REG_DATAX0 +
-				       sizeof(regval) * chan->scan_index,
-				       &regval, sizeof(regval));
+				       sizeof(accel) * chan->scan_index, &accel,
+				       sizeof(accel));
 		if (ret < 0)
 			return ret;
 
-		*val = sign_extend32(le16_to_cpu(regval), 12);
+		*val = sign_extend32(le16_to_cpu(accel), 12);
 		return IIO_VAL_INT;
 	case IIO_CHAN_INFO_SCALE:
 		*val = 0;
 		*val2 = adxl345_uscale;
 
 		return IIO_VAL_INT_PLUS_MICRO;
+	case IIO_CHAN_INFO_CALIBBIAS:
+		ret = regmap_read(data->regmap,
+				  ADXL345_REG_OFSX + chan->scan_index, &regval);
+		if (ret < 0)
+			return ret;
+		*val = sign_extend32(regval, 7);
+		return IIO_VAL_INT;
+	case IIO_CHAN_INFO_CALIBSCALE:
+		/*
+		 * 8-bit resolution at +/- 2g, that is 4x accel data scale
+		 * factor
+		 */
+		*val = 0;
+		*val2 = adxl345_uscale * 4;
+
+		return IIO_VAL_INT_PLUS_MICRO;
+	}
+
+	return -EINVAL;
+}
+
+static int adxl345_write_raw(struct iio_dev *indio_dev,
+			    struct iio_chan_spec const *chan,
+			    int val, int val2, long mask)
+{
+	struct adxl345_data *data = iio_priv(indio_dev);
+	int ret;
+
+	switch (mask) {
+	case IIO_CHAN_INFO_CALIBBIAS:
+		ret = regmap_write(data->regmap,
+				   ADXL345_REG_OFSX + chan->scan_index, val);
+		return ret;
 	}
 
 	return -EINVAL;
@@ -99,6 +138,7 @@ static int adxl345_read_raw(struct iio_dev *indio_dev,
 
 static const struct iio_info adxl345_info = {
 	.read_raw	= adxl345_read_raw,
+	.write_raw	= adxl345_write_raw,
 };
 
 int adxl345_core_probe(struct device *dev, struct regmap *regmap,
-- 
2.7.4

Re: [PATCH 3/4] iio: accel: adxl345: add calibration offset support

[Jonathan Cameron]

On Sun, 17 Jun 2018 00:04:42 +0900
Akinobu Mita <akinobu.mita@gmail.com> wrote:

> The ADXL345 provides the offset adjustment registers for each axis.
> This adds the iio channel information for the calibraion offsets with
> that feature.
> 
> Cc: Eva Rachel Retuya <eraretuya@gmail.com>
> Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
> Cc: Jonathan Cameron <jic23@kernel.org>
> Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Hi,

The use of calibscale surprised me.  Calibbias is often effectively in
'unknown units' as there is non linear stuff in the way but roughly speaking
the assumption is that it is in the same units as the _raw measurement if it
can be (hence calibscale = 1).

adc reading = ((actualval + calibbias)*calibscale)
processed reading = (adc reading + offset)*scale

Looks like it would be easy enough to do that here and rely on default for
calibscale of 1.  That gives us one less userspace interface which is one
less thing for people to use wrong :)

> ---
>  drivers/iio/accel/adxl345_core.c | 52 +++++++++++++++++++++++++++++++++++-----
>  1 file changed, 46 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c
> index 6b62f82..a392f9e 100644
> --- a/drivers/iio/accel/adxl345_core.c
> +++ b/drivers/iio/accel/adxl345_core.c
> @@ -18,6 +18,9 @@
>  #include "adxl345.h"
>  
>  #define ADXL345_REG_DEVID		0x00
> +#define ADXL345_REG_OFSX		0x1e
> +#define ADXL345_REG_OFSY		0x1f
> +#define ADXL345_REG_OFSZ		0x20
>  #define ADXL345_REG_POWER_CTL		0x2D
>  #define ADXL345_REG_DATA_FORMAT		0x31
>  #define ADXL345_REG_DATAX0		0x32
> @@ -53,8 +56,10 @@ struct adxl345_data {
>  	.type = IIO_ACCEL,						\
>  	.modified = 1,							\
>  	.channel2 = IIO_MOD_##axis,					\
> -	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),			\
> -	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),		\
> +	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |			\
> +		BIT(IIO_CHAN_INFO_CALIBBIAS),				\
> +	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |		\
> +		BIT(IIO_CHAN_INFO_CALIBSCALE),				\
>  	.scan_index = si,						\
>  }
>  
> @@ -69,7 +74,8 @@ static int adxl345_read_raw(struct iio_dev *indio_dev,
>  			    int *val, int *val2, long mask)
>  {
>  	struct adxl345_data *data = iio_priv(indio_dev);
> -	__le16 regval;
> +	__le16 accel;
> +	unsigned int regval;
>  	int ret;
>  
>  	switch (mask) {
> @@ -80,18 +86,51 @@ static int adxl345_read_raw(struct iio_dev *indio_dev,
>  		 * and ADXL345_REG_DATA(X0/Y0/Z0) + 1 the most significant byte
>  		 */
>  		ret = regmap_bulk_read(data->regmap, ADXL345_REG_DATAX0 +
> -				       sizeof(regval) * chan->scan_index,
> -				       &regval, sizeof(regval));
> +				       sizeof(accel) * chan->scan_index, &accel,
> +				       sizeof(accel));
>  		if (ret < 0)
>  			return ret;
>  
> -		*val = sign_extend32(le16_to_cpu(regval), 12);
> +		*val = sign_extend32(le16_to_cpu(accel), 12);
>  		return IIO_VAL_INT;
>  	case IIO_CHAN_INFO_SCALE:
>  		*val = 0;
>  		*val2 = adxl345_uscale;
>  
>  		return IIO_VAL_INT_PLUS_MICRO;
> +	case IIO_CHAN_INFO_CALIBBIAS:
> +		ret = regmap_read(data->regmap,
> +				  ADXL345_REG_OFSX + chan->scan_index, &regval);
> +		if (ret < 0)
> +			return ret;
> +		*val = sign_extend32(regval, 7);
> +		return IIO_VAL_INT;
> +	case IIO_CHAN_INFO_CALIBSCALE:
> +		/*
> +		 * 8-bit resolution at +/- 2g, that is 4x accel data scale
> +		 * factor
> +		 */
> +		*val = 0;
> +		*val2 = adxl345_uscale * 4;

This surprises me.  Why am I seeing a read only calibration scale parameter?
The ABI doesn't say that this is the scale of the bias if that's what you are thinking...

calibbias is kind of unit less as often it's before a non linear transform of some
type.  However, if we were going to assume it was simple, we'd assume it had the
same scale as _raw.  Hence I would just adjust the value in the read and write for
the calibbias itself.

> +
> +		return IIO_VAL_INT_PLUS_MICRO;
> +	}
> +
> +	return -EINVAL;
> +}
> +
> +static int adxl345_write_raw(struct iio_dev *indio_dev,
> +			    struct iio_chan_spec const *chan,
> +			    int val, int val2, long mask)
> +{
> +	struct adxl345_data *data = iio_priv(indio_dev);
> +	int ret;
> +
> +	switch (mask) {
> +	case IIO_CHAN_INFO_CALIBBIAS:
> +		ret = regmap_write(data->regmap,
> +				   ADXL345_REG_OFSX + chan->scan_index, val);
> +		return ret;
>  	}
>  
>  	return -EINVAL;
> @@ -99,6 +138,7 @@ static int adxl345_read_raw(struct iio_dev *indio_dev,
>  
>  static const struct iio_info adxl345_info = {
>  	.read_raw	= adxl345_read_raw,
> +	.write_raw	= adxl345_write_raw,
>  };
>  
>  int adxl345_core_probe(struct device *dev, struct regmap *regmap,

Re: [PATCH 3/4] iio: accel: adxl345: add calibration offset support

[Akinobu Mita]

2018=E5=B9=B46=E6=9C=8817=E6=97=A5(=E6=97=A5) 3:48 Jonathan Cameron <jic23@=
kernel.org>:
>
> On Sun, 17 Jun 2018 00:04:42 +0900
> Akinobu Mita <akinobu.mita@gmail.com> wrote:
>
> > The ADXL345 provides the offset adjustment registers for each axis.
> > This adds the iio channel information for the calibraion offsets with
> > that feature.
> >
> > Cc: Eva Rachel Retuya <eraretuya@gmail.com>
> > Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
> > Cc: Jonathan Cameron <jic23@kernel.org>
> > Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
> Hi,
>
> The use of calibscale surprised me.  Calibbias is often effectively in
> 'unknown units' as there is non linear stuff in the way but roughly speak=
ing
> the assumption is that it is in the same units as the _raw measurement if=
 it
> can be (hence calibscale =3D 1).
>
> adc reading =3D ((actualval + calibbias)*calibscale)
> processed reading =3D (adc reading + offset)*scale
>
> Looks like it would be easy enough to do that here and rely on default fo=
r
> calibscale of 1.  That gives us one less userspace interface which is one
> less thing for people to use wrong :)
>
> > ---
> >  drivers/iio/accel/adxl345_core.c | 52 ++++++++++++++++++++++++++++++++=
+++-----
> >  1 file changed, 46 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl3=
45_core.c
> > index 6b62f82..a392f9e 100644
> > --- a/drivers/iio/accel/adxl345_core.c
> > +++ b/drivers/iio/accel/adxl345_core.c
> > @@ -18,6 +18,9 @@
> >  #include "adxl345.h"
> >
> >  #define ADXL345_REG_DEVID            0x00
> > +#define ADXL345_REG_OFSX             0x1e
> > +#define ADXL345_REG_OFSY             0x1f
> > +#define ADXL345_REG_OFSZ             0x20
> >  #define ADXL345_REG_POWER_CTL                0x2D
> >  #define ADXL345_REG_DATA_FORMAT              0x31
> >  #define ADXL345_REG_DATAX0           0x32
> > @@ -53,8 +56,10 @@ struct adxl345_data {
> >       .type =3D IIO_ACCEL,                                             =
 \
> >       .modified =3D 1,                                                 =
 \
> >       .channel2 =3D IIO_MOD_##axis,                                    =
 \
> > -     .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW),                  =
 \
> > -     .info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SCALE),          =
 \
> > +     .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) |                 =
 \
> > +             BIT(IIO_CHAN_INFO_CALIBBIAS),                           \
> > +     .info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SCALE) |         =
 \
> > +             BIT(IIO_CHAN_INFO_CALIBSCALE),                          \
> >       .scan_index =3D si,                                              =
 \
> >  }
> >
> > @@ -69,7 +74,8 @@ static int adxl345_read_raw(struct iio_dev *indio_dev=
,
> >                           int *val, int *val2, long mask)
> >  {
> >       struct adxl345_data *data =3D iio_priv(indio_dev);
> > -     __le16 regval;
> > +     __le16 accel;
> > +     unsigned int regval;
> >       int ret;
> >
> >       switch (mask) {
> > @@ -80,18 +86,51 @@ static int adxl345_read_raw(struct iio_dev *indio_d=
ev,
> >                * and ADXL345_REG_DATA(X0/Y0/Z0) + 1 the most significan=
t byte
> >                */
> >               ret =3D regmap_bulk_read(data->regmap, ADXL345_REG_DATAX0=
 +
> > -                                    sizeof(regval) * chan->scan_index,
> > -                                    &regval, sizeof(regval));
> > +                                    sizeof(accel) * chan->scan_index, =
&accel,
> > +                                    sizeof(accel));
> >               if (ret < 0)
> >                       return ret;
> >
> > -             *val =3D sign_extend32(le16_to_cpu(regval), 12);
> > +             *val =3D sign_extend32(le16_to_cpu(accel), 12);
> >               return IIO_VAL_INT;
> >       case IIO_CHAN_INFO_SCALE:
> >               *val =3D 0;
> >               *val2 =3D adxl345_uscale;
> >
> >               return IIO_VAL_INT_PLUS_MICRO;
> > +     case IIO_CHAN_INFO_CALIBBIAS:
> > +             ret =3D regmap_read(data->regmap,
> > +                               ADXL345_REG_OFSX + chan->scan_index, &r=
egval);
> > +             if (ret < 0)
> > +                     return ret;
> > +             *val =3D sign_extend32(regval, 7);
> > +             return IIO_VAL_INT;
> > +     case IIO_CHAN_INFO_CALIBSCALE:
> > +             /*
> > +              * 8-bit resolution at +/- 2g, that is 4x accel data scal=
e
> > +              * factor
> > +              */
> > +             *val =3D 0;
> > +             *val2 =3D adxl345_uscale * 4;
>
> This surprises me.  Why am I seeing a read only calibration scale paramet=
er?
> The ABI doesn't say that this is the scale of the bias if that's what you=
 are thinking...

I completely misunderstood calibscale.

> calibbias is kind of unit less as often it's before a non linear transfor=
m of some
> type.  However, if we were going to assume it was simple, we'd assume it =
had the
> same scale as _raw.  Hence I would just adjust the value in the read and =
write for
> the calibbias itself.

Sounds good. I'll change the code to adjust the value for the calibbias
to make the same scale as the _raw measurement, and remove misused
calibscale.

> > +
> > +             return IIO_VAL_INT_PLUS_MICRO;
> > +     }
> > +
> > +     return -EINVAL;
> > +}
> > +
> > +static int adxl345_write_raw(struct iio_dev *indio_dev,
> > +                         struct iio_chan_spec const *chan,
> > +                         int val, int val2, long mask)
> > +{
> > +     struct adxl345_data *data =3D iio_priv(indio_dev);
> > +     int ret;
> > +
> > +     switch (mask) {
> > +     case IIO_CHAN_INFO_CALIBBIAS:
> > +             ret =3D regmap_write(data->regmap,
> > +                                ADXL345_REG_OFSX + chan->scan_index, v=
al);
> > +             return ret;
> >       }
> >
> >       return -EINVAL;
> > @@ -99,6 +138,7 @@ static int adxl345_read_raw(struct iio_dev *indio_de=
v,
> >
> >  static const struct iio_info adxl345_info =3D {
> >       .read_raw       =3D adxl345_read_raw,
> > +     .write_raw      =3D adxl345_write_raw,
> >  };
> >
> >  int adxl345_core_probe(struct device *dev, struct regmap *regmap,
>

[PATCH 4/4] iio: accel: adxl345: add sampling frequency support

[Akinobu Mita]

The ADXL345 provides selectable output data rate.  This adds the iio
channel information for the sampling frequency with that feature.

Cc: Eva Rachel Retuya <eraretuya@gmail.com>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
---
 drivers/iio/accel/adxl345_core.c | 61 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c
index a392f9e..80e60c5 100644
--- a/drivers/iio/accel/adxl345_core.c
+++ b/drivers/iio/accel/adxl345_core.c
@@ -14,6 +14,7 @@
 #include <linux/regmap.h>
 
 #include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
 
 #include "adxl345.h"
 
@@ -21,12 +22,15 @@
 #define ADXL345_REG_OFSX		0x1e
 #define ADXL345_REG_OFSY		0x1f
 #define ADXL345_REG_OFSZ		0x20
+#define ADXL345_REG_BW_RATE		0x2C
 #define ADXL345_REG_POWER_CTL		0x2D
 #define ADXL345_REG_DATA_FORMAT		0x31
 #define ADXL345_REG_DATAX0		0x32
 #define ADXL345_REG_DATAY0		0x34
 #define ADXL345_REG_DATAZ0		0x36
 
+#define ADXL345_BW_RATE			GENMASK(3, 0)
+
 #define ADXL345_POWER_CTL_MEASURE	BIT(3)
 #define ADXL345_POWER_CTL_STANDBY	0x00
 
@@ -59,6 +63,7 @@ struct adxl345_data {
 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |			\
 		BIT(IIO_CHAN_INFO_CALIBBIAS),				\
 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |		\
+		BIT(IIO_CHAN_INFO_SAMP_FREQ) |				\
 		BIT(IIO_CHAN_INFO_CALIBSCALE),				\
 	.scan_index = si,						\
 }
@@ -69,6 +74,28 @@ static const struct iio_chan_spec adxl345_channels[] = {
 	ADXL345_CHANNEL(2, Z),
 };
 
+static const struct {
+	int val;
+	int val2;
+} adxl345_samp_freq_table[] = {
+	{ 0, 97656 },
+	{ 0, 195313 },
+	{ 0, 390625 },
+	{ 0, 781250 },
+	{ 1, 562500 },
+	{ 3, 125000 },
+	{ 6, 250000 },
+	{ 12, 500000 },
+	{ 25, 0 },
+	{ 50, 0 },
+	{ 100, 0 },
+	{ 200, 0 },
+	{ 400, 0 },
+	{ 800, 0 },
+	{ 1600, 0 },
+	{ 3200, 0 },
+};
+
 static int adxl345_read_raw(struct iio_dev *indio_dev,
 			    struct iio_chan_spec const *chan,
 			    int *val, int *val2, long mask)
@@ -114,6 +141,15 @@ static int adxl345_read_raw(struct iio_dev *indio_dev,
 		*val2 = adxl345_uscale * 4;
 
 		return IIO_VAL_INT_PLUS_MICRO;
+	case IIO_CHAN_INFO_SAMP_FREQ:
+		ret = regmap_read(data->regmap, ADXL345_REG_BW_RATE, &regval);
+		if (ret < 0)
+			return ret;
+		regval &= ADXL345_BW_RATE;
+		*val = adxl345_samp_freq_table[regval].val;
+		*val2 = adxl345_samp_freq_table[regval].val2;
+
+		return IIO_VAL_INT_PLUS_MICRO;
 	}
 
 	return -EINVAL;
@@ -125,18 +161,43 @@ static int adxl345_write_raw(struct iio_dev *indio_dev,
 {
 	struct adxl345_data *data = iio_priv(indio_dev);
 	int ret;
+	int i;
 
 	switch (mask) {
 	case IIO_CHAN_INFO_CALIBBIAS:
 		ret = regmap_write(data->regmap,
 				   ADXL345_REG_OFSX + chan->scan_index, val);
 		return ret;
+	case IIO_CHAN_INFO_SAMP_FREQ:
+		for (i = 0; i < ARRAY_SIZE(adxl345_samp_freq_table); i++) {
+			if (adxl345_samp_freq_table[i].val == val &&
+			    adxl345_samp_freq_table[i].val2 == val2) {
+				return regmap_update_bits(data->regmap,
+							ADXL345_REG_BW_RATE,
+							ADXL345_BW_RATE, i);
+			}
+		}
+		return -EINVAL;
 	}
 
 	return -EINVAL;
 }
 
+static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
+"0.097656 0.195313 0.390625 0.78125 1.5625 3.125 6.25 12.5 25 50 100 200 400 800 1600 3200"
+);
+
+static struct attribute *adxl345_attrs[] = {
+	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
+	NULL,
+};
+
+static const struct attribute_group adxl345_attrs_group = {
+	.attrs = adxl345_attrs,
+};
+
 static const struct iio_info adxl345_info = {
+	.attrs		= &adxl345_attrs_group,
 	.read_raw	= adxl345_read_raw,
 	.write_raw	= adxl345_write_raw,
 };
-- 
2.7.4

Re: [PATCH 4/4] iio: accel: adxl345: add sampling frequency support

[Jonathan Cameron]

On Sun, 17 Jun 2018 00:04:43 +0900
Akinobu Mita <akinobu.mita@gmail.com> wrote:

> The ADXL345 provides selectable output data rate.  This adds the iio
> channel information for the sampling frequency with that feature.
> 
> Cc: Eva Rachel Retuya <eraretuya@gmail.com>
> Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
> Cc: Jonathan Cameron <jic23@kernel.org>
> Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Looks good to me will pick up once patch 3 discussion is sorted.

Thanks,

Jonathan

> ---
>  drivers/iio/accel/adxl345_core.c | 61 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 61 insertions(+)
> 
> diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c
> index a392f9e..80e60c5 100644
> --- a/drivers/iio/accel/adxl345_core.c
> +++ b/drivers/iio/accel/adxl345_core.c
> @@ -14,6 +14,7 @@
>  #include <linux/regmap.h>
>  
>  #include <linux/iio/iio.h>
> +#include <linux/iio/sysfs.h>
>  
>  #include "adxl345.h"
>  
> @@ -21,12 +22,15 @@
>  #define ADXL345_REG_OFSX		0x1e
>  #define ADXL345_REG_OFSY		0x1f
>  #define ADXL345_REG_OFSZ		0x20
> +#define ADXL345_REG_BW_RATE		0x2C
>  #define ADXL345_REG_POWER_CTL		0x2D
>  #define ADXL345_REG_DATA_FORMAT		0x31
>  #define ADXL345_REG_DATAX0		0x32
>  #define ADXL345_REG_DATAY0		0x34
>  #define ADXL345_REG_DATAZ0		0x36
>  
> +#define ADXL345_BW_RATE			GENMASK(3, 0)
> +
>  #define ADXL345_POWER_CTL_MEASURE	BIT(3)
>  #define ADXL345_POWER_CTL_STANDBY	0x00
>  
> @@ -59,6 +63,7 @@ struct adxl345_data {
>  	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |			\
>  		BIT(IIO_CHAN_INFO_CALIBBIAS),				\
>  	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |		\
> +		BIT(IIO_CHAN_INFO_SAMP_FREQ) |				\
>  		BIT(IIO_CHAN_INFO_CALIBSCALE),				\
>  	.scan_index = si,						\
>  }
> @@ -69,6 +74,28 @@ static const struct iio_chan_spec adxl345_channels[] = {
>  	ADXL345_CHANNEL(2, Z),
>  };
>  
> +static const struct {
> +	int val;
> +	int val2;
> +} adxl345_samp_freq_table[] = {
> +	{ 0, 97656 },
> +	{ 0, 195313 },
> +	{ 0, 390625 },
> +	{ 0, 781250 },
> +	{ 1, 562500 },
> +	{ 3, 125000 },
> +	{ 6, 250000 },
> +	{ 12, 500000 },
> +	{ 25, 0 },
> +	{ 50, 0 },
> +	{ 100, 0 },
> +	{ 200, 0 },
> +	{ 400, 0 },
> +	{ 800, 0 },
> +	{ 1600, 0 },
> +	{ 3200, 0 },
> +};
> +
>  static int adxl345_read_raw(struct iio_dev *indio_dev,
>  			    struct iio_chan_spec const *chan,
>  			    int *val, int *val2, long mask)
> @@ -114,6 +141,15 @@ static int adxl345_read_raw(struct iio_dev *indio_dev,
>  		*val2 = adxl345_uscale * 4;
>  
>  		return IIO_VAL_INT_PLUS_MICRO;
> +	case IIO_CHAN_INFO_SAMP_FREQ:
> +		ret = regmap_read(data->regmap, ADXL345_REG_BW_RATE, &regval);
> +		if (ret < 0)
> +			return ret;
> +		regval &= ADXL345_BW_RATE;
> +		*val = adxl345_samp_freq_table[regval].val;
> +		*val2 = adxl345_samp_freq_table[regval].val2;
> +
> +		return IIO_VAL_INT_PLUS_MICRO;
>  	}
>  
>  	return -EINVAL;
> @@ -125,18 +161,43 @@ static int adxl345_write_raw(struct iio_dev *indio_dev,
>  {
>  	struct adxl345_data *data = iio_priv(indio_dev);
>  	int ret;
> +	int i;
>  
>  	switch (mask) {
>  	case IIO_CHAN_INFO_CALIBBIAS:
>  		ret = regmap_write(data->regmap,
>  				   ADXL345_REG_OFSX + chan->scan_index, val);
>  		return ret;
> +	case IIO_CHAN_INFO_SAMP_FREQ:
> +		for (i = 0; i < ARRAY_SIZE(adxl345_samp_freq_table); i++) {
> +			if (adxl345_samp_freq_table[i].val == val &&
> +			    adxl345_samp_freq_table[i].val2 == val2) {
> +				return regmap_update_bits(data->regmap,
> +							ADXL345_REG_BW_RATE,
> +							ADXL345_BW_RATE, i);
> +			}
> +		}
> +		return -EINVAL;
>  	}
>  
>  	return -EINVAL;
>  }
>  
> +static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
> +"0.097656 0.195313 0.390625 0.78125 1.5625 3.125 6.25 12.5 25 50 100 200 400 800 1600 3200"
> +);
> +
> +static struct attribute *adxl345_attrs[] = {
> +	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
> +	NULL,
> +};
> +
> +static const struct attribute_group adxl345_attrs_group = {
> +	.attrs = adxl345_attrs,
> +};
> +
>  static const struct iio_info adxl345_info = {
> +	.attrs		= &adxl345_attrs_group,
>  	.read_raw	= adxl345_read_raw,
>  	.write_raw	= adxl345_write_raw,
>  };