From: Mark Brown <broonie@kernel.org>
To: David Lechner <david@lechnology.com>
Cc: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Jonathan Cameron" <jic23@kernel.org>,
linux-iio@vger.kernel.org, "Lars-Peter Clausen" <lars@metafoo.de>,
linux-spi@vger.kernel.org
Subject: Re: [PATCH] iio: adc: ti-ads7950: Ensure CS is deasserted after reading channels
Date: Mon, 12 Jul 2021 12:49:09 +0100 [thread overview]
Message-ID: <20210712114909.GA4435@sirena.org.uk> (raw)
In-Reply-To: <d98603e7-3336-617a-0e2f-e964eb3c894c@lechnology.com>
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On Sat, Jul 10, 2021 at 10:32:46AM -0500, David Lechner wrote:
> On 7/10/21 7:18 AM, Uwe Kleine-König wrote:
> > If it's not broken for you without my patch, your spi bus driver doesn't
> > honor .cs_change in the last transfer. Out of interest: Which bus are
> > you using? I wonder if the driver should refuse the request if it cannot
> > honer .cs_change?! (spi-imx does honor it only if gpios are used as chip
> > select, the native chip selects cannot do that.)
> I'm using spi-davinci. It uses the standard spi_transfer_one_message()
> which handles cs_change. But I suspect when the SPI_CS_WORD flag is set,
> and the message is big enough to use DMA, the hardware is probably
> automatically toggling CS after the last transfer before the cs_change
> logic asserts it again.
> So unless there is a valid use case where we need both SPI_CS_WORD
> and cs_change, I don't think we need to fix spi-davinci.
In theory it does mean something, in practice the number of controllers
that can implement it must be approaching zero.
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next prev parent reply other threads:[~2021-07-12 11:49 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-09 10:11 [PATCH] iio: adc: ti-ads7950: Ensure CS is deasserted after reading channels Uwe Kleine-König
2021-07-09 16:39 ` David Lechner
2021-07-10 12:18 ` Uwe Kleine-König
2021-07-10 15:32 ` David Lechner
2021-07-12 11:49 ` Mark Brown [this message]
2021-07-17 17:37 ` Jonathan Cameron
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