Re: [PATCH v3 2/2] iio: adc: adding support for PAC193x

kernel test robot
2023-11-21T15:57:51Z

Hi,

kernel test robot noticed the following build warnings:

[auto build test WARNING on 5e99f692d4e32e3250ab18d511894ca797407aec]

url: https://github.com/intel-lab-lkp/linux/commits/marius-cristea-microchip-com/dt-bindings-iio-adc-adding-support-for-PAC193X/20231115-214733
base: 5e99f692d4e32e3250ab18d511894ca797407aec
patch link: https://lore.kernel.org/r/20231115134453.6656-3-marius.cristea%40microchip.com
patch subject: [PATCH v3 2/2] iio: adc: adding support for PAC193x
config: arm64-allyesconfig (https://download.01.org/0day-ci/archive/20231121/202311212310.QEKkmOfh-lkp@intel.com/config)
compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project.git 4a5ac14ee968ff0ad5d2cc1ffa0299048db4c88a)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231121/202311212310.QEKkmOfh-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202311212310.QEKkmOfh-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/iio/adc/pac1934.c:1239:3: warning: variable 'cnt' is incremented both in the loop header and in the loop body [-Wfor-loop-analysis]
1239 | cnt++;
| ^
drivers/iio/adc/pac1934.c:1236:44: note: incremented here
1236 | for (cnt = 0; cnt < info->phys_channels; cnt++) {
| ^
1 warning generated.

vim +/cnt +1239 drivers/iio/adc/pac1934.c

1226
1227 static int pac1934_chip_configure(struct pac1934_chip_info *info)
1228 {
1229 int cnt, ret;
1230 struct i2c_client *client = info->client;
1231 u8 regs[PAC1934_CTRL_STATUS_INFO_LEN], idx, ctrl_reg;
1232 u32 wait_time;
1233
1234 cnt = 0;
1235 info->chip_reg_data.num_enabled_channels = 0;
1236 for (cnt = 0; cnt < info->phys_channels; cnt++) {
1237 if (info->active_channels[cnt])
1238 info->chip_reg_data.num_enabled_channels++;
> 1239 cnt++;
1240 }
1241
1242 /*
1243 * read whatever information was gathered before the driver was loaded
1244 * establish which channels are enabled/disabled and then establish the
1245 * information retrieval mode (using SKIP or no).
1246 * Read the chip ID values
1247 */
1248 ret = i2c_smbus_read_i2c_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR,
1249 sizeof(regs),
1250 (u8 *)regs);
1251 if (ret < 0) {
1252 dev_err_probe(&client->dev, ret,
1253 "%s - cannot read regs from 0x%02X\n",
1254 __func__, PAC1934_CTRL_STAT_REGS_ADDR);
1255 return ret;
1256 }
1257
1258 /* write the CHANNEL_DIS and the NEG_PWR registers */
1259 regs[PAC1934_CHANNEL_DIS_REG_OFF] =
1260 FIELD_PREP(PAC1934_CHAN_DIS_CH1_OFF_MASK, !(info->active_channels[PAC1934_CH_1])) |
1261 FIELD_PREP(PAC1934_CHAN_DIS_CH2_OFF_MASK, !(info->active_channels[PAC1934_CH_2])) |
1262 FIELD_PREP(PAC1934_CHAN_DIS_CH3_OFF_MASK, !(info->active_channels[PAC1934_CH_3])) |
1263 FIELD_PREP(PAC1934_CHAN_DIS_CH4_OFF_MASK, !(info->active_channels[PAC1934_CH_4])) |
1264 FIELD_PREP(PAC1934_SMBUS_TIMEOUT_MASK, 0) |
1265 FIELD_PREP(PAC1934_SMBUS_BYTECOUNT_MASK, 0) |
1266 FIELD_PREP(PAC1934_SMBUS_NO_SKIP_MASK, 0);
1267
1268 regs[PAC1934_NEG_PWR_REG_OFF] =
1269 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[PAC1934_CH_1]) |
1270 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[PAC1934_CH_2]) |
1271 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[PAC1934_CH_3]) |
1272 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[PAC1934_CH_4]) |
1273 FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[PAC1934_CH_1]) |
1274 FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[PAC1934_CH_2]) |
1275 FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[PAC1934_CH_3]) |
1276 FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[PAC1934_CH_4]);
1277
1278 /* no SLOW triggered REFRESH, clear POR */
1279 regs[PAC1934_SLOW_REG_OFF] = 0;
1280
1281 ret = i2c_smbus_write_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR, 3, (u8 *)regs);
1282 if (ret)
1283 return ret;
1284
1285 ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, info->crt_samp_spd_bitfield);
1286
1287 ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_REG_ADDR, ctrl_reg);
1288 if (ret)
1289 return ret;
1290
1291 /*
1292 * send a REFRESH to the chip, so the new settings take place
1293 * as well as resetting the accumulators
1294 */
1295 ret = i2c_smbus_write_byte(client, PAC1934_REFRESH_REG_ADDR);
1296 if (ret) {
1297 dev_err(&client->dev,
1298 "%s - cannot send 0x%02X\n",
1299 __func__, PAC1934_REFRESH_REG_ADDR);
1300 return ret;
1301 }
1302
1303 /*
1304 * get the current(in the chip) sampling speed and compute the
1305 * required timeout based on its value
1306 * the timeout is 1/sampling_speed
1307 */
1308 idx = regs[PAC1934_CTRL_ACT_REG_OFF] >> PAC1934_SAMPLE_RATE_SHIFT;
1309 wait_time = (1024 / samp_rate_map_tbl[idx]) * 1000;
1310
1311 /*
1312 * wait the maximum amount of time to be on the safe side
1313 * the maximum wait time is for 8sps
1314 */
1315 usleep_range(wait_time, wait_time + 100);
1316
1317 INIT_DELAYED_WORK(&info->work_chip_rfsh, pac1934_work_periodic_rfsh);
1318 /* Setup the latest moment for reading the regs before saturation */
1319 schedule_delayed_work(&info->work_chip_rfsh,
1320 msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS));
1321
1322 devm_add_action_or_reset(&client->dev, pac1934_cancel_delayed_work,
1323 &info->work_chip_rfsh);
1324
1325 return 0;
1326 }
1327

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