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From: Jonathan Cameron <jic23@kernel.org>
To: inv.git-commit@tdk.com
Cc: lars@metafoo.de, linux-iio@vger.kernel.org,
	stable@vger.kernel.org,
	Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
Subject: Re: [PATCH v2] iio: imu: inv_mpu6050: fix frequency setting when chip is off
Date: Sat, 24 Feb 2024 16:22:08 +0000	[thread overview]
Message-ID: <20240224162208.02d28bcd@jic23-huawei> (raw)
In-Reply-To: <20240219154741.90601-1-inv.git-commit@tdk.com>

On Mon, 19 Feb 2024 15:47:41 +0000
inv.git-commit@tdk.com wrote:

> From: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
> 
> Track correctly FIFO state and apply ODR change before starting
> the chip. Without the fix, you cannot change ODR more than 1 time
> when data buffering is off.

Hi Jean-Baptiste.

I think this patch needs a little more explanation.
1) Why has state changed such that we need to update these cached values?
2) What does that have to do with ODR - or is this two unrelated fixes?

I'm sure the fix is right - I just don't fully understand the issues!
> 
> Fixes: 111e1abd0045 ("iio: imu: inv_mpu6050: use the common inv_sensors timestamp module")
> Cc: stable@vger.kernel.org
> Signed-off-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
> ---
> V2: add missing stable tag
> 
>  drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c
> index 676704f9151f..e6e6e94452a3 100644
> --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c
> +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c
> @@ -111,6 +111,7 @@ int inv_mpu6050_prepare_fifo(struct inv_mpu6050_state *st, bool enable)
>  	if (enable) {
>  		/* reset timestamping */
>  		inv_sensors_timestamp_reset(&st->timestamp);
> +		inv_sensors_timestamp_apply_odr(&st->timestamp, 0, 0, 0);
>  		/* reset FIFO */
>  		d = st->chip_config.user_ctrl | INV_MPU6050_BIT_FIFO_RST;
>  		ret = regmap_write(st->map, st->reg->user_ctrl, d);
> @@ -184,6 +185,10 @@ static int inv_mpu6050_set_enable(struct iio_dev *indio_dev, bool enable)
>  		if (result)
>  			goto error_power_off;
>  	} else {
> +		st->chip_config.gyro_fifo_enable = 0;
> +		st->chip_config.accl_fifo_enable = 0;
> +		st->chip_config.temp_fifo_enable = 0;
> +		st->chip_config.magn_fifo_enable = 0;
I think the write to actually do this is in prepare_fifo and it's not
conditional on these, so why do we care?

Are these effectively paired with inv_scan_query in the enable path?


>  		result = inv_mpu6050_prepare_fifo(st, false);
>  		if (result)
>  			goto error_power_off;
> --
> 2.34.1
> 


  reply	other threads:[~2024-02-24 16:22 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-19 15:47 [PATCH v2] iio: imu: inv_mpu6050: fix frequency setting when chip is off inv.git-commit
2024-02-24 16:22 ` Jonathan Cameron [this message]
2024-02-24 17:50   ` Jean-Baptiste Maneyrol
2024-02-25 11:46     ` Jonathan Cameron

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