From: Chris Morgan <macroalpha82@gmail.com>
To: linux-sunxi@lists.linux.dev
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-iio@vger.kernel.org, p.zabel@pengutronix.de,
sboyd@kernel.org, mturquette@baylibre.com, samuel@sholland.org,
jernej.skrabec@gmail.com, wens@csie.org, conor+dt@kernel.org,
krzk+dt@kernel.org, robh@kernel.org,
Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH V2 2/4] clk: sunxi-ng: h616: Add clock/reset for GPADC
Date: Wed, 5 Jun 2024 12:20:47 -0500 [thread overview]
Message-ID: <20240605172049.231108-3-macroalpha82@gmail.com> (raw)
In-Reply-To: <20240605172049.231108-1-macroalpha82@gmail.com>
From: Chris Morgan <macromorgan@hotmail.com>
Add the GPADC required clock and reset which is used for the onboard
GPADC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
drivers/clk/sunxi-ng/ccu-sun50i-h616.c | 5 +++++
drivers/clk/sunxi-ng/ccu-sun50i-h616.h | 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
index 45aae1ae5178..64f476c46f5b 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
@@ -489,6 +489,8 @@ static SUNXI_CCU_MP_WITH_MUX_GATE(ts_clk, "ts", ts_parents, 0x9b0,
static SUNXI_CCU_GATE(bus_ts_clk, "bus-ts", "ahb3", 0x9bc, BIT(0), 0);
+static SUNXI_CCU_GATE(bus_gpadc_clk, "bus-gpadc", "apb1", 0x9ec, BIT(0), 0);
+
static SUNXI_CCU_GATE(bus_ths_clk, "bus-ths", "apb1", 0x9fc, BIT(0), 0);
static const char * const audio_parents[] = { "pll-audio-1x", "pll-audio-2x",
@@ -807,6 +809,7 @@ static struct ccu_common *sun50i_h616_ccu_clks[] = {
&bus_emac1_clk.common,
&ts_clk.common,
&bus_ts_clk.common,
+ &bus_gpadc_clk.common,
&bus_ths_clk.common,
&spdif_clk.common,
&bus_spdif_clk.common,
@@ -940,6 +943,7 @@ static struct clk_hw_onecell_data sun50i_h616_hw_clks = {
[CLK_BUS_EMAC1] = &bus_emac1_clk.common.hw,
[CLK_TS] = &ts_clk.common.hw,
[CLK_BUS_TS] = &bus_ts_clk.common.hw,
+ [CLK_BUS_GPADC] = &bus_gpadc_clk.common.hw,
[CLK_BUS_THS] = &bus_ths_clk.common.hw,
[CLK_SPDIF] = &spdif_clk.common.hw,
[CLK_BUS_SPDIF] = &bus_spdif_clk.common.hw,
@@ -1021,6 +1025,7 @@ static struct ccu_reset_map sun50i_h616_ccu_resets[] = {
[RST_BUS_EMAC0] = { 0x97c, BIT(16) },
[RST_BUS_EMAC1] = { 0x97c, BIT(17) },
[RST_BUS_TS] = { 0x9bc, BIT(16) },
+ [RST_BUS_GPADC] = { 0x9ec, BIT(16) },
[RST_BUS_THS] = { 0x9fc, BIT(16) },
[RST_BUS_SPDIF] = { 0xa2c, BIT(16) },
[RST_BUS_DMIC] = { 0xa4c, BIT(16) },
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h616.h b/drivers/clk/sunxi-ng/ccu-sun50i-h616.h
index fdd2f4d5103f..a75803b49f6a 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h616.h
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h616.h
@@ -51,6 +51,6 @@
#define CLK_BUS_DRAM 56
-#define CLK_NUMBER (CLK_PLL_SYSTEM_32K + 1)
+#define CLK_NUMBER (CLK_BUS_GPADC + 1)
#endif /* _CCU_SUN50I_H616_H_ */
--
2.34.1
next prev parent reply other threads:[~2024-06-05 17:20 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-05 17:20 [PATCH V2 0/4] Add GPADC for Allwinner H616 Chris Morgan
2024-06-05 17:20 ` [PATCH V2 1/4] dt-bindings: clock: sun50i-h616-ccu: Add GPADC clocks Chris Morgan
2024-06-05 17:59 ` Conor Dooley
2024-06-05 17:20 ` Chris Morgan [this message]
2024-06-05 17:20 ` [PATCH V2 3/4] arm64: dts: allwinner: h616: Add GPADC device node Chris Morgan
2024-06-05 17:20 ` [PATCH V2 4/4] arm64: dts: allwinner: anbernic-rg35xx-h: Add ADC joysticks Chris Morgan
2024-06-06 15:09 ` [PATCH V2 0/4] Add GPADC for Allwinner H616 Chen-Yu Tsai
2024-06-22 12:20 ` (subset) " Chen-Yu Tsai
2024-06-22 12:20 ` Chen-Yu Tsai
2024-06-22 12:22 ` Chen-Yu Tsai
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