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From: Judith Mendez <jm@ti.com>
To: William Breathitt Gray <wbg@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Vignesh Raghavendra <vigneshr@ti.com>, Nishanth Menon <nm@ti.com>,
	Tero Kristo <kristo@kernel.org>,
	David Lechner <david@lechnology.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-iio@vger.kernel.org>, Judith Mendez <jm@ti.com>
Subject: [PATCH v6 5/5] arm64: dts: ti: k3-am64x-sk: Enable eQEP
Date: Tue, 24 Sep 2024 17:07:00 -0500	[thread overview]
Message-ID: <20240924220700.886313-6-jm@ti.com> (raw)
In-Reply-To: <20240924220700.886313-1-jm@ti.com>

There are 3 instances of eQEP on AM64x. Only EQEP0 signals
can be routed to the user expansion so enable only EQEP0
in k3-am642-sk.dts.

Signed-off-by: Judith Mendez <jm@ti.com>
---
Changes since v5:
- No change
---
 arch/arm64/boot/dts/ti/k3-am642-sk.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 86369525259c..47b351067bb8 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -357,6 +357,16 @@ main_ecap0_pins_default: main-ecap0-default-pins {
 			AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
 		>;
 	};
+
+	main_eqep0_pins_default: main-eqep0-default-pins {
+		pinctrl-single,pins = <
+			AM64X_IOPAD(0x00a0, PIN_INPUT, 3) /* (N16) GPMC0_WPn.EQEP0_A */
+			AM64X_IOPAD(0x00a4, PIN_INPUT, 3) /* (N17) GPMC0_DIR.EQEP0_B */
+			AM64X_IOPAD(0x00ac, PIN_INPUT, 3) /* (R20) GPMC0_CSn1.EQEP0_I */
+			AM64X_IOPAD(0x00a8, PIN_INPUT, 3) /* (R19) GPMC0_CSn0.EQEP0_S */
+		>;
+	};
+
 	main_wlan_en_pins_default: main-wlan-en-default-pins {
 		pinctrl-single,pins = <
 			AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */
@@ -687,3 +697,10 @@ &ecap0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_ecap0_pins_default>;
 };
+
+&eqep0 {
+	status = "okay";
+	/* EQEP0 A & B available on pins 18 & 22 of J4 header */
+	pinctrl-names = "default";
+	pinctrl-0 = <&main_eqep0_pins_default>;
+};
-- 
2.46.0


  parent reply	other threads:[~2024-09-24 22:07 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-24 22:06 [PATCH v6 0/5] Enable eQEP DT support for Sitara K3 platforms Judith Mendez
2024-09-24 22:06 ` [PATCH v6 1/5] arm64: dts: ti: k3-am62-main: Add eQEP nodes Judith Mendez
2024-09-24 22:06 ` [PATCH v6 2/5] arm64: dts: ti: k3-am62a-main: " Judith Mendez
2024-09-24 22:06 ` [PATCH v6 3/5] arm64: dts: ti: k3-am62p-main: " Judith Mendez
2024-09-24 22:06 ` [PATCH v6 4/5] arm64: dts: ti: k3-am64-main: " Judith Mendez
2024-09-24 22:07 ` Judith Mendez [this message]
2024-09-29 10:47 ` [PATCH v6 0/5] Enable eQEP DT support for Sitara K3 platforms William Breathitt Gray
2024-09-30  4:07   ` Vignesh Raghavendra
2024-10-28 15:05 ` Vignesh Raghavendra

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