From: Rob Herring <robh@kernel.org>
To: David Lechner <dlechner@baylibre.com>
Cc: "Mark Brown" <broonie@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Marcelo Schmitt" <marcelo.schmitt@analog.com>,
"Michael Hennerich" <michael.hennerich@analog.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Jonathan Cameron" <jic23@kernel.org>,
"Andy Shevchenko" <andy@kernel.org>,
"Sean Anderson" <sean.anderson@linux.dev>,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org
Subject: Re: [PATCH 1/6] dt-bindings: spi: Add spi-buses property
Date: Thu, 30 Oct 2025 08:51:26 -0500 [thread overview]
Message-ID: <20251030135126.GA3749313-robh@kernel.org> (raw)
In-Reply-To: <14ae0769-341b-4325-b925-7bba6d57bbdf@baylibre.com>
On Tue, Oct 21, 2025 at 09:59:22AM -0500, David Lechner wrote:
> On 10/21/25 9:21 AM, Rob Herring wrote:
> > On Tue, Oct 14, 2025 at 05:02:11PM -0500, David Lechner wrote:
> >> Add a spi-buses property to the spi-peripheral-props binding to allow
> >> specifying the SPI data bus or buses that a peripheral is connected to
> >> in cases where the SPI controller has more than one physical SPI data
> >> bus.
> >
> > Is there a reason why spi-rx-bus-width property doesn't work for you?
> > The only thing I see would be you need to define the order of the pins
> > like "data-lanes" property.
> >
> > Rob
>
> Because we can have both at the same time. In one of the other threads,
> we talked about the AD4630 ADC that will require this since it has 2 data
> buses each with a width of 4 (total of 8 lines).
>
> See: https://lore.kernel.org/linux-iio/ad929fe5-be03-4628-b95a-5c3523bae0c8@baylibre.com/
But it can't really be 2 independent buses/controllers unless the ADC
has 2 completely independent interfaces, right? Surely the clock is
shared across the 2 buses? So aren't you really just borrowing pins and
the fifo of the 2nd controller? That seems pretty controller specific to
support that. For example, how would you support this with spi-gpio
(obviously kind of pointless given the bandwidth needs with 8 data
lines) or any 2 independent instances of SPI controllers?
Rob
next prev parent reply other threads:[~2025-10-30 13:51 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-14 22:02 [PATCH 0/6] spi: add multi-bus support David Lechner
2025-10-14 22:02 ` [PATCH 1/6] dt-bindings: spi: Add spi-buses property David Lechner
2025-10-21 14:21 ` Rob Herring
2025-10-21 14:59 ` David Lechner
2025-10-30 13:51 ` Rob Herring [this message]
2025-10-30 22:42 ` David Lechner
2025-11-10 17:04 ` Mark Brown
2025-10-14 22:02 ` [PATCH 2/6] spi: Support multi-bus controllers David Lechner
2025-10-15 10:06 ` Nuno Sá
2025-10-15 20:16 ` Marcelo Schmitt
2025-10-14 22:02 ` [PATCH 3/6] spi: add multi_bus_mode field to struct spi_transfer David Lechner
2025-10-15 10:16 ` Nuno Sá
2025-10-15 12:01 ` Mark Brown
2025-10-15 14:43 ` Nuno Sá
2025-10-15 15:18 ` Mark Brown
2025-10-15 16:15 ` David Lechner
2025-10-15 16:43 ` Nuno Sá
2025-10-15 18:38 ` David Lechner
2025-10-16 9:08 ` Nuno Sá
2025-10-16 15:25 ` David Lechner
2025-10-17 12:36 ` Nuno Sá
2025-10-15 20:21 ` Marcelo Schmitt
2025-10-14 22:02 ` [PATCH 4/6] spi: axi-spi-engine: support SPI_MULTI_BUS_MODE_STRIPE David Lechner
2025-10-15 10:30 ` Nuno Sá
2025-10-15 12:03 ` Mark Brown
2025-10-15 16:29 ` David Lechner
2025-10-16 9:11 ` Nuno Sá
2025-10-15 20:53 ` Marcelo Schmitt
2025-10-15 22:01 ` David Lechner
2025-10-14 22:02 ` [PATCH 5/6] dt-bindings: iio: adc: adi,ad7380: add spi-buses property David Lechner
2025-10-14 22:02 ` [PATCH 6/6] iio: adc: ad7380: Add support for multiple SPI buses David Lechner
2025-10-15 10:36 ` Nuno Sá
2025-10-15 18:46 ` David Lechner
2025-10-18 18:10 ` Jonathan Cameron
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