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Tue, 16 Dec 2025 23:50:19 -0800 (PST) From: Daniel Lezcano To: wbg@kernel.org, robh@kernel.org, conor+dt@kernel.org, krzk+dt@kernel.org Cc: s32@nxp.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, Maxime Coquelin , Alexandre Torgue , linux-stm32@st-md-mailman.stormreply.com (moderated list:ARM/STM32 ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:ARM/STM32 ARCHITECTURE) Subject: [PATCH v3 2/3] dt-bindings: counter: Add NXP System Timer Module Counter Date: Wed, 17 Dec 2025 08:49:56 +0100 Message-ID: <20251217075000.2592966-3-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251217075000.2592966-1-daniel.lezcano@linaro.org> References: <20251217075000.2592966-1-daniel.lezcano@linaro.org> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add the System Timer Module description found on the NXP s32 platform when it is used as a counter and the compatible for the s32g2 variant. Reviewed-by: Rob Herring (Arm) Signed-off-by: Daniel Lezcano --- .../bindings/counter/nxp,s32g2-stm-cnt.yaml | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/counter/nxp,s32g2-stm-cnt.yaml diff --git a/Documentation/devicetree/bindings/counter/nxp,s32g2-stm-cnt.yaml b/Documentation/devicetree/bindings/counter/nxp,s32g2-stm-cnt.yaml new file mode 100644 index 000000000000..4d42996f5ad3 --- /dev/null +++ b/Documentation/devicetree/bindings/counter/nxp,s32g2-stm-cnt.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/counter/nxp,s32g2-stm-cnt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP System Timer Module (STM) + +maintainers: + - Daniel Lezcano + +description: + The System Timer Module supports commonly required system and application + software timing functions. STM includes a 32-bit count-up timer and four + 32-bit compare channels with a separate interrupt source for each channel. + The counter is driven by the STM module clock divided by an 8-bit prescale + value. + +properties: + compatible: + oneOf: + - const: nxp,s32g2-stm-cnt + - items: + - const: nxp,s32g3-stm-cnt + - const: nxp,s32g2-stm-cnt + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Counter clock + - description: Module clock + - description: Register clock + + clock-names: + items: + - const: counter + - const: module + - const: register + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + + timer@4011c000 { + compatible = "nxp,s32g2-stm-cnt"; + reg = <0x4011c000 0x3000>; + interrupts = ; + clocks = <&clks 0x3b>, <&clks 0x3c>, <&clks 0x3c>; + clock-names = "counter", "module", "register"; + }; -- 2.43.0