From: Jonathan Cameron <jic23@kernel.org>
To: Daniel Lezcano <daniel.lezcano@oss.qualcomm.com>
Cc: "Jishnu Prakash" <jishnu.prakash@oss.qualcomm.com>,
"David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Amit Kucheria" <amitk@kernel.org>,
"Thara Gopinath" <thara.gopinath@gmail.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Daniel Lezcano" <daniel.lezcano@kernel.org>,
"Zhang Rui" <rui.zhang@intel.com>,
"Lukasz Luba" <lukasz.luba@arm.com>,
linux-arm-msm@vger.kernel.org, linux-iio@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
"Kamal Wadhwa" <kamal.wadhwa@oss.qualcomm.com>,
"David Collins" <david.collins@oss.qualcomm.com>,
"Anjelique Melendez" <anjelique.melendez@oss.qualcomm.com>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Stephan Gerhold" <stephan.gerhold@linaro.org>
Subject: Re: [PATCH v2 1/2] iio: adc: qcom-spmi-adc5-gen3: Share SDAM0 IRQ with ADC_TM auxiliary driver
Date: Wed, 27 May 2026 12:26:28 +0100 [thread overview]
Message-ID: <20260527122628.3c8cc8a2@jic23-huawei> (raw)
In-Reply-To: <3584c4eb-1d9e-468f-bd30-9b5d91c865af@oss.qualcomm.com>
On Tue, 26 May 2026 15:12:30 +0200
Daniel Lezcano <daniel.lezcano@oss.qualcomm.com> wrote:
> Hi Andy, Johnathan,
>
> On 5/26/26 12:56, Jishnu Prakash wrote:
> > The SDAM0 IRQ can be triggered for both EOC (end of conversion) events for
> > immediate ADC reads done in this driver and for threshold violation events,
> > based on ADC_TM thresholds configured from the auxiliary ADC_TM driver on
> > TM channels on the first SDAM.
> >
> > At present, this interrupt is handled only in the ISR in the main ADC driver.
> > When the ISR is triggered for an ADC_TM event, this driver notifies the ADC_TM
> > driver by calling a notifier callback exposed from it for this purpose.
> >
> > To simplify the interrupt handling in both drivers, share the interrupt between
> > the drivers. With this, ADC_TM interrupts on SDAM0 will be handled directly in
> > the ADC_TM driver, so remove the notifier callback and all TM interrupt
> > handling in the main ADC ISR.
>
> Given the nature of these changes reworking how is handled the interrupt
> to share it properly with the TM sensor and the dependency of patch 2 on
> this one, I think it makes sense to merge these two patches through the
> thermal tree. Are you fine with that ?
Yes, but perhaps not just yet:
https://sashiko.dev/#/patchset/20260526-gen3_adc_tm-v2-0-702fbac919ac%40oss.qualcomm.com
Has some stuff beyond the usual other things I found whilst here that look plausible
from a first glance.
The one about clearing irqs from other SDAMS potentially leading to repeated IRQ_NONE
and disabling of an sdam interrupt seems correct to me - but maybe I'm missing something!
Jonathan
next prev parent reply other threads:[~2026-05-27 11:26 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-26 10:56 [PATCH v2 0/2] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring Jishnu Prakash
2026-05-26 10:56 ` [PATCH v2 1/2] iio: adc: qcom-spmi-adc5-gen3: Share SDAM0 IRQ with ADC_TM auxiliary driver Jishnu Prakash
2026-05-26 13:12 ` Daniel Lezcano
2026-05-27 11:26 ` Jonathan Cameron [this message]
2026-05-27 11:29 ` Jonathan Cameron
2026-06-02 23:35 ` Andy Shevchenko
2026-06-04 10:46 ` Jonathan Cameron
2026-06-04 14:44 ` Andy Shevchenko
2026-06-11 10:43 ` Jishnu Prakash
2026-06-11 18:53 ` Andy Shevchenko
2026-06-14 19:02 ` Jonathan Cameron
2026-05-26 10:56 ` [PATCH v2 2/2] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring Jishnu Prakash
2026-05-27 11:42 ` Jonathan Cameron
2026-06-11 10:42 ` Jishnu Prakash
2026-06-14 19:06 ` Jonathan Cameron
2026-06-02 23:44 ` Andy Shevchenko
2026-06-11 10:42 ` Jishnu Prakash
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