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charset=US-ASCII Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: n_5OUVgtVG2cKcftMMBrDII4UkWa-nNB X-Proofpoint-ORIG-GUID: n_5OUVgtVG2cKcftMMBrDII4UkWa-nNB X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIwMDAyNSBTYWx0ZWRfXz+cCqgPpBmAJ SVyvQM3d/GN/kdLg+mzZYKHFCqXSMNmYxwGHyGkNVdk52ZK4VuBRcpupSC5uR+ZYsFMnLmMgMBa YDBbN6lUBxL5S2mN0h5X1nndXOyFWk3KNeYlzIpP8jxRQINU2y+K6wYP4vx8hBPFFWnb33yBhFe DAi6IsGh/lZ084CH59c7UvYo9QoJ4+A6bUcB3IHwjWsGJOaQDMeNjyeQyqvcAwwch7MXadu5bL8 GCV4EjnldCW/LWIFwkeZ6NyuaUNxkSzK1dG7qo20xK6oWvcNNBEDyOT5h8DS1bEJz/RL43E/Gvc p0YDTthjFpOFnipPyYpE/1zbMMuI/y6FDP40fta1KU6+amL8R0A++Ck1lFGTdZ8eOBLTMipQNRi yqrP2emauz9MLFL0jsl90vB5AbkvH1WEYYlMZ0UCDvv+4A1n7zbEOE9YTjxNJO+Sw/MrHB/QEXO datit05WtB/XXmfsRJw== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIwMDAyNSBTYWx0ZWRfX9oOzlsWlG13s qxQyUS+jpEtCwkMnmab35+vgWy6/hhcTw8kJxPd8y8Co9wg61BIkpIe+8/zYAvnNyx7+Dmfa+bN TdnjP3I+pBCrOIYVxvH9a8HU8WGY9yw= X-Authority-Analysis: v=2.4 cv=YsQ/gYYX c=1 sm=1 tr=0 ts=6a5d8933 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=qC1CW/w66vtJz1P9yTJxNA==:17 a=kj9zAlcOel0A:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=VwQbUJbxAAAA:8 a=pGLkceISAAAA:8 a=qza3z6wo7qKxcvPQmsoA:9 a=CjuIK1q_8ugA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-19_08,2026-07-17_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 phishscore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 spamscore=0 malwarescore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607200025 On Tue, 14 Jul 2026 17:39:08 +0800 Linmao Li wrote: > mpu3050_drdy_trigger_set_state() takes a runtime PM reference before > configuring the FIFO and data-ready interrupt. Five configuration failure > paths return without dropping that reference. The IIO trigger core does not > call the disable callback after a failed enable, so each failure increments > the device usage counter permanently. > > Use pm_runtime_resume_and_get() to handle resume failures without changing > the usage counter, and drop the reference on subsequent configuration > errors. Only mark the hardware trigger active immediately before enabling > its interrupt, and clear the flag if that operation fails. > > Fixes: 3904b28efb2c ("iio: gyro: Add driver for the MPU-3050 gyroscope") > Signed-off-by: Linmao Li Hi. Thanks for the patch. There is another patch on list for this issue. https://lore.kernel.org/all/20260714131426.4257-2-birenpandya@gmail.com/ (and another approach before that) Thanks, Jonathan > --- > drivers/iio/gyro/mpu3050-core.c | 23 ++++++++++++++++------- > 1 file changed, 16 insertions(+), 7 deletions(-) > > diff --git a/drivers/iio/gyro/mpu3050-core.c b/drivers/iio/gyro/mpu3050-core.c > index d84e04e4b431..6bee1caadd81 100644 > --- a/drivers/iio/gyro/mpu3050-core.c > +++ b/drivers/iio/gyro/mpu3050-core.c > @@ -988,20 +988,21 @@ static int mpu3050_drdy_trigger_set_state(struct iio_trigger *trig, > return 0; > } else { > /* Else we're enabling the trigger from this point */ > - pm_runtime_get_sync(mpu3050->dev); > - mpu3050->hw_irq_trigger = true; > + ret = pm_runtime_resume_and_get(mpu3050->dev); > + if (ret) > + return ret; > > /* Disable all things in the FIFO */ > ret = regmap_write(mpu3050->map, MPU3050_FIFO_EN, 0); > if (ret) > - return ret; > + goto err_pm_put; > > /* Reset and enable the FIFO */ > ret = regmap_set_bits(mpu3050->map, MPU3050_USR_CTRL, > MPU3050_USR_CTRL_FIFO_EN | > MPU3050_USR_CTRL_FIFO_RST); > if (ret) > - return ret; > + goto err_pm_put; > > mpu3050->pending_fifo_footer = false; > > @@ -1013,12 +1014,12 @@ static int mpu3050_drdy_trigger_set_state(struct iio_trigger *trig, > MPU3050_FIFO_EN_GYRO_ZOUT | > MPU3050_FIFO_EN_FOOTER); > if (ret) > - return ret; > + goto err_pm_put; > > /* Configure the sample engine */ > ret = mpu3050_start_sampling(mpu3050); > if (ret) > - return ret; > + goto err_pm_put; > > /* Clear IRQ flag */ > ret = regmap_read(mpu3050->map, MPU3050_INT_STATUS, &val); > @@ -1035,12 +1036,20 @@ static int mpu3050_drdy_trigger_set_state(struct iio_trigger *trig, > if (mpu3050->irq_opendrain) > val |= MPU3050_INT_OPEN; > > + mpu3050->hw_irq_trigger = true; > ret = regmap_write(mpu3050->map, MPU3050_INT_CFG, val); > if (ret) > - return ret; > + goto err_clear_trigger; > } > > return 0; > + > +err_clear_trigger: > + mpu3050->hw_irq_trigger = false; > +err_pm_put: > + pm_runtime_put_autosuspend(mpu3050->dev); > + > + return ret; > } > > static const struct iio_trigger_ops mpu3050_trigger_ops = {