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Mon, 03 Aug 2026 12:35:21 -0700 (PDT) Received: from systembl0wer ([2a02:8308:4092:11f0::f9f]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47fd456220esm36742356f8f.18.2026.08.03.12.35.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2026 12:35:21 -0700 (PDT) Date: Mon, 3 Aug 2026 21:35:19 +0200 From: Joshua Crofts To: sashiko-bot@kernel.org Cc: sashiko-reviews@lists.linux.dev, devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org, linux-iio@vger.kernel.org, jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org Subject: Re: [PATCH v3 1/2] dt-bindings: iio: dac: add support for mcp47a1 Message-ID: <20260803213519.7d3d241e@systembl0wer> In-Reply-To: <20260803180717.4BE651F000E9@smtp.kernel.org> References: <20260803-mcp47a1-add-support-v3-0-540e71b4fd2e@gmail.com> <20260803-mcp47a1-add-support-v3-1-540e71b4fd2e@gmail.com> <20260803180717.4BE651F000E9@smtp.kernel.org> X-Mailer: Claws Mail 4.4.0 (GTK 3.24.52; x86_64-redhat-linux-gnu) Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Mon, 03 Aug 2026 18:07:16 +0000 sashiko-bot@kernel.org wrote: > Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider: > - [Medium] The I2C addresses specified in the schema and example appear to be 8-bit write addresses instead of the 7-bit addresses required by the DT specification. > - [Low] The `reg` property schema applies an integer `enum` directly to a matrix array element, which will cause `dt_binding_check` validation to always fail. > -- > > --- Patch [1]: [PATCH v3 1/2] dt-bindings: iio: dac: add support for mcp47a1 --- > commit 441e840b5a2a3f037c3520c49013a55b7dc4c1bd > Author: Joshua Crofts > > dt-bindings: iio: dac: add support for mcp47a1 > > The Microchip MCP47A1 is a 6-bit volatile Digital-to-Analog converter > which communicates via I2C. > > > diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp47a1.yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47a1.yaml > > new file mode 100644 > > index 0000000000000..b181fe73dce84 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47a1.yaml > [ ... ] > > +properties: > > + compatible: > > + const: microchip,mcp47a1 > > + > > + reg: > > + items: > > + - enum: [0x2e, 0x3e] > > [Severity: Low] > Will this cause dt_binding_check validation to fail? No, this is a perfectly valid dt-schema which passes dt_binding_check. > > Since dt-schema parses reg values into a uint32-matrix (an array of arrays), > the items array applied to it defines a tuple schema for the outer array's > elements. This means the inner array [0x2e] will be matched against the > integer enum [0x2e, 0x3e], which will mathematically fail since an array > is not an integer. > > [Severity: Medium] > Are these 8-bit write addresses instead of the 7-bit addresses required by > the Device Tree specification? > > If these are indeed 8-bit addresses (as indicated by the 0 LSB and typical > Microchip datasheet conventions), they must be shifted right by 1. That would > make the correct 7-bit DT addresses 0x17 and 0x1f. No clue what Sashiko is on about since these are indeed 7-bit addresses which do work when tested on the actual hardware. -- Kind regards, Joshua Crofts