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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2a7d751e457sm11753372fac.25.2025.01.06.06.50.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 06 Jan 2025 06:50:20 -0800 (PST) Message-ID: <2a4f0a3d-3288-4f59-8c18-c53ab4b596e5@baylibre.com> Date: Mon, 6 Jan 2025 08:50:18 -0600 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/2] iio: adc: add Nuvoton NCT7201 ADC driver To: Yu-Hsian Yang , Andy Shevchenko Cc: avifishman70@gmail.com, tmaimon77@gmail.com, tali.perry1@gmail.com, venture@google.com, yuenn@google.com, benjaminfair@google.com, jic23@kernel.org, lars@metafoo.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, nuno.sa@analog.com, javier.carrasco.cruz@gmail.com, marcelo.schmitt@analog.com, olivier.moysan@foss.st.com, mitrutzceclan@gmail.com, tgamblin@baylibre.com, matteomartelli3@gmail.com, alisadariana@gmail.com, gstols@baylibre.com, thomas.bonnefille@bootlin.com, herve.codina@bootlin.com, chanh@os.amperecomputing.com, KWLIU@nuvoton.com, yhyang2@nuvoton.com, openbmc@lists.ozlabs.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20241226055313.2841977-1-j2anfernee@gmail.com> <20241226055313.2841977-3-j2anfernee@gmail.com> Content-Language: en-US From: David Lechner In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 1/6/25 2:33 AM, Yu-Hsian Yang wrote: > Dear Andy, > > Thanks for your comments. > > Andy Shevchenko 於 2024年12月27日 週五 下午8:14寫道： >> >> On Thu, Dec 26, 2024 at 01:53:13PM +0800, Eason Yang wrote: >>> Add Nuvoton NCT7201/NCT7202 system voltage monitor 12-bit ADC driver >>> >>> NCT7201/NCT7202 supports up to 12 analog voltage monitor inputs and up to >>> 4 SMBus addresses by ADDR pin. Meanwhile, ALERT# hardware event pins for >>> independent alarm signals, and the all threshold values could be set for >>> system protection without any timing delay. It also supports reset input >>> RSTIN# to recover system from a fault condition. >>> >>> Currently, only single-edge mode conversion and threshold events support. >> ... >> >>> +static const struct regmap_config nct7201_regmap8_config = { >>> + .name = "vin-data-read-byte", >>> + .reg_bits = 8, >>> + .val_bits = 8, >>> + .max_register = 0xff, >>> +}; >>> + >>> +static const struct regmap_config nct7201_regmap16_config = { >>> + .name = "vin-data-read-word", >>> + .reg_bits = 8, >>> + .val_bits = 16, >>> + .max_register = 0xff, >>> +}; >> >> I don't see how these configurations will prevent, e.g., debugfs to access >> 16-bit registers via 8-bit IO and vice versa. >> > > Read VIN info can use word read or byte read, and other registers > should use byte read. > > The design is that VIN info registers are used 16-bit debugfs to access and > other registers are used 8-bit debugfs to access. > > We need to probe 8-bit regmap and 16-bit regmap, > but I have no idea how to prevent 8-bit IO to access 16-bit registers > and vice versa. You can do this with struct regmap_access_table via wr_table and rd_table in the struct regmap_config.